Abstract:
A self diagnosis (BISD) device for a random memory array, preferably integrated with the random access memory, executes a certain number of predefined test algorithms and identifies addresses of faulty locations. The BISD device recognizes certain fail patterns of interest and generates bit-strings corresponding to them. In practice, the BISD device diagnoses automatically memory arrays and allow to identify defects in the production process that affect a new technology during its learning phase, thus accelerating its "maturation".
Abstract:
Flash NAND memory electronic device comprising non-volatile cells and having a high integration density and relative programming method. Memory device (1) of the type integrated on a semiconductor substrate (3) and comprising one matrix (6) with rows or Word lines (4) and columns or Bit lines (5) organised in sectors (7) of memory cells (2). The device (1) comprising between said cells (2) of said opposite Word lines (4) belonging to at least one of said sectors (7) of said matrix (6) a lateral coating (15) along the direction of the Bit lines (5) having at least one conductive layer (16) with a contact terminal (9) being selectively biased or floating during each program, read or erase operation, each cell belonging to said sector (7).
Abstract:
Electronic memory device with non-volatile memory cells, high density and reduced interference cell-to-cell, of the type integrated on a semiconductor substrate (3) and organised in matrix with rows or Word lines (4) and columns or Bit lines (5) of memory cells (2). Each of said cells (2) comprises at least one floating gate transistor having a floating gate region (9) projecting from said substrate (3) and a control gate region (12) capacitively coupled to said floating gate region (9). Between the cells (2) of said opposite Word lines (4) a lateral coating (15) is provided comprising at least one conductive layer (16) floating along the direction of said Bit lines (5).