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    Processor architecture, related system and method of operation
    2.
    发明公开
    Processor architecture, related system and method of operation 审中-公开
    Prozessorarchitektur und系统和Betriebsverfahren

    公开(公告)号：EP1324191A1

    公开(公告)日：2003-07-02

    申请号：EP01830814.8

    申请日：2001-12-27

    Applicant: STMicroelectronics S.r.l.

    Inventor： Cremonesi, Alessandro ,  Rovati, Fabrizio ,  Pau, Danilo

    IPC: G06F9/318

    CPC classification number: G06F9/30196 ,  G06F9/30181 ,  G06F9/30189

    Abstract: A processing architecture enables execution of one first set of instructions (OsTask1.1, OsTask1.2, ...) and one second set of instructions (MmTask2.1, MmTask2.2, MmTask2.3, ...) compiled for being executed by two different CPUs, the first set of instructions (OsTask1.1, OsTask1.2, ...) not being executable by the second CPU, and the second set of instructions (MmTask2.1, MmTask2.2, MmTask2.3, ...) not being executable by the first CPU. The architecture comprises a single CPU (CPU3) configured for executing both the instructions of the first set (OsTask1.1, OsTask1.2, ...) and the instructions of the second set (MmTask2.1, MmTask2.2, MmTask2.3, ...). The single CPU in question (CPU3) being selectively switchable between a first operating mode, in which the single CPU (CPU3) executes the first set instructions (OsTask1.1, OsTask1.2, ...), and a second operating mode, in which the single CPU (CPU3) executes the second set of instructions (MmTask2.1, MmTask2.2, MmTask2.3, ...). The single processor (CPU3) is configured for recognizing a switching instruction between the first operating mode and the second operating mode and for switching between the first operating mode and the second operating mode according to the switching instruction. The solution can be generalized to the use of a number of switching instructions between more than two execution modes for different CPUs.

    Abstract translation: 一种处理架构使得能够执行一组第一组指令（OsTask1.1，OsTask1.2，...）和一组第二组指令（MmTask2.1，MmTask2.2，MmTask2.3，...） 由两个不同的CPU执行，第一组指令（OsTask1.1，OsTask1.2，...）不能由第二个CPU执行，第二组指令（MmTask2.1，MmTask2.2，MmTask2.3 ，...）不能由第一个CPU执行。 该架构包括被配置为执行第一组（OsTask1.1，OsTask1.2，...）的指令和第二组的指令（MmTask2.1，MmTask2.2，MmTask2）的单个CPU（CPU3）。 3，...）。 所讨论的单个CPU（CPU3）可以在单CPU（CPU3）执行第一组指令（OsTask1.1，OsTask1.2，...）的第一操作模式和第二操作模式之间切换， 其中单个CPU（CPU3）执行第二组指令（MmTask2.1，MmTask2.2，MmTask2.3，...）。 单处理器（CPU3）被配置为根据切换指令识别第一操作模式和第二操作模式之间的切换指令，并且用于在第一操作模式和第二操作模式之间切换。 该解决方案可以推广到在不同CPU之间的两个以上执行模式之间使用多个切换指令。

    Detection of a 3:2 pulldown in a motion estimation phase and optimized video compression encoder
    5.
    发明公开
    Detection of a 3:2 pulldown in a motion estimation phase and optimized video compression encoder 审中-公开
    检测运动估计阶段的3：2下拉和优化的视频压缩编码器

    公开(公告)号：EP0994626A1

    公开(公告)日：2000-04-19

    申请号：EP98830600.7

    申请日：1998-10-12

    Applicant: STMicroelectronics S.r.l.

    Inventor： Pezzoni, Luca ,  Piccineli, Emiliano ,  Pau, Danilo

    IPC: H04N7/26

    CPC classification number: H04N19/186 ,  H04N19/61

    Abstract: A method of compressing encoding data of a sequence of pictures based on a motion estimation among the successive images in order to remove the temporal redundancy from the data, characterized in that it comprises recognizing a 3:2 pulldown conversion of a series of photograms of a filmed sequence in a sequence of TV frames of number greater than the number of said photograms by duplication of certain pictures in a certain order and eliminating the redundancy due to such picture duplications.

    Abstract translation: 一种基于连续图像之间的运动估计对图像序列的编码数据进行压缩以便从数据中去除时间冗余的方法，其特征在于，该方法包括识别一系列图像的一系列照片的3：2下拉变换 通过以特定顺序复制某些图像并消除由于这种图像复制而造成的冗余，在数量大于所述图像数量的TV帧序列中拍摄序列。

    Fractal coding of data in the DCT domain
    6.
    发明公开
    Fractal coding of data in the DCT domain 审中-公开
    弗拉基米尔·冯·达滕在德米兰

    公开(公告)号：EP0986026A1

    公开(公告)日：2000-03-15

    申请号：EP98830522.3

    申请日：1998-09-07

    Applicant: STMicroelectronics S.r.l.

    Inventor： Pau, Danilo ,  Sannino, Roberto ,  Capasso, Andrea ,  Fragneto, Pasqualina

    IPC: G06T9/00

    CPC classification number: G06F17/147 ,  H04N19/119 ,  H04N19/122 ,  H04N19/14 ,  H04N19/176 ,  H04N19/436 ,  H04N19/99

    Abstract: A method of calculating the discrete cosine transform (DCT) of blocks of pixels of a picture includes the steps of defining first subdivision blocks called range blocks, having a fractional and scaleable size N/2 i *N/2 i , where i is an integer number, in respect to a maximum pre-defined size of N*N pixels of blocks of division of said picture, referred to as domain blocks, shiftable by intervals of N / 2 i pixels, and of calculating the DCT on 2 i range blocks of subdivision of a domain block of N*N pixels of said picture, in parallel.

    Abstract translation: 计算图像像素块的离散余弦变换（DCT）的方法包括以下步骤：定义具有分数和可缩放大小N / 2 * N / 2的称为范围块的第一细分块， 其中i是整数，关于所述图像的划分块的N * N个像素的最大预定大小，称为域块，可以以N / 2像素的间隔移位，并且计算 并行地对所述图像的N * N个像素的域块进行细分的二进制DCT上的DCT。

    Method and device for processing video signals for presentation on a display and corresponding computer program product
    9.
    发明公开
    Method and device for processing video signals for presentation on a display and corresponding computer program product 有权
    TreiberfüreineFlüssigkristallanzeigeeines个人助理助理Mobiltelefons

    公开(公告)号：EP1381242A2

    公开(公告)日：2004-01-14

    申请号：EP03014057.8

    申请日：2003-06-23

    Applicant: STMicroelectronics S.r.l.

    Inventor： Pau, Danilo ,  Alfonso, Daniele ,  Piccinelli, Emiliano ,  Signorelli, Tiziana

    IPC: H04N9/64 ,  G09G5/36

    CPC classification number: G09G3/3611 ,  G09G3/3688 ,  G09G5/363 ,  G09G2340/02 ,  G09G2340/06 ,  H04N9/64

    Abstract: An RGB digital video signal destined to be displayed on a display such as a liquid crystal display (LCD) is converted from the RGB colour space to the YUV colour space. The signal converted into the YUV colour space is subjected to at least a processing operation selected among a sub-sampling operation (24) and a data compression operation (26). The signal is then stored in a memory and the signal read from said memory (12) is then subjected to at least a return operation (28, 30) complementary to the aforesaid processing operation (24, 26). The signal subjected to the aforesaid return operation is lastly reconverted from the YUV colour space to the RGB colour space, thus being susceptible to be displayed on the display.

    Abstract translation: 将要显示在液晶显示器（LCD）的显示器上的RGB数字视频信号从RGB色彩空间转换为YUV色彩空间。 转换成YUV色彩空间的信号至少经受从子采样操作（24）和数据压缩操作（26）中选择的处理操作。 然后将信号存储在存储器中，然后从所述存储器（12）读取的信号至少经受与上述处理操作（24,26）互补的至少一个返回操作（28,30）。 经过上述返回操作的信号最后从YUV颜色空间重新转换为RGB颜色空间，因此易于显示在显示器上。

    Process and apparatus for the compression of digital video signals, a system and a computer program product therefor
    10.
    发明公开
    Process and apparatus for the compression of digital video signals, a system and a computer program product therefor 审中-公开
    压缩的数字视频信号的方法和系统以及计算机程序产品，用于

    公开(公告)号：EP1296524A1

    公开(公告)日：2003-03-26

    申请号：EP01830597.9

    申请日：2001-09-20

    Applicant: STMicroelectronics S.r.l.

    Inventor： Bartolucci, Vilim ,  Pau, Danilo ,  Piccinelli, Emiliano

    IPC: H04N7/28 ,  H04N7/50

    CPC classification number: G06T9/008 ,  H04N19/124 ,  H04N19/139 ,  H04N19/14 ,  H04N19/15 ,  H04N19/152 ,  H04N19/17 ,  H04N19/174 ,  H04N19/176 ,  H04N19/61 ,  H04N19/94

    Abstract: A process for encoding digital video signals (IS) organized in frames (12) comprises the operations of dividing said frames into blocks starting from macroblocks subjected to motion-compensation (13, 14) and applying to said blocks a discrete cosine transform (15) in such a way as to generate respective sets of coefficients. The said sets of coefficients are then assembled (20) by being organized into sets of vectors (X) by means of masking (M 1 , M 2 , M 3 , M 4 ). Once the variance of the vectors has been detected (214), the vectors themselves are quantized (217 to 220) on a number of available bits by means of a pyramid vector quantizer (22), associating to the vectors respective quantization pyramids having given sizes according to the variance detected and to the number of available bits. Finally, the vectors are encoded with respective codewords.

    Abstract translation: （IS）组织的一种用于编码数字视频信号处理中的帧（12）包括将所述帧到从经过运动补偿（13，14）的宏块开始，并施加到所述块的离散余弦变换块（15）的操作 在寻求一种方式，以产生respectivement组系数。 系数的所述组，然后通过掩模（M1，M2，M3，M4）的借助于被组织成矢量集（X）的组装（20）。 一旦向量的方差已经检测（214），所述载体本身是由一个金字塔矢量量化器（22）的方式量化（217至220）上的多个可用的位，缔合到载体respectivement量化金字塔具有给定尺寸的 gemäß检测到的方差和可用数位的数目。 最后，将载体与编码码字respectivement。

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