Abstract:
A memory device comprises a plurality of independent memory sectors, external address signal inputs (2) for receiving external address signals (A0-A17) for addressing individual memory locations of the memory device, the external address signals (A0-A17) comprising external memory sector address signals (A12-A17) allowing for individually addressing each memory sector, and a memory sector selection means (11) for selecting one of the plurality of memory sectors according to a value of the external memory sector address signals (A12-A17). A first and a second alternative internal memory sector address signal paths (6,7) are provided for supplying the external memory sector address signals (A12-A17) to the memory sector selection means (11), the first path (6) providing no logic inversion and the second path (7) providing logic inversion. Programmable means (12) allows for activating either one or the other of the first and second internal memory sector address signal paths (6,7), so that a position of each memory sector in a space of values (00000h - 3FFFFh) of the external address signals (A0-A17) can be changed by activating either one or the other of the first and second internal memory sector address signal paths (6,7).