公开(公告)号：JPS59198728A

公开(公告)日：1984-11-10

申请号：JP7350883

申请日：1983-04-25

Applicant: Sharp Corp

Inventor： INOUE YUKIHIRO ,  OZAWA KAZUHITO

IPC: H05K3/32 ,  H01B1/20 ,  H01L21/60

CPC classification number: H01L24/81 ,  H01L2224/16 ,  H01L2224/274 ,  H01L2224/81801 ,  H01L2924/01013 ,  H01L2924/01047 ,  H01L2924/014

Abstract: PURPOSE:To enable to fit an electronic parts at the low temperature of the degree of 150 deg.C, and moreover regardless of a substrate material and a wiring material by a method wherein the electronic parts and the substrate are connected using a heat-sealing agent mixed with electrically-conductive particles. CONSTITUTION:An LSI wafer 7 furnished with Al pads 4 is heated at the degree of 150 deg.C, and a heat-sealing agent 5 is coated on the surface thereof at the degree of 20-50mum using a roller. Then a mask 8 formed by perforating the parts to face to the Al pads 4 is put on the coated heat-sealing agent 5, and after Ag powder 6 is scattered in the perforations thereof, heating is applied to make the Ag powder 6 to be settled. The wafer is cut at the parts shown with arrow marks to obtain LSI chips 3 adhered with the heat-sealing agent 5 and formed with the concentrated Ag powder at the parts corresponding to the Al pads 4. The LSI chip 3 obtained in such a manner is made to come in contact with the wiring 2 of a substrate 1 placing the heat-sealing agent 5 down, and a soldering iron heated at 150 deg.C is pressed by pressure of 20kg/cm from the upper part of the LSI chip 3 to attain bonding.

Abstract translation: 目的：为了能够在150℃的低温下配合电子部件，而且不管基板材料和布线材料如何，其中电子部件和基板使用热封 试剂与导电颗粒混合。 构成：将装有铝焊盘4的LSI晶片7加热到150度的程度，使用辊子以20〜50μm的程度在其表面上涂布热封剂5。 然后，通过将部件面对Al焊盘4形成的掩模8放在涂覆的热密封剂5上，并且在Ag粉末6散布在其穿孔中之后，施加加热以使Ag粉末6为 入驻。 在用箭头标记的部分切割晶片，以获得粘附有热密封剂5的LSI芯片3，并且在与Al焊盘4相对应的部分处形成浓缩的Ag粉末。以这种方式获得的LSI芯片3 使其与放置热封剂5的基板1的布线2接触，并且将加热到150℃的烙铁从20kg / cm 2的压力从上部 LSI芯片3进行接合。

公开(公告)号：JPS59195837A

公开(公告)日：1984-11-07

申请号：JP7102083

申请日：1983-04-21

Applicant: Sharp Corp

Inventor： KONNO YOSHITSUGU ,  OZAWA KAZUHITO ,  KITANISHI KANETOMO ,  SHINO KATSUHIDE ,  INOUE YUKIHIRO ,  OOKITA YOSHINORI ,  NAKAO KAZUHIRO ,  KOMAKI SHIGEKI

IPC: H05K3/32 ,  H01B1/22 ,  H01L21/60 ,  H01L23/482

CPC classification number: H01L23/4828 ,  H01L24/27 ,  H01L24/29 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/16 ,  H01L2224/274 ,  H01L2224/2919 ,  H01L2224/81801 ,  H01L2224/83101 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/838 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/14 ,  H01L2924/3025 ,  Y10T156/1062 ,  Y10T156/1077 ,  Y10T156/1089 ,  H01L2924/00

Abstract: PURPOSE:To enable the bonding of LSI without selecting the materials for a circuit board and a wiring of the circuit board by bonding the LSI chip to the board with a heat-seal agent including conductive particles such as Ag powder. CONSTITUTION:An Al pad 2 of the LSI chip 1 and a wiring 5 on a circuit board 6 are made to be electrically communicant with each other by Ag powder 8 in a heat-seal agent 7. For example, a wafer 9 including the pads 2 is coated with the heat-seal agent 7 on which the Ag powder 8 is dispersed uniformly. After that, the Ag powder 8 precipitates in the heat-seal agent 7. At this time, thickness of the heat-seal agent is 25mum and diameter of a particle of the Ag powder is 25mum and the dispersion distribution is 300 particles/mm. . After that, the part designated by the arrow is subjected to dicing and is then bonded to the wiring 5 on the circuit board 6. For the bonding, a soldering iron heated to 150 deg.C applys a pressure of 20kgr/cm for 5sec.

Abstract translation: 目的：通过使用包含导电性粒子（如Ag粉末）的热封装置将LSI芯片与板接合，从而不需要选择电路板的材料和电路板的布线来实现LSI的接合。 构成：将LSI芯片1的Al焊盘2和电路板6上的布线5通过Ag粉末8在热密封剂7中彼此电连通。例如，包括焊盘的晶片9 2涂覆有均匀分散有Ag粉末8的热封剂7。 之后，Ag粉末8在热封剂7中析出。此时，热封剂的厚度为25μm，Ag粉末的粒径为25μm，分散分布为300个/ mm。 <2>。 之后，用箭头指定的部分进行切割，然后与电路板6上的布线5接合。对于接合，加热至150℃的烙铁施加20kgr / cm 2的压力 5秒钟

公开(公告)号：JPS5936946A

公开(公告)日：1984-02-29

申请号：JP14738782

申请日：1982-08-24

Applicant: Sharp Corp

Inventor： INOUE YUKIHIRO

IPC: H01L23/02

CPC classification number: H01L23/02 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2924/00014

Abstract: PURPOSE:To facilitate the exchange of chips and largely improve the impact resistance of the chip and bonding parts by a method wherein a bonded LSI chip is molded with a heat shrinkable film. CONSTITUTION:Projection pieces 10 are provided in the aperture end side of a frame body 9. The projection pieces 10 are bent and provisionally fixed after insertion through the through holes provided in a substrate 1, when the frame body 9 is put over the LSI chip 4. For an electronic component, the frame body 9 is put over the bonded LSI chip 4, and the heat shrinkable film 8 is molded from above it. The impact from the outside is absorbed by this frame body 9, and the removal of the frame body 9 by exfoliating the film 8 enables to easily exchange the LSI chip 4.

Abstract translation: 目的：为了促进芯片的交换，并且通过利用热收缩膜模制粘接的LSI芯片的方法，大大提高了芯片和接合部件的耐冲击性。 构成：投影片10设置在框体9的开口端侧。当框架体9放置在LSI芯片上时，突出片10在穿过设置在基板1中的通孔插入之后被弯曲和临时固定 对于电子部件，将框体9放置在结合的LSI芯片4上，并且从其上方模制热收缩膜8。 由该框体9吸收来自外部的冲击，通过剥离胶片8来移除框体9能够容易地更换LSI芯片4。

公开(公告)号：JPS6177920A

公开(公告)日：1986-04-21

申请号：JP19929184

申请日：1984-09-22

Applicant: Sharp Corp

Inventor： OKAJIMA YOSHIO ,  INOUE YUKIHIRO ,  WASHITSUKA ISAMU

IPC: G06F3/041 ,  G06F3/033 ,  G06F3/038 ,  G06F3/048 ,  G06K11/06 ,  G09G3/36

CPC classification number: G09G3/3644 ,  G06F3/0412 ,  G06F3/0488

Abstract: PURPOSE: To reduce the load of an operator and to ensure the efficient and smooth operations by displaying the input characters with low duty at the relevant partial display area of a liquid crystal display device within a display area where the input operation is carried out.
CONSTITUTION: The duty is increased with reduction of contrast on a display screen in a state where the displays are carried out over the partial display areas A and B. Thus a short circuit is secured between a fixed contact 20 and a common contact 17 of a switch SW1 of a switching element 15 by a control circuit 6. While a common contact 23 of switch SW2 has a short circuit with a fixed contact 26. As a result, the selection voltage is applied to each of common electrodes P1WPn of an area A in a cycle T, and the time T/n is set for the selection voltage waveform applied to the electrodes P1WPn respectively when the display is carried out in the area A. While the duty is comparatively small and set at 1/n and the contrast is improved at the area A. In this case, no display is carried out in the area B and only the area B is activated.
COPYRIGHT: (C)1986,JPO&Japio

Abstract translation: 目的：为了减少操作员的负担，并且通过在执行输入操作的显示区域内的液晶显示装置的相关部分显示区域上显示低占空比的输入字符来确保高效和平滑的操作。 构成：在部分显示区域A和B上进行显示的状态下，显示屏幕上的对比度降低，占空比增加。因此，在固定触点20和公共触点17之间确保短路 开关元件15的开关SW1由控制电路6连接。开关SW2的公共触点23与固定触点26发生短路。结果，将选择电压施加到开关元件15的公共电极P1-Pn 区域A在周期T中分别设定时间T / n，并且在区域A中执行显示时分别对施加到电极P1-Pn的选择电压波形设定时间T / n。尽管占空比较小并且设定为1 / n，区域A的对比度得到改善。在这种情况下，在区域B中不进行显示，只有区域B被激活。

公开(公告)号：JPS59158537A

公开(公告)日：1984-09-08

申请号：JP3411083

申请日：1983-02-28

Applicant: Sharp Corp

Inventor： INOUE YUKIHIRO

IPC: H01L21/60 ,  H01L21/92

CPC classification number: H01L24/81 ,  H01L2224/11 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/81191 ,  H01L2224/81801 ,  H01L2924/01013 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/00012

Abstract: PURPOSE:To prevent the formation of a bump part on the pad electrode of a defective LSI chip as well as to unnecessitate a wafer cleaning process by a method wherein a bump part is formed on a flexible film in advance, and then the bump part, an electronic part and a substrate are connected by bonding. CONSTITUTION:An Al film is laminated on a film 14, a flexible film 11 of insulating property consisting of photo-curing resin and the like is coated on the Al film, and a hole 15 to be used for formation of a bump is provided. Besides, an Al film 8, an Ni film 9 and a Pb/Sn film 10 are formed by plating. Subsequently, a supporting film 12 is stuck, and the film 14 is exfoliated. Then, after the pad electrode 2 of LSI chip 1 has been stuck to the Al film 8 which constitutes the bump part formed on the flexible film 11, the supporting film 12 is exfoliated, and the flexible film 11 is removed. Subsequently, a bonding connection is performd utilizing solder 10 which constitutes the bump part of the wiring conductor 4 of the hard material 3.

Abstract translation: 目的：为了防止在缺陷LSI芯片的焊盘电极上形成凸起部分，并且通过其中预先在柔性膜上形成凸起部分然后突起部分的方法来不必要地进行晶片清洁处理， 电子部件和基板通过接合连接。 构成：将Al膜层压在膜14上，将由光固化树脂等构成的绝缘性的柔性膜11涂覆在Al膜上，设置用于形成凸块的孔15。 此外，通过电镀形成Al膜8，Ni膜9和Pb / Sn膜10。 随后，支撑膜12被卡住，并且膜14被剥离。 然后，在将LSI芯片1的焊盘电极2粘贴在构成形成在柔性膜11上的突起部的Al膜8之后，将支撑膜12剥离，并且去除柔性膜11。 随后，使用构成硬质材料3的布线导体4的凸起部分的焊料10进行接合连接。

公开(公告)号：JPS5956745A

公开(公告)日：1984-04-02

申请号：JP16685482

申请日：1982-09-24

Applicant: Sharp Corp

Inventor： INOUE YUKIHIRO

IPC: H05K3/28 ,  H01L23/02 ,  H01L23/31

CPC classification number: H01L23/3164 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014

Abstract: PURPOSE:To simplify a coating treatment by a method wherein an LSI chip bonded on wirings of a substrate is coated with a heat-shrinkable film. CONSTITUTION:The wirings 2 are arranged on the substrate 1, and the LSI chip 4 is connected to the wirings 2 via a solder bump 6. The substrate 1 is coated with an overcoating agent 7. An electronic component formed in such a manner is coated with a heat-shrinkable tube 8 of polyethylene, etc., and shrink-closed by heating this tube 8. The moisture resistance property of the chip 4 is improved by coating the LSI chip 4 with the tube 8.

Abstract translation: 目的：通过以下方法简化涂布处理：其中，将基板上布线的LSI芯片涂敷在热收缩膜上。 构成：布线2布置在基板1上，并且LSI芯片4通过焊料凸块6连接到布线2.基板1涂覆有外涂层7.以这种方式形成的电子部件被涂覆 用聚乙烯等的热收缩管8，通过加热该管8进行收缩闭合。通过用管8涂布LSI芯片4，提高了芯片4的耐湿性。

公开(公告)号：JPS59121960A

公开(公告)日：1984-07-14

申请号：JP22878882

申请日：1982-12-28

Applicant: Sharp Corp

Inventor： INOUE YUKIHIRO

IPC: H05K1/18 ,  H01L21/60 ,  H01L23/495

CPC classification number: H01L23/49551 ,  H01L2224/16

Abstract: PURPOSE:To prevent a short circuit among wirings by properly bending the nose section of a lead frame and flip-chip bonding the electronic part with the bent section. CONSTITUTION:The nose sections of the lead frames 10 are bent and erected, the bonding sections of the lead frames are bent in L shape, and the electronic part 1 is connected to the bonding sections by solder bumps consisting of metallic films 2 and solder 3. Accordingly, since the lead frames are bent downwards from coupling sections by the solder bumps of the lead frames 10, sections corresponding to the end sections of the electronic part 1, excessive solder drops along the lead frames 10 even when excessive solder protrudes, but there is no danger of which excessive solder adheres on the edges of the electronic part 1 at an upper position.

Abstract translation: 目的：通过适当弯曲引线框架的鼻部部分并将电子部件与弯曲部分倒装连接，以防止布线之间发生短路。 构成：引线框架10的鼻部弯曲并竖立，引线框架的接合部分弯曲成L形，并且电子部件1通过由金属膜2和焊料3组成的焊料凸块连接到接合部分 因此，由于引线框架通过引线框架10的焊料凸块向下弯曲，所以与电子部件1的端部相对应的部分，即使过量的焊料突出，也会引起焊锡沿引线框架10的下降，但是 不存在在上位置处电子部件1的边缘上附着过多焊料的危险。

公开(公告)号：JPS5958843A

公开(公告)日：1984-04-04

申请号：JP17019482

申请日：1982-09-28

Applicant: Sharp Corp

Inventor： INOUE YUKIHIRO

IPC: H01L21/60 ,  H05K3/34 ,  H01L21/92

CPC classification number: H01L24/81 ,  H01L2224/81801 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/014 ,  H05K3/3436 ,  H05K3/3457

Abstract: PURPOSE:To obtain the solder bump with sufficient height and a stopper by superposing high melting-point solder and low melting-point solder on a metallic layer on the pad of the chip in succession through a dipping method. CONSTITUTION:A Cr-Cu layer 2 is formed to an LSI chip 1, the solder 3 of Sn10-Pb90 of the high melting point is attached and cured and a stand-off filling the role of the stopper is formed, and the low melting-point solder 4 of Sn63- Pb37 is attached and cured. When a temperature at a time when the chip and a wiring 6 on a substrate 5 are bonded is brought to approximately 240 deg.C, the solder 2 does not melt and functions as the stopper, and the chip is bonded by the solder 4. In the manufacture of the bump for the flip chip according to the constitution, a plating process, etc. are unnecessitated, the solder bumps with sifficient height and the stoppers can be formed, and cost can be reduced.

Abstract translation: 目的：通过浸渍法连续地在芯片焊盘上的金属层上叠加高熔点焊料和低熔点焊料，以获得具有足够高度的焊料凸块和止动件。 构成：向LSI芯片1形成Cr-Cu层2，将高熔点的Sn10-Pb90的焊锡3附着固化，形成止挡件的间隙填充，低熔点 Sn63-Pb37的点焊4焊接固化。 当芯片和基板5上的布线6接合时的温度达到约240℃时，焊料2不熔化并用作止动件，并且芯片通过焊料4接合。 在根据结构制造用于倒装芯片的凸块时，不需要电镀处理等，可以形成具有高度的焊料凸块和止动件，并且可以降低成本。

公开(公告)号：JPS5919179A

公开(公告)日：1984-01-31

申请号：JP12943982

申请日：1982-07-23

Applicant: Sharp Corp

Inventor： INOUE YUKIHIRO

IPC: H01L49/00 ,  B41J2/335 ,  B41J2/345

CPC classification number: B41J2/345

Abstract: PURPOSE:To provide the titled head simple in manipulation and low in cost, obtained by a simplified manufacturing process wherein a substrate is formed into the electrode pattern of the head by punching processing and a conductor and a resistor are appropriately formed to said substrate by a mask having a simple shape. CONSTITUTION:An insulating substrate 21 comprising ceramics is formed into the electrode pattern 22 of a head by punching processing and a mask 23 having a long opening 24 provided thereto by drilling so as to expose a part opposed to a resistor forming part is applied onto the substrate 21 with the electrode pattern 22 to form a resistor 25 by the vapor deposition of tantalum nitride. In the next step, alminum is vapor deposited on the resistor 25 to which a rectangular mask 26 having a width slightly narrower than that of the long opening of said mask 23 is formed to form a conductor 27 on the electrode pattern 22. At last, the conductor 27 and the resistor 25 are coated with an insulating film 28 comprising silicon carbide to obtain an objective thermal printer head.

Abstract translation: 目的：为了提供操作简便，成本低廉的标题头，通过简化的制造工艺获得，其中通过冲压加工将衬底形成为头部的电极图案，并且导体和电阻器通过一个 面具有简单的形状。 构成：通过冲压加工将包括陶瓷的绝缘基板21形成在头部的电极图案22中，并且通过钻孔将具有设置在其上的长开口24的掩模23暴露于与电阻器形成部分相对的部分的掩模23被施加到 衬底21与电极图案22通过氮化钽的气相沉积形成电阻器25。 在下一步骤中，在电阻器25上蒸镀淀粉，形成宽度略小于所述掩模23的长孔的宽度的矩形掩模26，以在电极图案22上形成导体27。 导体27和电阻器25涂覆有包含碳化硅的绝缘膜28，以获得目标热敏打印头。

公开(公告)号：JPS58182238A

公开(公告)日：1983-10-25

申请号：JP6615482

申请日：1982-04-19

Applicant: Sharp Corp

Inventor： INOUE YUKIHIRO

IPC: H01L23/50 ,  H01L21/60

CPC classification number: H01L2224/16 ,  H01L2224/48 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: PURPOSE:To realize cost down through sealing by resin after changing Au plating to Sn plating by flip chip junction of an LSI chip on a lead frame. CONSTITUTION:Resist masks 10, 11 are selectively formed in both sides of metal plate 9 and these are etched, thereby forming a lead frame 5 where only the junction area is made thinner. A lead frame 5 is fixed to a supporting means, an LSI chip 6 is directly fixed by the flip chip junction method and it is sealed by resin 9. In such a structure, Au plating is unnecessary and the Sn plating is enough for the solder bump and accordingly cost reduction can be realized. In addition, area required for junction is reduced also realizing reduction in size.

Abstract translation: 目的：通过在引线框架上的LSI芯片的倒装芯片接合将Au镀层更换为Sn镀层后，通过树脂密封实现成本降低。 构成：在金属板9的两侧选择性地形成抗蚀剂掩模10,11，这些被蚀刻，从而形成引线框架5，其中只有结合区域变薄。 引线框架5固定在支撑装置上，LSI芯片6通过倒装芯片接合方法直接固定，并被树脂9密封。在这种结构中，不需要镀Au，并且Sn镀层对于焊料是足够的 可以实现碰撞并因此降低成本。 另外，接合所需的面积减小也实现了尺寸的减小。