MULTIPROCESSOR MULTISYSTEM COMMUNICATIONS NETWORK

    公开(公告)号:CA1210872A

    公开(公告)日:1986-09-02

    申请号:CA439851

    申请日:1983-10-27

    Abstract: A plurality of multiprocessor systems is arranged in a high speed network to allow any processor in one system to communicate with any processor in another system. The network may be configured as a multi-node dual bidirectional ring having a multiprocessor system at each node. Packets of information may be passed around the ring in either of two directions and are temporarily stored in buffer memory locations dedicated to a selected destination processor in a selected direction between each successive transfer between neighboring nodes. The buffer locations are managed so that a node can request an adjacent node to stop transmitting packets if the buffer is becoming full from that direction and request resumption of transmission of packets as the buffer empties.

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