公开(公告)号：CA1203027A

公开(公告)日：1986-04-08

申请号：CA419694

申请日：1983-01-18

Applicant: TANDEM COMPUTERS INC

Inventor： HUMPHREY RICHARD A ,  FISHER STEVEN D ,  WIERENGA STEVEN W ,  SJOSTEDT JON

IPC: G06F12/00 ,  G06F11/00 ,  G06F11/10 ,  G06F11/30 ,  G06F12/16 ,  G11C29/02 ,  G06F13/16 ,  G11C29/00

Abstract: A memory system for a computer detects data errors, address errors and operation errors to increase the reliability of data stored in the memory system. Address errors are detected by encoding address parity information into the data check field of each memory location. A signal is generated in each memory module indicating the status of operations of that memory module and is transmitted to the processor subsystem of the computer for comparison with a signal indicating the status of operations of the processor subsystem to insure that all memory modules and the memory control in the processor are receiving the same commands.