公开(公告)号：EP0131375B1

公开(公告)日：1988-10-12

申请号：EP84303770.6

申请日：1984-06-05

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Buol, Douglas A. ,  Pattschull, John W. ,  Mize, Dean N. ,  Wallace, Robert M.

IPC: G01R1/073 ,  G01R31/28

CPC classification number: G01R31/2891

公开(公告)号：EP0686992A1

公开(公告)日：1995-12-13

申请号：EP95304000.3

申请日：1995-06-09

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Wallace, Robert M. ,  Gnade, Bruce E. ,  Shen, Chi-Cheong ,  Levine, Jules D. ,  Taylor, Robert H.

IPC: H01J29/94

CPC classification number: H01J29/94 ,  H01J29/085 ,  H01J2329/00

Abstract: An anode plate 40 for use in a field emission flat panel display device comprises a transparent planar substrate 42 having a plurality of electrically conductive, parallel stripes 46 comprising the anode electrode of the device, which are covered by phosphors 48 R , 48 G and 48 B , and a gettering material 52 in the interstices of the stripes 46. The gettering material 52 is preferably selected from among zirconiumvanadium-iron and barium. The getter 52 may be thermally reactivated by passing a current through it at selected times, or by electron bombardment from microtips on the emitter substrate. The getter 52 may be formed on a substantially opaque, electrically insulating material 50 affixed to substrate 42 in the spaces formed between conductors 46, which acts as a barrier to the passage of ambient light into and out of the device. Methods of fabricating the getter stripes 52 on the anode plate 40 are disclosed.

Abstract translation: 用于场致发射平板显示装置的阳极板40包括具有多个导电平行条46的透明平面基板42，平行条46包括被荧光体48R，48G和48B覆盖的器件的阳极电极，以及 在条46的间隙中的吸气材料52.吸气材料52优选选自锆钒铁和钡。 吸气剂52可以通过在选定的时间使电流通过它而被热再激活，或者通过来自发射极基板上的微尖端的电子轰击而被热激活。 吸气剂52可以形成在基体42上的基本上不透明的电绝缘材料50上，该基体42在导体46之间形成的空间中固定到基体42上，其充当对环境光进入和离开装置的屏障。 公开了在阳极板40上制造吸气条52的方法。

公开(公告)号：EP0131375A1

公开(公告)日：1985-01-16

申请号：EP84303770.6

申请日：1984-06-05

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Buol, Douglas A. ,  Pattschull, John W. ,  Mize, Dean N. ,  Wallace, Robert M.

IPC: G01R1/073 ,  G01R31/28

CPC classification number: G01R31/2891

Abstract: A system for statically and dynamically testing an integrated circuit die in wafer form at various temperatures includes a multilayer support fixture 10 in which the probes 50, the static test switching circuitry, and the dynamic test switching circuitry are mounted on separate, spaced apart, planar layers detachably connected to one another, the probe 50 and the probe support board 40 being formed of material having a low temperature coefficient of thermal expansion. A heated/cooled wafer positioning chuck 12 controls the temperature of the wafer 14 thereon during static and dynamic testing.

公开(公告)号：EP0828287A2

公开(公告)日：1998-03-11

申请号：EP97305923.1

申请日：1997-08-05

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Wilk, Glenn D. ,  Wallace, Robert M. ,  Wei, Yi, Motorola Flat Panel Display Division

IPC: H01L21/20 ,  H01L21/306

CPC classification number: H01L21/02043 ,  H01L21/02046 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/02301 ,  H01L21/02312 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/31662 ,  Y10S438/974

Abstract: A method of preparing a surface for and forming a thin film on a single-crystal silicon substrate is disclosed. One embodiment of his method comprises forming an oxidized silicon layer (which may be a native oxide) on at least one region of the substrate, and thermally annealing the substrate in a vacuum while supplying a silicon-containing flux to the oxide surface, thus removing the oxidized silicon layer. Preferably, the thin film is formed immediately after removal of the oxidized silicon layer. The silicon-containing flux is preferably insufficient to deposit a silicon-containing layer on top of the oxidized silicon layer, and yet sufficient to substantially inhibit an SiO-forming reaction between the silicon substrate and the oxidized silicon layer. The method of the invention allows for growth or deposition of films which have exceptionally smooth interfaces (less than 0.1 nm rms roughness) with the underlying silicon substrate at temperatures less than 800°C, and is ideally suited for deposition of ultrathin films having thicknesses less than about 5 nm.

Abstract translation: 公开了一种制备在单晶硅衬底上形成薄膜的表面的方法。 他的方法的一个实施例包括在衬底的至少一个区域上形成氧化硅层（其可以是天然氧化物），并且在真空中对衬底进行热退火，同时向氧化物表面提供含硅助焊剂，从而去除 氧化硅层。 优选地，在去除氧化硅层之后立即形成薄膜。 含硅焊剂优选不足以在氧化硅层的顶部上沉积含硅层，并且还足以基本上抑制硅衬底和氧化硅层之间的SiO形成反应。 本发明的方法允许在低于800℃的温度下与下面的硅衬底具有非常平滑的界面（小于0.1nm rms粗糙度）的生长或沉积，并且理想地适用于沉积厚度较小的超薄膜 比约5nm。

公开(公告)号：EP0746013A2

公开(公告)日：1996-12-04

申请号：EP96108733.5

申请日：1996-05-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Wallace, Robert M. ,  Douglas, Monte A.

IPC: H01L21/306 ,  G02B26/08

CPC classification number: B81C1/0096 ,  B08B7/00 ,  B08B7/0021 ,  B81B3/0005 ,  B81C1/00857 ,  B81C2201/112 ,  B81C2201/117 ,  G02B26/0841

Abstract: A method of cleaning and treating a device, including those of the micromechanical (10) and semiconductor type. The surface of a device, such as the landing electrode (22) of a digital micromirror device (10), is first cleaned with a supercritical fluid (SCF) in a chamber (50) to remove soluble chemical compounds, and then maintained in the SCF chamber until and during the subsequent passivation step. Passivants including PFDA and PFPE are suitable for the present invention. By maintaining the device in the SCF chamber, and without exposing the device to, for instance, the ambient of a clean room, organic and inorganic contaminants cannot be deposited upon the cleaned surface prior to the passivation step. The present invention derives technical advantages by providing an improved passivated surface that is suited to extend the useful operation life of devices, including those of the micromechanical type, reducing stiction forces between contacting elements such as a mirror and its landing electrode. The present invention is also suitable for cleaning and passivating other surfaces including a surface of semiconductor wafers, and the surface of a hard disk memory drive.

Abstract translation: 一种清洁和处理包括微机械（10）和半导体类型的装置的方法。 首先在腔室（50）中用超临界流体（SCF）清洁诸如数字微镜装置（10）的着陆电极（22）的装置的表面以除去可溶性化合物，然后保持在 SCF室直到和在随后的钝化步骤期间。 包括PFDA和PFPE的钝化剂适用于本发明。 通过将装置保持在SCF室中，并且不将装置暴露于例如洁净室的环境中，在钝化步骤之前，有机和无机污染物不能沉积在清洁的表面上。 本发明通过提供一种改进的钝化表面来提供技术优点，该钝化表面适于延长包括微机械型的装置的有用使用寿命，从而降低诸如反射镜和其着陆电极的接触元件之间的静摩擦力。 本发明还适用于清洁和钝化包括半导体晶片的表面的其它表面以及硬盘存储器驱动器的表面。

公开(公告)号：EP0690330A1

公开(公告)日：1996-01-03

申请号：EP95110149.2

申请日：1995-06-29

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Wallace, Robert M. ,  Gnade, Bruce E. ,  Webb, Douglas A.

IPC: G02B26/08 ,  H01H1/00

CPC classification number: B81C1/0096 ,  B81B3/0005 ,  B82Y10/00 ,  B82Y30/00 ,  B82Y40/00 ,  G02B26/0841 ,  H01H1/0036

Abstract: A method of forming of a monomolecular layer (monolayer) (19) for surfaces of contacting elements (17) of a micro-mechanical device (10). The method includes providing a coordinating substance on the surface of one of the contacting elements (13), then depositing a precursor substance (51) for formation of the monolayer (19). The coordinating substance (33) and the precursor substance (51) are chosen based on molecular recognition chemistry.

Abstract translation: 形成用于微机械装置（10）的接触元件（17）的表面的单分子层（单层）（19）的方法。 该方法包括在一个接触元件（13）的表面上提供配位物质，然后沉积用于形成单层（19）的前体物质（51）。 基于分子识别化学选择配位物质（33）和前体物质（51）。 $$

公开(公告)号：EP1298712B1

公开(公告)日：2010-12-29

申请号：EP02021976.2

申请日：2002-09-30

Applicant: Texas Instruments Incorporated

Inventor： Wallace, Robert M. ,  Gnade, Bruce E.

IPC: H01L21/28 ,  H01L29/51 ,  H01L29/10 ,  H01L21/8238

CPC classification number: H01L21/28185 ,  H01L21/28008 ,  H01L21/28088 ,  H01L21/28114 ,  H01L21/28194 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823842 ,  H01L21/823857 ,  H01L29/1054 ,  H01L29/42376 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/66545

公开(公告)号：EP1298712A2

公开(公告)日：2003-04-02

申请号：EP02021976.2

申请日：2002-09-30

Applicant: Texas Instruments Incorporated

Inventor： Wallace, Robert M. ,  Gnade, Bruce E.

IPC: H01L21/28 ,  H01L29/51 ,  H01L29/423 ,  H01L29/10 ,  H01L29/49

CPC classification number: H01L21/28185 ,  H01L21/28008 ,  H01L21/28088 ,  H01L21/28114 ,  H01L21/28194 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823842 ,  H01L21/823857 ,  H01L29/1054 ,  H01L29/42376 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/66545

Abstract: CMOS and BiCMOS structures with a silicate-germanate gate dielectric on SiGe PMOS areas and Si NMOS areas plus HBTs with Si-SiGe emitter-base junctions.

Abstract translation: 在SiGe PMOS区域和Si NMOS区域加上具有Si-SiGe发射极 - 基极结的HBT的硅酸盐 - 锗酸盐栅极电介质的CMOS和BiCMOS结构。

公开(公告)号：EP0689076B1

公开(公告)日：2002-01-02

申请号：EP95109614.8

申请日：1995-06-21

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Douglas, Monte A. ,  Wallace, Robert M.

IPC: G02B26/08 ,  H01H1/00

CPC classification number: B81C1/0096 ,  B81C1/00968 ,  B81C2201/117 ,  G02B26/0841 ,  H01H1/0036

公开(公告)号：EP0911869A2

公开(公告)日：1999-04-28

申请号：EP98308635.6

申请日：1998-10-22

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Wilk, Glen D. ,  Wallace, Robert M. ,  Brar, Berinder P.S.

IPC: H01L21/28 ,  H01L29/51

CPC classification number: H01L29/51 ,  H01L21/28167

Abstract: This invention pertains generally to forming thin oxides at low temperatures, and more particularly to forming uniformly thick, thin oxides. We disclose a low temperature method for forming a thin, uniform oxide 16 on a silicon surface 12. This method includes providing a partially completed integrated circuit on a semiconductor substrate 10 with a clean, hydrogen terminated or atomically flat, silicon surface 12; and stabilizing the substrate at a first temperature. The method further includes exposing the silicon surface to an atmosphere 14 including ozone, while maintaining the substrate 10 at the first temperature. In this method, the exposing step creates a uniformly thick, oxide film 16. This method is suitable for room temperature processing.

Abstract translation: 本发明一般涉及在低温下形成薄氧化物，尤其涉及形成均匀的厚的氧化物。 我们公开了一种用于在硅表面12上形成薄均匀氧化物16的低温方法。该方法包括在半导体衬底10上提供部分完成的集成电路，其具有清洁的，氢封端或原子平坦的硅表面12; 以及在第一温度下稳定所述衬底。 该方法还包括将硅表面暴露于包括臭氧的气氛14，同时将衬底10保持在第一温度。 在该方法中，曝光步骤产生均匀厚的氧化膜16.该方法适用于室温处理。