NEURAL NETWORK AND ITS INFORMATION PROCESSING METHOD, INFORMATION PROCESSING SYSTEM

    公开(公告)号:US20210049448A1

    公开(公告)日:2021-02-18

    申请号:US16964435

    申请日:2018-02-24

    Abstract: A neural network and its information processing method, information processing system. The neural network includes N layers of neuron layers connected to each other one by one, except for a first layer of neuron layer, each of the neurons of the other neuron layers includes m dendritic units and one hippocampal unit; the dendritic unit includes a resistance value graded device, the hippocampal unit includes a resistance value mutation device, and the m dendritic units can be provided with different threshold voltage or current, respectively; and the neurons on the nth layer neuron layer are connected to the m dendritic units of the neurons on the n+1th layer neuron layer; wherein N is an integer larger than 3, m is an integer larger than 1, n is an integer larger than 1 and less than N.

    NEURON SIMULATION CIRCUIT AND NEURAL NETWORK APPARATUS

    公开(公告)号:US20220207338A1

    公开(公告)日:2022-06-30

    申请号:US17560801

    申请日:2021-12-23

    Abstract: A neuron simulation circuit and a neural network apparatus. The neuron simulation circuit includes an operational amplifier, a first resistive device and a second resistive device. The operational amplifier includes a first input terminal, a second input terminal, and an output terminal. The first resistive device is connected between the first input terminal or the second input terminal of the operational amplifier and the output terminal of the operational amplifier. The second resistive device is connected between the output terminal of the operational amplifier and an output terminal of the neuron simulation circuit. The second resistive device includes a threshold switching memristor, and a first terminal of the threshold switching memristor is electrically connected with the output terminal of the neuron simulation circuit. At least one of the first resistive device and the second resistive device includes a dynamic memristor.

    MEMRISTOR AND PREPARATION METHOD THEREOF

    公开(公告)号:US20220093855A1

    公开(公告)日:2022-03-24

    申请号:US17477119

    申请日:2021-09-16

    Abstract: A memristor and a preparation method thereof are provided. The memristor includes at least one memristive unit, each of the at least one memristive unit includes a transistor and at least one memristive component, the transistor includes a source electrode and a drain electrode; and each of the at least one memristive component includes a first electrode, a resistive layer, a second electrode, and a passivation layer, the first electrode is electrically connected with the source electrode or the drain electrode; the resistive layer is provided between the first electrode and the second electrode; and the passivation layer at least covers a sidewall of the resistive layer.

    Circuit Structure and Driving Method Thereof, Neural Network

    公开(公告)号:US20210174173A1

    公开(公告)日:2021-06-10

    申请号:US16071985

    申请日:2017-11-14

    Abstract: A circuit structure and a driving method thereof, a neural network are disclosed. The circuit structure includes at least one circuit unit, each circuit unit includes a first group of resistive switching devices and a second group of resistive switching devices, the first group of resistive switching devices includes a resistance gradual-change device, the second group of resistive switching devices includes a resistance abrupt-change device, the first group of resistive switching devices and the second group of resistive switching devices are connected in series, in a case that no voltage is applied, a resistance value of the first group of resistive switching devices is larger than a resistance value of the second group of resistive switching devices. The circuit structure utilizes a resistance gradual-change device and a resistance abrupt-change device connected in series to form a neuron-like structure, so as to achieve to simulate functions of a human brain neuron.

    NANOWIRE TRANSISTOR AND MANUFACTURING METHOD THEREOF

    公开(公告)号:US20210184025A1

    公开(公告)日:2021-06-17

    申请号:US17058211

    申请日:2018-08-03

    Abstract: A nanowire transistor and a manufacture method thereof are provided. The nanowire transistor includes a semiconductor wire, a semiconductor layer, a source electrode and a drain electrode. The semiconductor wire includes a first semiconductor material and includes a source region, a drain region, and a channel region, along an axial direction of the semiconductor wire, the channel region is between the source region and the drain region; the semiconductor layer includes a second semiconductor material and covers the channel region of the semiconductor wire; the source electrode is in the source region of the semiconductor wire and is in direct contact with the source region of the semiconductor wire, and the drain electrode is in the drain region of the semiconductor wire and is in direct contact with the drain region of the semiconductor wire.

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