公开(公告)号：EP2647035A4

公开(公告)日：2015-04-08

申请号：EP11845971

申请日：2011-11-29

Applicant: UNIV NORTHEASTERN

Inventor： SIRMAN ASLI ,  BUSNAINA AHMED ,  YILMAZ CIHAN ,  HUANG JUN ,  SOMU SIVASUBRAMANIAN

IPC: H01L21/20 ,  B82Y40/00 ,  C25D13/00 ,  H01L21/02

CPC classification number: C25D13/22 ,  B82Y30/00 ,  B82Y40/00 ,  C09D5/4407 ,  C09D5/4488 ,  C09D125/06 ,  C25D13/04 ,  C25D13/12 ,  C25D13/20 ,  H01L21/0243 ,  H01L21/0259 ,  H01L21/02628 ,  H01L29/0665 ,  H05K1/0213 ,  H05K1/0306 ,  H05K1/092 ,  H05K3/1258 ,  Y10S977/882 ,  Y10S977/892

Abstract: A method for high rate assembly of nanoelements into two-dimensional void patterns on a non-conductive substrate surface utilizes an applied electric field to stabilize against forces resulting from pulling the substrate through the surface of a nanoelement suspension. The electric field contours emanating from a conductive layer in the substrate, covered by an insulating layer, are modified by a patterned photoresist layer, resulting in an increased driving force for nanoelements to migrate from a liquid suspension to voids on a patterned substrate having a non-conductive surface. The method can be used for the production of microscale and nanoscale circuits, sensors, and other electronic devices.

公开(公告)号：WO2016094384A3

公开(公告)日：2016-09-15

申请号：PCT/US2015064459

申请日：2015-12-08

Applicant: UNIV NORTHEASTERN

Inventor： SIRMAN ASLI ,  HALDER ADITI ,  BUSNAINA AHMED

IPC: B05D1/18 ,  B82Y40/00

CPC classification number: B22F7/04 ,  B05D1/202 ,  B22F2007/042 ,  B82Y30/00

Abstract: A technique for rapid large-scale assembly of monolayers and multilayers of nanoelements on a variety of different substrates is provided. The technique is based on self-assembly of nanoelements suspended at the interface between a polar solvent and a nonpolar solvent. The layer of nanoelements is collected onto a substrate at a shallow angle, forming a continuous monolayer or multilayer of nanoparticles which can be optionally patterned or can be transferred to other substrates to form components of nanoelectronics, optical devices, and sensors.

Abstract translation: 提供了用于在各种不同衬底上快速大规模组装纳米元件的单层和多层的技术。 该技术基于悬浮在极性溶剂和非极性溶剂之间界面上的纳米元件的自组装。 将纳米元件层以浅角度收集到衬底上，形成纳米颗粒的连续单层或多层，其可以任选地图案化或者可以转移到其他衬底以形成纳米电子器件，光学器件和传感器的组件。

公开(公告)号：WO2012075006A3

公开(公告)日：2014-04-10

申请号：PCT/US2011062395

申请日：2011-11-29

Applicant: UNIV NORTHEASTERN ,  SIRMAN ASLI ,  BUSNAINA AHMED ,  YILMAZ CIHAN ,  HUANG JUN ,  SOMU SIVASUBRAMANIAN

Inventor： SIRMAN ASLI ,  BUSNAINA AHMED ,  YILMAZ CIHAN ,  HUANG JUN ,  SOMU SIVASUBRAMANIAN

IPC: H01L21/20

CPC classification number: C25D13/22 ,  B82Y30/00 ,  B82Y40/00 ,  C09D5/4407 ,  C09D5/4488 ,  C09D125/06 ,  C25D13/04 ,  C25D13/12 ,  C25D13/20 ,  H01L21/0243 ,  H01L21/0259 ,  H01L21/02628 ,  H01L29/0665 ,  H05K1/0213 ,  H05K1/0306 ,  H05K1/092 ,  H05K3/1258 ,  Y10S977/882 ,  Y10S977/892

Abstract: A method for high rate assembly of nanoelements into two-dimensional void patterns on a non-conductive substrate surface utilizes an applied electric field to stabilize against forces resulting from pulling the substrate through the surface of a nanoelement suspension. The electric field contours emanating from a conductive layer in the substrate, covered by an insulating layer, are modified by a patterned photoresist layer, resulting in an increased driving force for nanoelements to migrate from a liquid suspension to voids on a patterned substrate having a non-conductive surface. The method can be used for the production of microscale and nanoscale circuits, sensors, and other electronic devices.

Abstract translation: 将纳米元件高速组装成非导电基底表面上的二维空穴图案的方法利用施加的电场来抵抗通过纳米元素悬浮液的表面拉动基底所产生的力。 由绝缘层覆盖的衬底中的导电层发出的电场轮廓由图案化的光致抗蚀剂层改变，导致纳米元件从液体悬浮液迁移到具有非绝缘层的图案化衬底上的空隙的驱动力增加， 导电表面。 该方法可用于生产微尺度和纳米级电路，传感器和其他电子设备。