公开(公告)号：US11792918B2

公开(公告)日：2023-10-17

申请号：US17455918

申请日：2021-11-21

Applicant: Unimicron Technology Corp.

Inventor： Pei-Wei Wang ,  Heng-Ming Nien ,  Ching-Sheng Chen ,  Yi-Pin Lin ,  Shih-Liang Cheng

IPC: H05K1/02 ,  H05K1/11

CPC classification number: H05K1/024 ,  H05K1/0222 ,  H05K1/112

Abstract: A co-axial structure includes a substrate, a first conductive structure, a second conductive structure, and an insulating layer. The substrate includes a first surface. The first conductive structure includes a first circuit deposited on the first surface and a first via penetrating the substrate. The second conductive structure includes a second circuit deposited on the first surface and a second via penetrating the substrate. The first via and the second via extend along a first direction. The first circuit and the second circuit extend along a second direction, and the second direction is perpendicular to the first direction. The insulating layer is located between the first via and the second via. The insulating layer includes a filler. The first conductive structure and the second conductive structure are electrically insulated. The first circuit and the second circuit are coplanar.

公开(公告)号：US11289413B2

公开(公告)日：2022-03-29

申请号：US16747548

申请日：2020-01-21

Applicant: Unimicron Technology Corp.

Inventor： Shih-Liang Cheng

IPC: H05K1/11 ,  H01L23/498 ,  H01L21/48 ,  H05K3/40

Abstract: A wiring board and a method of manufacturing the same are provided. The method includes the following steps. A substrate is provided. The substrate is perforated to form at least one through hole. A first conductive layer is integrally formed on a surface of the substrate and an inner wall of the through hole. An etch stop layer is formed on a portion of the first conductive layer on the surface of the substrate and another portion of the first conductive layer on the inner wall of the through hole. A second conductive layer is integrally formed on the etch stop layer and the first conductive layer on the inner wall of the through hole. A plug-hole column is formed by filling with a plugged-hole material in the through hole. The second conductive layer is removed. The etch stop layer is then removed.

公开(公告)号：US20190109017A1

公开(公告)日：2019-04-11

申请号：US15818777

申请日：2017-11-21

Applicant: Unimicron Technology Corp.

Inventor： Shih-Liang Cheng

IPC: H01L21/48 ,  H05K3/10 ,  H05K3/18

Abstract: A method for manufacturing conductive lines is provided. A first metal layer is formed over a carrier substrate. A second metal layer is formed over the first metal layer. A plurality of first conductive lines is formed on the second metal layer. A protective layer is formed on opposite sidewalls of the first conductive lines. An exposed portion of the second metal layer is removed to expose a portion of the first metal layer. The exposed portion of the first metal layer is removed, and the protective layer is removed.

公开(公告)号：US09578742B1

公开(公告)日：2017-02-21

申请号：US14821819

申请日：2015-08-10

Applicant: Unimicron Technology Corp.

Inventor： Shih-Liang Cheng ,  Dyi-Chung Hu ,  Yu-Hua Chen

IPC: H05K1/11 ,  H05K3/00 ,  H05K1/02 ,  H05K3/40 ,  H05K1/09 ,  H05K1/18

CPC classification number: H05K1/11 ,  H05K1/0298 ,  H05K1/182 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/007 ,  H05K3/0097 ,  H05K3/045 ,  H05K3/107 ,  H05K3/205 ,  H05K3/421 ,  H05K2201/0195 ,  H05K2203/025 ,  H05K2203/107 ,  H05K2203/1476

Abstract: A method for manufacturing a circuit board structure is provided. First, a first circuit layer is formed on a carrier. Then, a first dielectric layer is formed on the carrier and the first circuit layer. Thereafter, at least one first hole is formed in the first dielectric layer to expose a portion of the first circuit layer. Then, a second dielectric layer is formed on the first dielectric layer and the first circuit layer. Thereafter, at least one trench and at least one second hole are formed in the second dielectric layer, in which the trench exposes a portion of the first dielectric layer, and the second hole exposes the portion of the first circuit layer. The second hole is disposed in the first hole. Then, a metal layer is formed to fill the trench and the second hole.

Abstract translation: 提供一种制造电路板结构的方法。 首先，在载体上形成第一电路层。 然后，在载体和第一电路层上形成第一电介质层。 此后，在第一电介质层中形成至少一个第一孔以暴露第一电路层的一部分。 然后，在第一电介质层和第一电路层上形成第二电介质层。 此后，在第二电介质层中形成至少一个沟槽和至少一个第二孔，其中沟槽露出第一电介质层的一部分，并且第二孔露出第一电路层的部分。 第二孔设置在第一孔中。 然后，形成金属层以填充沟槽和第二孔。