公开(公告)号：WO2016190923A1

公开(公告)日：2016-12-01

申请号：PCT/US2016/016872

申请日：2016-02-05

Applicant: XILINX, INC.

Inventor： LIAO, Yu ,  ZHANG, Geoffrey ,  ZHANG, Hongtao ,  CHANG, Kun-yung ,  PHAM, Toan ,  WU, Zhaoyin, D.

IPC: H04L25/03

CPC classification number: H04L27/3809 ,  H04L25/03057 ,  H04L25/03885

Abstract: A receiver (100) relates generally to channel adaptation. In this receiver (100), a first signal processing block (101) is coupled to a communications channel (20). The first signal processing block (101) includes: an AGC block (102) and a CTLE block (103) for receiving a modulated signal (21) for providing an analog signal (104); an ADC (105) for converting the analog signal (104) to digital samples (106); and an FFE block (112) for equalizing the digital samples (106) to provide equalized samples (114). A second signal processing block (111) includes: a DFE block (113) for receiving the equalized samples (114) for providing re-equalized samples (116); and a slicer (123) coupled to the DFE block (113) for slicing the re-equalized samples (116). A receiver adaptation block (150) is coupled to the first signal processing block (101) and the second signal processing block (111). The receiver adaptation block (150) is configured for providing an AGC adaptation, a CTLE adaptation, and a slicer adaptation to the communications channel (20).

Abstract translation: 接收机（100）一般涉及信道适配。 在该接收机（100）中，第一信号处理块（101）耦合到通信信道（20）。 第一信号处理块（101）包括：AGC块（102）和用于接收用于提供模拟信号（104）的调制信号（21））的CTLE块（103）。 用于将模拟信号（104）转换成数字样本（106）的ADC（105）; 以及用于均衡数字样本（106）以提供均衡样本（114）的FFE块（112）。 第二信号处理块（111）包括：DFE块（113），用于接收用于提供重新均衡的样本（116）的均衡样本（114）; 以及耦合到所述DFE块（113）的限幅器（123），用于对所述重新平衡样本（116）进行切片。 接收机适配块（150）耦合到第一信号处理块（101）和第二信号处理块（111）。 接收机适配块（150）被配置用于提供AGC适配，CTLE适配以及对通信信道（20）的限幅器适配。

公开(公告)号：EP3304835A1

公开(公告)日：2018-04-11

申请号：EP16707299.0

申请日：2016-02-05

Applicant: Xilinx, Inc.

Inventor： LIAO, Yu ,  ZHANG, Geoffrey ,  ZHANG, Hongtao ,  CHANG, Kun-yung ,  PHAM, Toan ,  WU, Zhaoyin, D.

IPC: H04L25/03

CPC classification number: H04L27/3809 ,  H04L25/03057 ,  H04L25/03885

Abstract: A receiver relates generally to channel adaptation. In this receiver, a first signal processing block is coupled to a communications channel. The first signal processing block includes: an AGC block and a CTLE block for receiving a modulated signal for providing an analog signal; an ADC for converting the analog signal to digital samples; and an FFE block for equalizing the digital samples to provide equalized samples. A second signal processing block includes: a DFE block for receiving the equalized sampled for providing re-equalized samples; and a slicer coupled to the DFE block for slicing the re-equalized samples. A receiver adaptation block is coupled to the first signal processing block and the second signal processing block. The receiver adaptation block is configured for providing an AGC adaptation, a CTLE adaptation, and a slicer adaptation to the communications channel.