公开(公告)号：KR101116355B1

公开(公告)日：2012-03-09

申请号：KR20100113191

申请日：2010-11-15

Applicant: IUCF HYU ,  HYNIX SEMICONDUCTOR INC

Inventor： JEONG CHUN SEOK ,  KIM KYUNG WHAN ,  YOO CHANG SIK ,  LEE JANG WOO

IPC: H03M1/12

CPC classification number: H03M1/38 ,  H03M1/1009 ,  H03M2201/225 ,  H03M2201/62

Abstract: PURPOSE: A successive approximation register circuit and a successive approximation analog digital convertor including the same are provided to improve performance by reducing time which is taken to convert an analog signal into a digital signal. CONSTITUTION: A selecting unit(610) selects for a setting value of a first half period having the several times of scan periods. The selecting unit selects a reference value which is inputted at the scan period in a latter half period one by one. A register unit(620) includes a plurality of registers. A controlling unit(630) successively activates a register of the register unit at each scan period. The register activated among a plurality of registers(621,622,626) stores an output value of the selecting unit.

Abstract translation: 目的：提供逐次逼近寄存器电路和包括其的逐次逼近模拟数字转换器，以通过减少将模拟信号转换为数字信号所需的时间来提高性能。 构成：选择单元（610）选择具有多次扫描周期的前半个周期的设定值。 选择单元逐个选择在后半个时段的扫描周期输入的基准值。 寄存器单元（620）包括多个寄存器。 控制单元（630）在每个扫描周期连续激活寄存器单元的寄存器。 在多个寄存器（621,622,626）中激活的寄存器存储选择单元的输出值。

公开(公告)号：KR1020110083883A

公开(公告)日：2011-07-21

申请号：KR1020100003855

申请日：2010-01-15

Applicant: 고려대학교 산학협력단

Inventor： 김철우 ,  이호규 ,  김무영 ,  이택종

IPC: H03M1/12

CPC classification number: H03M1/38 ,  H03M1/002 ,  H03M1/36 ,  H03M1/50 ,  H03M2201/225 ,  H03M2201/23

Abstract: PURPOSE: A time-interleaved analog-to-digital converter is provided to have a small number of resistors, thereby effectively reducing the size of a circuit. CONSTITUTION: A first analog-digital converter(310) includes a sampling unit(301), a comparison unit(303), and a successive approximation register(305). The successive approximate register performs successive approximation of the output signals of the comparison unit. The comparison unit compares the sampled signal with a first reference voltage outputted from a reference voltage generator(340). The reference voltage generator comprises a reference voltage generating unit(343) and a controller(341). The controller provides a generated reference voltage to a plurality of analog to digital converters.

Abstract translation: 目的：提供时间交织的模数转换器以具有少量的电阻器，从而有效地减小电路的尺寸。 构成：第一模拟数字转换器（310）包括采样单元（301），比较单元（303）和逐次逼近寄存器（305）。 连续的近似寄存器执行比较单元的输出信号的逐次近似。 比较单元将采样信号与从参考电压发生器（340）输出的第一参考电压进行比较。 参考电压发生器包括参考电压产生单元（343）和控制器（341）。 控制器向多个模数转换器提供产生的参考电压。