公开(公告)号：KR1020110083883A

公开(公告)日：2011-07-21

申请号：KR1020100003855

申请日：2010-01-15

Applicant: 고려대학교 산학협력단

Inventor： 김철우 ,  이호규 ,  김무영 ,  이택종

IPC: H03M1/12

CPC classification number: H03M1/38 ,  H03M1/002 ,  H03M1/36 ,  H03M1/50 ,  H03M2201/225 ,  H03M2201/23

Abstract: PURPOSE: A time-interleaved analog-to-digital converter is provided to have a small number of resistors, thereby effectively reducing the size of a circuit. CONSTITUTION: A first analog-digital converter(310) includes a sampling unit(301), a comparison unit(303), and a successive approximation register(305). The successive approximate register performs successive approximation of the output signals of the comparison unit. The comparison unit compares the sampled signal with a first reference voltage outputted from a reference voltage generator(340). The reference voltage generator comprises a reference voltage generating unit(343) and a controller(341). The controller provides a generated reference voltage to a plurality of analog to digital converters.

Abstract translation: 目的：提供时间交织的模数转换器以具有少量的电阻器，从而有效地减小电路的尺寸。 构成：第一模拟数字转换器（310）包括采样单元（301），比较单元（303）和逐次逼近寄存器（305）。 连续的近似寄存器执行比较单元的输出信号的逐次近似。 比较单元将采样信号与从参考电压发生器（340）输出的第一参考电压进行比较。 参考电压发生器包括参考电压产生单元（343）和控制器（341）。 控制器向多个模数转换器提供产生的参考电压。

公开(公告)号：KR101280876B1

公开(公告)日：2013-07-02

申请号：KR1020120008010

申请日：2012-01-26

Applicant: 주식회사 레이믹스

Inventor： 정성재 ,  이정은 ,  김진화 ,  이주호

IPC: H03M1/12 ,  H03M3/02

CPC classification number: H03M3/364 ,  H03M1/0607 ,  H03M1/12 ,  H03M1/50 ,  H03M3/458 ,  H03M2201/23 ,  H03M2201/61

Abstract: PURPOSE: A continuous time sigma-delta analog-to-digital (AD) converter is provided not to have an effect on the property of the loop filter even in case that the input terminal of sigma-delta AD converter and the common mode voltage of the amplifier of loop filter are different. CONSTITUTION: A loop filter (10) includes a first amplifier (11) amplifying a signal. A current control level shifter (40) controls a direct current, which is inputted to the positive input node voltage and negative input node voltage of the first amplifier, and shifts the positive input node voltage and negative input node voltage of the first amplifier. The current control level shifter shifts the positive input node voltage and negative input node voltage of the first amplifier, and fits the positive input node voltage and negative input node voltage of the first amplifier to the same value as the common mode voltage of the first amplifier. [Reference numerals] (10) Loop filter; (20) Quantization part; (30) Digital-analog conversion part; (40) Current control level shifter; (45) Current mirror

Abstract translation: 目的：提供连续时间Σ-Δ模数（AD）转换器，即使在Σ-ΔAD转换器的输入端和共模电压的情况下也不影响环路滤波器的性能 环路滤波器的放大器是不同的。 构成：环路滤波器（10）包括放大信号的第一放大器（11）。 电流控制电平移位器（40）控制输入到第一放大器的正输入节点电压和负输入节点电压的直流电，并移位第一放大器的正输入节点电压和负输入节点电压。 电流控制电平移位器移动第一放大器的正输入节点电压和负输入节点电压，并将第一放大器的正输入节点电压和负输入节点电压拟合到与第一放大器的共模电压相同的值 。 （附图标记）（10）环路滤波器; （20）量化部分; （30）数模转换部分; （40）电流控制电平转换器; （45）电流镜

公开(公告)号：KR101293057B1

公开(公告)日：2013-08-05

申请号：KR1020120025574

申请日：2012-03-13

Applicant: 동국대학교 산학협력단

Inventor： 송민규 ,  김대윤

IPC: H03M1/12 ,  H04N5/3745

CPC classification number: H03M1/56 ,  H03M1/0607 ,  H03M2201/23 ,  H03M2201/32 ,  H03M2201/615 ,  H03M2201/6372 ,  H04N5/3745

Abstract: PURPOSE: A comparator, an analog-to-digital (A/D) converter, a ramp signal slope compensating circuit, a complementary metal-oxide semiconductor (CMOS) image sensor containing the circuit, and a ramp signal slope compensating method in accordance with the above are provided to prevent the slope ratio of a fine ramp signal to a coarse ramp signal from being distorted due to the slope change of the fine ramp signal and to improve linearity of A/D conversion. CONSTITUTION: An A/D converter (10) includes an amplifier, a comparator (12), a first memory part (16), and a second memory part (18). The amplifier receives a pixel voltage, a reference voltage, a fine ramp voltage, and a coarse ramp voltage. The comparator is equipped with a switch, which is connected between a coarse ramp voltage input terminal receiving coarse ramp voltage input and the amplifier, and a capacitor. One end of the capacitor is connected between the switch and the amplifier, and the other end is connected to a ground voltage. The first memory part stores the most significant bit among 1 least significant bit (LSB) for the coarse ramp voltage. The second memory part stores the least significant bit among 1 LSB for the coarse ramp voltage. [Reference numerals] (12) Comparator; (14) Sink block part; (16) First memory part; (18) Second memory part; (21) Fine ramp generator; (22) Coarse ramp generator; (30) N bit counter

Abstract translation: 目的：比较器，模数（A / D）转换器，斜坡信号斜率补偿电路，含有电路的互补金属氧化物半导体（CMOS）图像传感器，以及根据 提供上述方式以防止精细斜坡信号与粗斜坡信号的斜率比由于精细斜坡信号的斜率变化而失真并提高A / D转换的线性度。 构成：A / D转换器（10）包括放大器，比较器（12），第一存储器部分（16）和第二存储器部分（18）。 放大器接收像素电压，参考电压，精细斜坡电压和粗斜坡电压。 比较器配有开关，连接在接收粗斜坡电压输入的粗斜坡电压输入端子和放大器之间，以及电容器。 电容器的一端连接在开关和放大器之间，另一端连接到接地电压。 第一个存储器部分存储粗斜坡电压的1个最低有效位（LSB）中的最高有效位。 第二存储器部分存储粗略斜坡电压的1 LSB中的最低有效位。 （附图标记）（12）比较器 （14）槽块部分; （16）第一记忆部分; （18）第二记忆部分; （21）细斜坡发生器; （22）粗斜坡发生器; （30）N位计数器

公开(公告)号：KR1020120122972A

公开(公告)日：2012-11-07

申请号：KR1020120044826

申请日：2012-04-27

Applicant: 인터실 아메리카스 엘엘씨

Inventor： 키담비,선더에스.

IPC: H03M1/12

CPC classification number: H03M1/1215 ,  H03M1/0607 ,  H03M1/1245 ,  H03M2201/2216 ,  H03M2201/23 ,  H03M2201/6107 ,  H03M2201/6309

Abstract: PURPOSE: A gradient-based approach to sample-time mismatch error calibration in a two-channel time-interleaved analog-to-digital converter is provided to correct a phase error at a 2-channel TIADC(time interleaved analog to digital converter) system which is independent from a Nyquist zone. CONSTITUTION: An input signal is converted into first and second digital signals in order to provide two sets of ADC outputs. A sample time error is estimated from the first and second digital signals. A correction signal is determined from a sample time error regardless of a Nyquist zone which is occupied by an input signal. The correction signal is applied to the converting step. The step of determining the correction signal includes a step of estimating a gradient of the sample time error. [Reference numerals] (AA) Size(db); (BB) Input signal spectrum in a first Nyquist zone

Abstract translation: 目的：提供两通道时间交织模数转换器中采样时间失配误差校准的基于梯度的方法，以纠正2通道TIADC（时间交错模数转换器）系统的相位误差 它独立于奈奎斯特地带。 构成：输入信号转换为第一和第二数字信号，以提供两组ADC输出。 从第一和第二数字信号估计采样时间误差。 无论与输入信号占据的奈奎斯特区域无关，都从采样时间误差确定校正信号。 校正信号被应用于转换步骤。 确定校正信号的步骤包括估计采样时间误差的梯度的步骤。 （标号）（AA）尺寸（db）; （BB）第一奈奎斯特区域中的输入信号频谱