公开(公告)号：US20150371935A1

公开(公告)日：2015-12-24

申请号：US14311431

申请日：2014-06-23

Applicant: Infineon Technologies Austria AG

Inventor： Martin STANDING ,  Andrew ROBERTS

IPC: H01L23/498 ,  H01L23/00 ,  H01L21/768 ,  H01L21/78 ,  H01L21/48

CPC classification number: H01L21/4857 ,  H01L23/5384 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L24/97 ,  H01L2224/24011 ,  H01L2224/24101 ,  H01L2224/24227 ,  H01L2224/82031 ,  H01L2224/82101 ,  H01L2224/97 ,  H01L2924/01029 ,  H05K1/184 ,  H05K1/186 ,  H05K2201/10166 ,  H05K3/4661 ,  H01L2924/00014 ,  H01L2224/82

Abstract: Representative implementations of devices and techniques provide a semiconductor package comprising a laminate substrate. The laminate substrate includes at least one conductive layer laminated to a surface of an insulating core. The laminate substrate also includes one or more die openings, in which one or more semiconductor die are located.

Abstract translation: 设备和技术的代表性实现提供了包括层压基板的半导体封装。 层叠基板包括层压到绝缘芯的表面上的至少一个导电层。 层压基板还包括一个或多个模具开口，其中一个或多个半导体管芯位于其中。

公开(公告)号：US20140111955A1

公开(公告)日：2014-04-24

申请号：US13654456

申请日：2012-10-18

Applicant: INFINEON TECHNOLOGIES AUSTRIA AG

Inventor： Martin STANDING

IPC: H05K1/18 ,  H05K3/10

CPC classification number: H05K1/186 ,  H01L2924/0002 ,  H05K1/0298 ,  H05K1/115 ,  H05K1/185 ,  H05K3/32 ,  H05K3/429 ,  H05K3/4602 ,  H05K3/4652 ,  H05K3/4697 ,  H05K2203/063 ,  H05K2203/1469 ,  Y10T29/49131 ,  Y10T29/49158 ,  H01L2924/00

Abstract: Representative implementations of devices and techniques provide improved electrical access to components, such as chip dice, for example, disposed within layers of a multi-layer printed circuit board (PCB). One or more insulating layers may be located on either side of a spacer layer containing the components. The insulating layers may have apertures strategically located to provide electrical connectivity between the components and conductive layers of the PCB.

Abstract translation: 器件和技术的代表性实现提供了改进的对诸如芯片芯片（例如，设置在多层印刷电路板（PCB）的层内）的元件的电接入。 一个或多个绝缘层可以位于包含部件的间隔层的任一侧上。 绝缘层可以具有策略性地定位的孔，以提供组件与PCB的导电层之间的电连接。

公开(公告)号：US20140110820A1

公开(公告)日：2014-04-24

申请号：US13654447

申请日：2012-10-18

Applicant: INFINEON TECHNOLOGIES AUSTRIA AG

Inventor： Martin STANDING ,  Milko PAOLUCCI

IPC: H01L21/50 ,  H01L27/06

CPC classification number: H01L23/49822 ,  H01L23/36 ,  H01L23/367 ,  H01L25/16 ,  H01L2924/0002 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H05K1/0203 ,  H05K1/0209 ,  H05K1/185 ,  H05K2201/10015 ,  H05K2201/10022 ,  H05K2201/1003 ,  H05K2201/1053 ,  H05K2201/10636 ,  Y02P70/611 ,  H01L2924/00

Abstract: Representative implementations of devices and techniques provide improved thermal performance of a chip die disposed within a layered printed circuit board (PCB). Passive components may be strategically located on one or more surfaces of the PCB. The passive components may be arranged to conduct heat generated by the chip die away from the chip die.

Abstract translation: 器件和技术的代表性实现提供了设置在分层印刷电路板（PCB）内的芯片芯片的改进的热性能。 无源元件可以策略地位于PCB的一个或多个表面上。 无源部件可以被布置成将由芯片管芯产生的热量从芯片管芯移出。

公开(公告)号：US20150319864A1

公开(公告)日：2015-11-05

申请号：US14799544

申请日：2015-07-14

Applicant: Infineon Technologies Austria AG

Inventor： Martin STANDING

IPC: H05K1/18 ,  H05K3/42 ,  H05K3/46 ,  H05K3/32 ,  H05K1/02 ,  H05K1/11

CPC classification number: H05K1/186 ,  H01L2924/0002 ,  H05K1/0298 ,  H05K1/115 ,  H05K1/185 ,  H05K3/32 ,  H05K3/429 ,  H05K3/4602 ,  H05K3/4652 ,  H05K3/4697 ,  H05K2203/063 ,  H05K2203/1469 ,  Y10T29/49131 ,  Y10T29/49158 ,  H01L2924/00

Abstract: Representative implementations of devices and techniques provide improved electrical access to components, such as chip dice, for example, disposed within layers of a multi-layer printed circuit board (PCB). One or more insulating layers may be located on either side of a spacer layer containing the components. The insulating layers may have apertures strategically located to provide electrical connectivity between the components and conductive layers of the PCB.

Abstract translation: 器件和技术的代表性实现提供了改进的对诸如芯片芯片（例如，设置在多层印刷电路板（PCB）的层内）的元件的电接入。 一个或多个绝缘层可以位于包含部件的间隔层的任一侧上。 绝缘层可以具有策略性地定位的孔，以提供组件与PCB的导电层之间的电连接。

公开(公告)号：US20140111951A1

公开(公告)日：2014-04-24

申请号：US13654450

申请日：2012-10-18

Applicant: INFINEON TECHNOLOGIES AUSTRIA AG

Inventor： Martin STANDING ,  Andrew ROBERTS

IPC: H05K1/18 ,  H05K3/20 ,  H05K1/11

CPC classification number: H05K1/0207 ,  H01L23/5389 ,  H01L2924/0002 ,  H05K1/0265 ,  H05K1/186 ,  H05K3/429 ,  H05K3/4602 ,  H05K2201/09545 ,  H05K2201/09609 ,  H05K2201/10166 ,  H05K2201/10416 ,  H05K2201/10492 ,  H05K2201/10515 ,  Y10T29/49128 ,  H01L2924/00

Abstract: Representative implementations of devices and techniques provide improved electrical performance of components, such as chip dice, for example, disposed on different layers of a multi-layer printed circuit board (PCB). In an example, the components may be embedded within layers of the PCB. An insulating layer located between two component layers or sets of layers includes a conductive portion that may be strategically located to provide electrical connectivity between the components. The conductive portion may also be arranged to improve thermal conductivity between points of the PCB.

Abstract translation: 器件和技术的代表性实现提供了诸如设置在多层印刷电路板（PCB）的不同层上的部件（例如芯片）的改进的电性能。 在一个示例中，组件可以嵌入在PCB的层内。 位于两个组件层或层组之间的绝缘层包括可以被策略地定位以提供部件之间的电连接的导电部分。 导电部分也可以布置成改善PCB的点之间的热导率。