公开(公告)号：US11769459B2

公开(公告)日：2023-09-26

申请号：US18078874

申请日：2022-12-09

Applicant: Sharp Display Technology Corporation

Inventor： Koki Oka ,  Kohichi Ohhara

IPC: G09G3/34 ,  G09G3/36

CPC classification number: G09G3/3406 ,  G09G3/3655 ,  G09G2310/06 ,  G09G2320/0233

Abstract: A display device includes a control circuit. By setting an intermediate point between a start point and an end point of a lighting period as a start point of the lighting cycle, and setting an intermediate point between a start point and an end point of a lighting period of the next lighting period as an end point of the lighting cycle, the control circuit controls a backlight such that an absolute value of a difference value between a first ratio of a sum of a length of a first lighting period in the first lighting cycle and a length of the next second lighting period in the first lighting cycle to a length of the first lighting cycle and the target duty ratio is 0.1 or less.

公开(公告)号：US20230288766A1

公开(公告)日：2023-09-14

申请号：US18117095

申请日：2023-03-03

Applicant: Sharp Display Technology Corporation

Inventor： Hikaru YOSHINO ,  Junichi MORINAGA

IPC: G02F1/1362

CPC classification number: G02F1/136286 ,  G02F1/136222 ,  G02F1/1368

Abstract: A display device includes an array substrate, a counter substrate, a first pixel electrode, a second pixel electrode spaced apart from the first pixel electrode in a first direction, a third pixel electrode spaced apart from the second pixel electrode in the first direction, a first wiring line positioned between the first pixel electrode and the second pixel electrode and extending in a second direction intersecting the first direction, a second pixel electrode row including the second pixel electrode and composed of a plurality of pixel electrodes aligned in the second direction, a third pixel electrode row including the third pixel electrode and composed of a plurality of pixel electrodes aligned in the second direction, a first insulating film disposed on a lower-layer side of the first wiring line, and a spacer protruding from the counter substrate toward the array substrate.

公开(公告)号：US20230273697A1

公开(公告)日：2023-08-31

申请号：US18095241

申请日：2023-01-10

Applicant: Sharp Display Technology Corporation

Inventor： Jin MIYAZAWA ,  Noriyuki TANAKA ,  Daiji KITAGAWA ,  Tatsuhiko SUYAMA ,  Yousuke NAKAMURA ,  Daisuke SUEHIRO

IPC: G06F3/041 ,  G06F3/044

CPC classification number: G06F3/04166 ,  G06F3/044

Abstract: A display device includes: a display panel including a sensor unit configured to detect a touch operation; a first control unit configured to supply a first signal to the display panel; and a second control unit configured to calculate touch information related to the touch operation and to supply the touch information to the first control unit. The first control unit includes: a signal generator configured to generate the first signal based on an image signal supplied from an external image signal supply source; and an overdrive circuit configured to perform a process of increasing an amplitude of the first signal generated by the signal generator. The overdrive circuit is actuated based on the touch information from the second control unit. The first control unit, in response to the actuation of the overdrive circuit, supplies the first signal having the amplitude increased by the overdrive circuit to the display panel.

公开(公告)号：US20230252951A1

公开(公告)日：2023-08-10

申请号：US18101270

申请日：2023-01-25

Applicant: Sharp Display Technology Corporation

Inventor： Kengo HARA ,  Tohru DAITOH ,  Yoshihito HARA ,  Jun NISHIMURA ,  Yohei TAKEUCHI

IPC: G09G3/36 ,  H01L27/12

CPC classification number: G09G3/3677 ,  H01L27/124 ,  H01L27/1225 ,  G09G2310/0286 ,  G09G2330/021

Abstract: An active matrix substrate includes a gate driver including a shift register including a plurality of unit circuits connected in multiple stages. Each of the plurality of unit circuits includes an output node, a first node, a first TFT including a first gate terminal supplied with the set signal, a first source terminal connected to the first node, and a first drain terminal supplied with a first power supply potential higher than a low-level potential of the set signal, and a second TFT including a second gate terminal connected to the first node, a second source terminal connected to the output node, and a second drain terminal supplied with the clock signal. The first TFT includes a semiconductor layer, and a first and a second gate electrodes disposed on a side of the semiconductor layer opposite to the substrate and connected to the first gate terminal. The semiconductor layer includes a source contact region electrically connected to the first source terminal, a drain contact region electrically connected to the first drain terminal, and a first and a second channel regions separated from each other in a channel length direction between the contact regions when viewed from a normal direction of the substrate. The first gate electrode overlaps the first channel region via an upper gate insulating layer, and the second gate electrode overlaps the second channel region via the upper gate insulating layer.

公开(公告)号：US20230251532A1

公开(公告)日：2023-08-10

申请号：US18106465

申请日：2023-02-06

Applicant: Sharp Display Technology Corporation

Inventor： Mitsuaki HIRATA

IPC: G02F1/1343 ,  G02F1/1337

CPC classification number: G02F1/134336 ,  G02F1/133707 ,  G02F1/133746 ,  G02F1/133788

Abstract: Each pixel of the liquid crystal display device includes a first, second, third, and fourth domains arranged in two rows and two columns, and reference alignment directions of the respective domains are first, second, third, and fourth directions. The first direction and the second direction form an angle of approximately 180°, and the first domain and the second domain are adjacent to each other in an oblique direction. The pixel electrode includes a plurality of first slits formed in a region corresponding to the first domain and extending approximately parallel to the first direction, and a plurality of second slits formed in a region corresponding to the second domain and extending approximately parallel to the second direction, and has no slits in a region corresponding to the third domain and no slits in a region corresponding to the fourth domain.

公开(公告)号：US20230251522A1

公开(公告)日：2023-08-10

申请号：US18102883

申请日：2023-01-30

Applicant: Sharp Display Technology Corporation

Inventor： Koji MURATA ,  Hiroshi TSUCHIYA ,  Takashi SATOH ,  Shinji SHIMADA

IPC: G02F1/1335 ,  G02F1/1343 ,  G02F1/137 ,  G02F1/13357

CPC classification number: G02F1/133531 ,  G02F1/134318 ,  G02F1/13706 ,  G02F1/134372 ,  G02F1/134363 ,  G02F1/133603 ,  G02F1/133514 ,  G02F1/133512

Abstract: Provided is a liquid crystal panel sequentially including: a first polarizing plate with a first absorption axis; a first substrate including a first electrode; a liquid crystal layer containing liquid crystal molecules; and a second substrate including a second electrode. The liquid crystal panel satisfies the following Formula (1) as well as the following Formula (2-1) or Formula (2-2):


5°≤|φ1−φ2|≤20°  (Formula 1)



5°≤|φP1−φ2|≤20°  (Formula 2-1)



65°≤|φP1−φ2|≤80°  (Formula 2-2)

wherein φ1 represents an azimuthal angle of a director of liquid crystal molecules near the first substrate, φ2 represents an azimuthal angle of a director of liquid crystal molecules near the second substrate, and φP1 represents an azimuthal angle of the first absorption axis of the first polarizing plate, each with no voltage applied.

公开(公告)号：US20230229249A1

公开(公告)日：2023-07-20

申请号：US18093155

申请日：2023-01-04

Applicant: Sharp Display Technology Corporation

Inventor： Osamu SASAKI

IPC: G06F3/041 ,  G09G3/36

CPC classification number: G06F3/0412 ,  G09G3/3648 ,  G06F3/04166 ,  G09G2310/0213 ,  G09G2310/0286 ,  G09G2320/02 ,  G09G2310/08

Abstract: A plurality of gate bus lines are scanned one by one such that a video signal is written, via a corresponding source bus line, into each of pixel forming sections provided in a plurality of rows and a plurality of columns. When a sensor electrode is driven to detect a touch position, the scanning of the gate bus lines is stopped. Operation of a gate driver and operation of a touch sensor drive circuit are controlled such that, when the sensor electrode is driven, a stop row that is a row at which the scanning of the gate bus lines is stopped is different in each of a first frame period and a second frame period that are two consecutive frame periods.

公开(公告)号：US20230221605A1

公开(公告)日：2023-07-13

申请号：US18096056

申请日：2023-01-12

Applicant: Sharp Display Technology Corporation

Inventor： Tetsuo KIKUCHI ,  Masahiko SUZUKI ,  Setsuji NISHIMIYA ,  Hitoshi TAKAHATA ,  Takuya WATANABE ,  Tohru DAITOH

IPC: G02F1/1362 ,  H01L27/12 ,  H01L29/786 ,  G02F1/1368 ,  G02F1/133 ,  G09G3/36

CPC classification number: G02F1/136286 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/78648 ,  H01L29/7869 ,  G02F1/1368 ,  G02F1/13306 ,  G09G3/3648 ,  G09G3/3677 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2300/08 ,  G09G2310/0291

Abstract: A semiconductor device including a substrate, and a first circuit supported by the substrate and including a plurality of TFTs including a first TFT, wherein the first TFT includes a semiconductor layer, a lower gate electrode located on a side of the substrate of the semiconductor layer and overlapping a part of the semiconductor layer via a lower gate insulating layer, and an upper gate electrode located on a side opposite to the substrate of the semiconductor layer and overlapping a part of the semiconductor layer via an upper gate insulating layer, one of the lower gate electrode and the upper gate electrode is a first gate electrode and the other is a second gate electrode, a first signal is supplied to the first gate electrode, and a second signal different from the first signal is supplied to the second gate electrode, the first TFT has a threshold voltage between a high-level potential and a low-level potential of the first signal and between a high-level potential and a low-level potential of the second signal, and a period during which the first signal is at the high-level potential and a period during which the second signal is at the high-level potential do not overlap each other.

公开(公告)号：US20230215395A1

公开(公告)日：2023-07-06

申请号：US18075300

申请日：2022-12-05

Applicant: Sharp Display Technology Corporation

Inventor： Jun NISHIMURA ,  Yoshihito HARA ,  Yohei TAKEUCHI ,  Kengo HARA ,  Tohru DAITOH

IPC: G09G3/36

CPC classification number: G09G3/3677 ,  G11C19/28

Abstract: A shift register includes stages each constituted by a unit circuit provided with thin-film transistors that separate a control node (i.e. a node that controls output from a unit circuit) into an output-side first control node and an input-side second control node. One of the thin-film transistors has a control terminal that is supplied with a set signal that is an output signal from a unit circuit constituting a preceding stage. The other of the thin-film transistors has a control terminal that is supplied with a reset signal that is an output signal from a unit circuit constituting a subsequent stage.

公开(公告)号：US20230205016A1

公开(公告)日：2023-06-29

申请号：US18083239

申请日：2022-12-16

Applicant: Sharp Display Technology Corporation

Inventor： Junichi MORINAGA ,  Hikaru YOSHINO

IPC: G02F1/1337 ,  G02F1/1362 ,  G02F1/1339 ,  G02F1/1343

CPC classification number: G02F1/13378 ,  G02F1/1343 ,  G02F1/13392 ,  G02F1/136209 ,  G02F1/136286 ,  H01L27/1214

Abstract: A liquid crystal panel includes an array substrate, a counter substrate disposed to face the array substrate, and a liquid crystal layer sandwiched between the array substrate and the counter substrate, in which the array substrate is provided with a plurality of pixel electrodes aligned at intervals in a plane of the array substrate, a common electrode disposed to overlap the plurality of pixel electrodes, an insulating film disposed on an upper layer side of the common electrode, and an alignment film disposed on an upper layer side of the insulating film, a light blocking portion and a spacer are provided in the counter substrate, the light blocking portion separating the plurality of pixel electrodes, the spacer being disposed to overlap the light blocking portion and protruding to the liquid crystal layer side from the counter substrate, the alignment film is connected to the common electrode directly or via another member through an opening provided in the insulating film, and the opening is disposed at a position that does not overlap the spacer and overlaps the light blocking portion in the insulating film.