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    CIRCUIT STRUCTURE AND MANUFACTURING METHOD THEREOF
    92.
    发明申请
    CIRCUIT STRUCTURE AND MANUFACTURING METHOD THEREOF 审中-公开

    公开(公告)号：US20170164468A1

    公开(公告)日：2017-06-08

    申请号：US14997583

    申请日：2016-01-18

    Applicant: UNIMICRON TECHNOLOGY CORP.

    Inventor： HUNG-LIN CHANG ,  MING-HAO WU ,  SYUN-SIAO CHANG ,  CHENG-PO YU ,  CHI-MIN CHANG

    IPC: H05K1/02 ,  H05K3/46 ,  H05K1/11

    CPC classification number: H05K3/4697 ,  H05K3/4644

    Abstract: A manufacturing method of a circuit board structure is described as follows. An inner circuit structure including a core layer having an upper and an opposite lower surface, a first patterned circuit layer disposed on the upper surface and a second patterned circuit layer disposed on the lower surface is provided. An insulating material layer is formed on a portion of the first patterned circuit layer. A laser resisting layer is formed on at least a portion of the insulating material layer. A release layer is adhered to the laser resisting layer. A build-up process is performed so as to laminate a first and a second build-up circuit structures on the first and the second patterned circuit layers, respectively. A laser ablation process is performed on the first build-up circuit structure so as to form a cavity at least exposing a portion of the upper surface of the core layer.

    Optical-electro circuit board
    93.
    发明授权
    Optical-electro circuit board 有权
    光电电路板

    公开(公告)号：US09581774B2

    公开(公告)日：2017-02-28

    申请号：US15164878

    申请日：2016-05-26

    Applicant: Unimicron Technology Corp.

    Inventor： Yin-Ju Chen ,  Cheng-Po Yu ,  Pei-Chang Huang

    IPC: G02B6/43 ,  G02B6/42 ,  H01L31/0232 ,  G02B6/12 ,  G02B6/32

    CPC classification number: G02B6/428 ,  G02B6/12004 ,  G02B6/32 ,  G02B6/4206 ,  G02B6/4244 ,  G02B6/4245 ,  G02B6/4274 ,  G02B6/43 ,  H01L31/0232 ,  H01L31/02327 ,  H01L31/167

    Abstract: An optical component including a multi-layer substrate, an optical waveguide element, and two optical-electro assemblies is provided. The multi-layer substrate includes a dielectric layer, two circuit layers, and two through holes passing through the dielectric layer. The optical waveguide element is located on the multi-layer substrate and between the through holes. The optical-electro assemblies are respectively inserted into the corresponding through holes and correspondingly located at two opposite ends of the optical waveguide element. One of the optical-electro assemblies transforms an electrical signal into a light beam and provides the light beam to the optical waveguide element, and the other one of the optical-electro assemblies receives the light beam transmitted from the optical waveguide element and transforms the light beam into another electrical signal. A manufacturing method of the optical component and an optical-electro circuit board having the optical component are also provided.

    Abstract translation: 提供了包括多层基板，光波导元件和两个光电组件的光学部件。 多层基板包括电介质层，两个电路层和穿过电介质层的两个通孔。 光波导元件位于多层基板上并且位于通孔之间。 光电组件分别插入对应的通孔中并相应地位于光波导元件的两个相对端。 光电组件中的一个将电信号转换成光束并将光束提供给光波导元件，另一个光电组件接收从光波导元件传输的光束并转换光 射入另一个电信号。 还提供了具有光学部件的光学部件的制造方法和光电路板。

    Vehicle door opening warning system and vehicle door opening warning method
    95.
    发明授权
    Vehicle door opening warning system and vehicle door opening warning method 有权
    车门开启警示系统及车门开启警示方式

    公开(公告)号：US09514629B2

    公开(公告)日：2016-12-06

    申请号：US14680075

    申请日：2015-04-07

    Applicant: Unimicron Technology Corp.

    Inventor： Yin-Ju Chen ,  Cheng-Po Yu

    IPC: B60Q1/26 ,  G08B21/24 ,  B60Q9/00 ,  G08G1/16

    CPC classification number: G08B21/24 ,  B60Q9/008 ,  G08G1/166

    Abstract: A vehicle door opening warning system including a control unit, a projection unit and a detection unit is provided. The control unit is disposed at a door of a vehicle. The projection unit is disposed at the door and is electrically coupled to the control unit. The detection unit is disposed outside of the vehicle and is electrically coupled to the control unit. When the detection unit detects a moving object existing within 5 to 30 meters of the vehicle, the detection unit produces a signal. The control unit receives the signal and controls the projection unit to project a warning message according to the signal. A vehicle door opening warning method is also provided.

    Abstract translation: 提供了包括控制单元，投影单元和检测单元的车门打开警告系统。 控制单元设置在车辆的门上。 投影单元设置在门上并且电耦合到控制单元。 检测单元设置在车辆外部并且电耦合到控制单元。 当检测单元检测到存在于车辆5至30米范围内的运动物体时，检测单元产生信号。 控制单元接收信号并根据信号控制投影单元投射警告消息。 还提供车门打开警告方法。

    Carrier substrate
    96.
    发明授权
    Carrier substrate 有权
    载体基片

    公开(公告)号：US09491871B2

    公开(公告)日：2016-11-08

    申请号：US14977669

    申请日：2015-12-22

    Applicant: Unimicron Technology Corp.

    Inventor： Ying-Chih Chan ,  Chun-Ting Lin

    IPC: H05K1/00 ,  H05K3/40 ,  H05K3/00 ,  H05K3/46

    CPC classification number: H05K3/4015 ,  H05K3/0097 ,  H05K3/4644 ,  H05K2201/09509 ,  H05K2201/09827 ,  H05K2203/041 ,  H05K2203/1536

    Abstract: A carrier substrate includes a dielectric layer, a first circuit layer, an insulation layer, conductive blocks, and a first conductive structure. The dielectric layer has a first surface, a second surface, and blind vias. The first circuit layer is embedded in the first surface and the blind vias extend from the second surface to the first circuit layer. The insulation layer is disposed on the first surface and has a third surface, a fourth surface, and first openings exposing the first circuit layer. The conductive blocks fill the first openings and connect with the first circuit layer. A top surface of each of the conductive blocks is higher than the third surface of the insulation layer. The first conductive structure includes conductive vias filling the blind vias and a second circuit layer disposed on a portion of the second surface.

    Abstract translation: 载体基板包括电介质层，第一电路层，绝缘层，导电块和第一导电结构。 电介质层具有第一表面，第二表面和盲孔。 第一电路层嵌入在第一表面中，盲孔从第二表面延伸到第一电路层。 绝缘层设置在第一表面上，并且具有第三表面，第四表面和暴露第一电路层的第一开口。 导电块填充第一开口并与第一电路层连接。 每个导电块的顶表面高于绝缘层的第三表面。 第一导电结构包括填充盲通孔的导电通孔和设置在第二表面的一部分上的第二电路层。

    Manufacturing method of circuit board
    98.
    发明授权
    Manufacturing method of circuit board 有权
    电路板的制造方法

    公开(公告)号：US09340003B2

    公开(公告)日：2016-05-17

    申请号：US13919711

    申请日：2013-06-17

    Applicant: Unimicron Technology Corp.

    Inventor： Chen-Chuan Chang

    IPC: B32B38/10 ,  H05K3/46

    CPC classification number: B32B38/10 ,  H05K3/4623 ,  H05K3/4652 ,  H05K3/4697 ,  H05K2201/0355 ,  H05K2201/09127 ,  H05K2203/107 ,  Y10T156/1052

    Abstract: A manufacturing method of a circuit board comprises the following steps. Firstly, provide a first core layer, a second core material layer, and a central dielectric material layer. Secondly, press the first core layer, the second core material layer, and the central dielectric material layer to form a composite circuit structure. Thirdly, removing a portion of the central dielectric material layer located at a periphery of a pre-removing area and a portion of the second core material layer located at the periphery of the pre-removing area. Finally, remove a portion of the central dielectric material layer located within the pre-removing area and a portion of the second core material layer located within the pre-removing area to form a central dielectric layer and a second core layer.

    Abstract translation: 电路板的制造方法包括以下步骤。 首先，提供第一芯层，第二芯材料层和中心电介质材料层。 其次，按压第一芯层，第二芯材料层和中心电介质材料层以形成复合电路结构。 第三，去除位于预除去区域的周边的中央电介质材料层的一部分和位于预除去区域周边的第二芯材料层的一部分。 最后，去除位于预除去区域内的中心电介质材料层的一部分和位于预去除区域内的第二芯材料层的一部分以形成中心电介质层和第二芯层。

    Carrier substrate and manufacturing method thereof
    99.
    发明授权
    Carrier substrate and manufacturing method thereof 有权
    载体基板及其制造方法

    公开(公告)号：US09247654B2

    公开(公告)日：2016-01-26

    申请号：US13966295

    申请日：2013-08-14

    Applicant: Unimicron Technology Corp.

    Inventor： Chun-Ting Lin

    IPC: H05K1/11 ,  H05K3/46 ,  H05K3/40 ,  H05K3/00

    CPC classification number: H05K3/4015 ,  H05K3/0097 ,  H05K3/4644 ,  H05K2201/09827 ,  H05K2203/041 ,  H05K2203/1536

    Abstract: A carrier substrate includes a dielectric layer, a first circuit layer, an insulation layer, conductive blocks, and a first conductive structure. The dielectric layer has a first surface, a second surface, and blind vias. The first circuit layer is embedded in the first surface and the blind vias extend from the second surface to the first circuit layer. The insulation layer is disposed on the first surface and has a third surface, a fourth surface, and first openings. The first openings expose the first circuit layer and an aperture of each first opening is increased gradually from the third surface to the fourth surface. The conductive blocks fill the first openings and connect with the first circuit layer. The first conductive structure includes conductive vias filling the blind vias and a second circuit layer disposed on a portion of the second surface.

    Abstract translation: 载体基板包括电介质层，第一电路层，绝缘层，导电块和第一导电结构。 电介质层具有第一表面，第二表面和盲孔。 第一电路层嵌入在第一表面中，盲孔从第二表面延伸到第一电路层。 绝缘层设置在第一表面上并且具有第三表面，第四表面和第一开口。 第一开口露出第一电路层，并且每个第一开口的开口从第三表面逐渐增加到第四表面。 导电块填充第一开口并与第一电路层连接。 第一导电结构包括填充盲通孔的导电通孔和设置在第二表面的一部分上的第二电路层。

    FABRICATION METHOD OF PACKAGING SUBSTRATE HAVING EMBEDDED PASSIVE COMPONENT
    100.
    发明申请
    FABRICATION METHOD OF PACKAGING SUBSTRATE HAVING EMBEDDED PASSIVE COMPONENT 审中-公开
    具有嵌入式被动元件的封装基板的制造方法

    公开(公告)号：US20160007483A1

    公开(公告)日：2016-01-07

    申请号：US14853992

    申请日：2015-09-14

    Applicant: Unimicron Technology Corp.

    Inventor： Shih-Pin Hsu ,  Zhao-Chong Zeng

    IPC: H05K3/32 ,  H05K3/46

    CPC classification number: H05K3/32 ,  H01L23/49822 ,  H01L2924/00013 ,  H01L2924/0002 ,  H05K1/186 ,  H05K3/4644 ,  H05K3/4682 ,  H05K2201/0195 ,  H05K2201/10015 ,  H05K2201/10636 ,  Y02P70/611 ,  Y10T29/4913 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00

    Abstract: A carrier board having two opposite surfaces is provided and a releasing film and a metal layer are formed on the two opposite surfaces respectively. Each metal layer formed with positioning pads is covered with a first hot-melt-dielectric layer where a passive component is disposed. The passive component has upper and lower surfaces each having electrode pads. Each first hot-melt-dielectric layer is disposed on a core board having a cavity to receive the passive component. A second hot-melt-dielectric layer is stacked on each core board. The first and second hot-melt-dielectric layers are heat pressed to form two dielectric layer units each having a top surface and a bottom surface. The carrier board and the releasing films are removed to separate the dielectric layer units. Wiring layers are formed on each top surface and each bottom surface and electrically connected to the electrode pads of the upper and lower surfaces respectively.

    Abstract translation: 提供具有两个相对表面的载体板，并且在两个相对的表面上分别形成剥离膜和金属层。 形成有定位焊盘的每个金属层被设置有无源部件的第一热熔电介质层覆盖。 无源部件具有各自具有电极焊盘的上表面和下表面。 每个第一热熔电介质层设置在具有空腔的芯板上以接收无源部件。 在每个芯板上堆叠第二热熔电介质层。 第一和第二热熔介电层被热压以形成两个具有顶表面和底表面的电介质层单元。 去除载体板和释放膜以分离介电层单元。 接线层形成在每个顶表面和每个底表面上并分别电连接到上表面和下表面的电极焊盘。

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