公开(公告)号：US20210317573A1

公开(公告)日：2021-10-14

申请号：US16902665

申请日：2020-06-16

Applicant: Applied Materials, Inc. ,  The Regents of the University of California

Inventor： Keith Tatseun WONG ,  Srinivas D. NEMANI ,  Andrew C. KUMMEL ,  James HUANG ,  Yunil CHO

IPC: C23C16/40 ,  C23C28/04 ,  C23C16/455

Abstract: Embodiments described and discussed herein provide methods for selectively depositing a metal oxides on a substrate. In one or more embodiments, methods for forming a metal oxide material includes positioning a substrate within a processing chamber, where the substrate has passivated and non-passivated surfaces, exposing the substrate to a first metal alkoxide precursor to selectively deposit a first metal oxide layer on or over the non-passivated surface, and exposing the substrate to a second metal alkoxide precursor to selectively deposit a second metal oxide layer on the first metal oxide layer. The method also includes sequentially repeating exposing the substrate to the first and second metal alkoxide precursors to produce a laminate film containing alternating layers of the first and second metal oxide layers. Each of the first and second metal alkoxide precursors contain different types of metals which are selected from titanium, zirconium, hafnium, aluminum, or lanthanum.

公开(公告)号：US20210305501A1

公开(公告)日：2021-09-30

申请号：US17328491

申请日：2021-05-24

Applicant: Applied Materials, Inc.

Inventor： John O. DUKOVIC ,  Srinivas D. NEMANI ,  Ellie Y. YIEH ,  Praburam GOPALRAJA ,  Steven Hiloong WELCH ,  Bhargav S. CITLA

IPC: H01L43/12 ,  H01L27/22 ,  H01L43/02

Abstract: One or more embodiments described herein generally relate to patterning semiconductor film stacks. Unlike in conventional embodiments, the film stacks herein are patterned without the need of etching the magnetic tunnel junction (MTJ) stack. Instead, the film stack is etched before the MTJ stack is deposited such that the spin on carbon layer and the anti-reflective coating layer are completely removed and a trench is formed within the dielectric capping layer and the oxide layer. Thereafter, MTJ stacks are deposited on the buffer layer and on the dielectric capping layer. An oxide capping layer is deposited such that it covers the MTJ stacks. An oxide fill layer is deposited over the oxide capping layer and the film stack is polished by chemical mechanical polishing (CMP). The embodiments described herein advantageously result in no damage to the MTJ stacks since etching is not required.

公开(公告)号：US20210257252A1

公开(公告)日：2021-08-19

申请号：US16792646

申请日：2020-02-17

Applicant: Applied Materials, Inc.

Inventor： Maximillian CLEMONS ,  Nikolaos BEKIARIS ,  Srinivas D. NEMANI

IPC: H01L21/768 ,  H01L21/02 ,  H01J37/32

Abstract: Generally, examples described herein relate to methods and processing systems for performing multiple processes in a same processing chamber on a flowable gap-fill film deposited on a substrate. In an example, a semiconductor processing system includes a processing chamber and a system controller. The system controller includes a processor and memory. The memory stores instructions, that when executed by the processor cause the system controller to: control a first process within the processing chamber performed on a substrate having thereon a film deposited by a flowable process, and control a second process within the process chamber performed on the substrate having thereon the film. The first process includes stabilizing bonds in the film to form a stabilized film. The second process includes densifying the stabilized film.

公开(公告)号：US20210225687A1

公开(公告)日：2021-07-22

申请号：US16744478

申请日：2020-01-16

Applicant: Applied Materials, Inc.

Inventor： Sultan MALIK ,  Srinivas D. NEMANI ,  Adib M. KHAN ,  Qiwei LIANG

IPC: H01L21/687 ,  H01L21/677

Abstract: The present disclosure generally relates to a pin-less substrate transfer apparatus and method for a processing chamber. The processing chamber includes a pedestal. The pedestal includes a pedestal plate. The pedestal plate has a radius, a top surface, and a bottom surface. The pedestal plate further includes a plurality of cut outs on a perimeter of the pedestal plate. Flat edges are disposed on opposite sides of the pedestal plate. Recesses are disposed in the bottom surface below each of the flat edges.

公开(公告)号：US20210088896A1

公开(公告)日：2021-03-25

申请号：US16983093

申请日：2020-08-03

Applicant: Applied Materials, Inc.

Inventor： Huixiong DAI ,  Mangesh Ashok BANGAR ,  Pinkesh Rohit SHAH ,  Srinivas D. NEMANI ,  Steven Hiloong WELCH ,  Christopher Siu Wing NGAI ,  Ellie Y. YIEH

IPC: G03F1/36 ,  G03F7/38

Abstract: Embodiments of the disclosure relate to lithography simulation and optical proximity correction. Field-guided post exposure bake processes have enabled improved lithography performance and various parameters of such processes are included in the optical proximity correction models generated in accordance with the embodiments described herein. An optical proximity correction model includes one or more parameters of anisotropic acid etching characteristics, ion generation and/or movement, electron movement, hole movement, and chemical reaction characteristics.

公开(公告)号：US20200233307A1

公开(公告)日：2020-07-23

申请号：US16600101

申请日：2019-10-11

Applicant: Applied Materials, Inc.

Inventor： Huixiong DAI ,  Mangesh BANGAR ,  Christopher S. NGAI ,  Srinivas D. NEMANI ,  Ellie Y. YIEH ,  Steven Hiloong WELCH

IPC: G03F7/16 ,  G03F7/09 ,  G03F7/20

Abstract: Methods and apparatuses for minimizing line edge/width roughness in lines formed by photolithography are provided. In one example, a method of processing a substrate includes applying a photoresist layer comprising a photoacid generator to on a multi-layer disposed on a substrate, wherein the multi-layer comprises an underlayer formed from an organic material, inorganic material, or a mixture of organic and inorganic materials, exposing a first portion of the photoresist layer unprotected by a photomask to a radiation light in a lithographic exposure process, and applying an electric field or a magnetic field to alter movement of photoacid generated from the photoacid generator substantially in a vertical direction.

公开(公告)号：US20200035513A1

公开(公告)日：2020-01-30

申请号：US16510848

申请日：2019-07-12

Applicant: Applied Materials, Inc.

Inventor： Adib KHAN ,  Qiwei LIANG ,  Sultan MALIK ,  Srinivas D. NEMANI

IPC: H01L21/67 ,  F01K1/00

Abstract: The present disclosure relates to high pressure processing apparatus for semiconductor processing. The apparatus described herein include a high pressure process chamber and a containment chamber surrounding the process chamber. A steam delivery module is in fluid communication with the high pressure process chamber and is configured to deliver steam to the process chamber. The steam delivery module includes a boiler and a steam reservoir.

公开(公告)号：US20190311908A1

公开(公告)日：2019-10-10

申请号：US16366539

申请日：2019-03-27

Applicant: Applied Materials, Inc.

Inventor： He REN ,  Maximillian CLEMONS ,  Mei-Yee SHEK ,  Minrui YU ,  Bencherki MEBARKI ,  Mehul B. NAIK ,  Chentsau YING ,  Srinivas D. NEMANI

IPC: H01L21/285 ,  H01L29/45

Abstract: Methods for forming low resistivity metal silicide interconnects using one or a combination of a physical vapor deposition (PVD) process and an anneal process are described herein. In one embodiment, a method of forming a plurality of wire interconnects includes flowing a sputtering gas into a processing volume of a processing chamber, applying a power to a target disposed in the processing volume, forming a plasma in a region proximate to the sputtering surface of the target, and depositing the metal and silicon layer on the surface of the substrate. Herein, the first target comprises a metal silicon alloy and a sputtering surface thereof is angled with respect to a surface of the substrate at between about 10° and about 50°.

公开(公告)号：US20190279879A1

公开(公告)日：2019-09-12

申请号：US16262094

申请日：2019-01-30

Applicant: Applied Materials, Inc.

Inventor： Kaushal K. SINGH ,  Mei-Yee SHEK ,  Srinivas D. NEMANI ,  Ellie Y. YIEH

IPC: H01L21/383 ,  H01L21/44 ,  C23C14/48 ,  C23C14/58

Abstract: The present disclosure provides methods for performing an annealing process on a metal containing layer in TFT display applications, semiconductor or memory applications. In one example, a method of forming a metal containing layer on a substrate includes supplying an oxygen containing gas mixture on a substrate in a processing chamber, the substrate comprising a metal containing layer disposed on an optically transparent substrate, maintaining the oxygen containing gas mixture in the processing chamber at a process pressure between about 2 bar and about 50 bar, and thermally annealing the metal containing layer in the presence of the oxygen containing gas mixture.

公开(公告)号：US20190258153A1

公开(公告)日：2019-08-22

申请号：US16262102

申请日：2019-01-30

Applicant: Applied Materials, Inc.

Inventor： Srinivas D. NEMANI ,  Ellie Y. YIEH ,  Mei-Yee SHEK

IPC: G03F1/22 ,  G03F1/26

Abstract: The present disclosure provides methods for forming a material layer in a film stack for manufacturing a photomask in EUV applications and phase shift and binary photomask applications. In one example, a method for forming a dielectric material on a substrate includes supplying an oxygen containing gas mixture on a substrate in a processing chamber, the substrate comprising a dielectric material disposed on an optically transparent silicon containing material, maintaining the oxygen containing gas mixture in the processing chamber at a process pressure at greater than 2 bar, and thermally treating the dielectric material in the presence of the oxygen containing gas mixture.