公开(公告)号：US5777276A

公开(公告)日：1998-07-07

申请号：US686552

申请日：1996-07-26

Applicant: Xiao Feng Zhu

Inventor： Xiao Feng Zhu

IPC: H01R12/52 ,  H05K1/02 ,  H05K1/11 ,  H05K3/42 ,  H05K3/46 ,  H01R9/09

CPC classification number: H05K1/0265 ,  H01R12/523 ,  H05K1/115 ,  H05K1/0262 ,  H05K2201/044 ,  H05K2201/09672 ,  H05K2201/0979 ,  H05K3/429 ,  H05K3/4641

Abstract: Motherboard 10M receives a voltage at post 14P from an off-board power source. Buried conductive layer 10B selectively distributes this electrical power to component sites 10S. Post bore 14 penetrates through local electrodes 12U and 12L into the motherboard for exposing post contact regions 14U and 14L and post contact region 14B in the buried layer. Connector post 14P is positioned within the post bore. Post bore conductor 14C within the post bore establishes electrical continuity from the connector post to the buried layer. The post bore conductor also establishes electrical continuity from the connector post to post contact regions 14U and 14L in the local electrodes. Auxiliary bore 16 proximate the post bore penetrates into the motherboard for exposing auxiliary contact regions 16U and 16L in the local electrodes, and auxiliary contact region 16B in the buried layer. Auxiliary bore conductor 16C within the auxiliary bore establishes electrical continuity along the auxiliary bore. Each auxiliary bore provides an upper circuit and lower auxiliary circuit in parallel relationship between the connector post and the buried layer for reducing the electrical resistance into the buried layer from the off-board power supply.

Abstract translation: 主板10M从板外电源接收14P的电压。 掩埋导电层10B选择性地将该电力分配到部件位置10S。 柱孔14穿过本地电极12U和12L进入母板，用于暴露接触区域14U和14L，并使接触区域14B在埋层中。 连接柱14P位于柱孔内。 柱孔内的后孔导体14C建立了从连接器柱到掩埋层的电连续性。 柱孔导体还建立从连接器柱到局部电极中的接触区域14U和14L之间的电连续性。 靠近柱孔的辅助孔16渗透到母板中，用于暴露局部电极中的辅助接触区域16U和16L以及掩埋层中的辅助接触区域16B。 辅助孔内的辅助孔导体16C建立沿着辅助孔的电连续性。 每个辅助孔在连接器柱和掩埋层之间提供平行关系的上部电路和下部辅助电路，用于减少从车外电源进入掩埋层的电阻。

公开(公告)号：US5571996A

公开(公告)日：1996-11-05

申请号：US375327

申请日：1995-01-17

Applicant: N. Deepak Swamy ,  Victor K. Pecone ,  Darrell Slupek

Inventor： N. Deepak Swamy ,  Victor K. Pecone ,  Darrell Slupek

IPC: H05K1/02 ,  H05K7/14 ,  H05K1/18 ,  H05K1/14

CPC classification number: H05K1/0248 ,  H05K1/0228 ,  H05K7/1429 ,  H05K2201/044 ,  H05K2201/09245 ,  H05K2201/09263 ,  H05K2201/09709 ,  H05K2201/09718

Abstract: A circuit board is provided having a plurality of vias and uniformly spaced connector stubs arranged upon one or both outer surfaces of the control board. Sets of trace conductors are formed within the control board between the vias. The trace conductors are arranged in two planes within the control board, wherein trace conductors within one plane are laterally offset from trace conductors in the other plane. Laterally offset trace conductors allow close spacing of the trace conductor planes while maximizing the spacing between trace conductors and corresponding reference conductors also placed within the control board. Additionally, the trace conductors are serpentine-shaped when viewed from a perspective perpendicular to the planar surface of the control board. The serpentine shape, in conjunction with carefully controlled spacing between planes of trace conductors as well as between the trace conductor planes and reference conductors, provides high impedance trace conductors in a limited space area necessary to meet SCSI specifications.

Abstract translation: 设置有布置在控制板的一个或两个外表面上的多个通孔和均匀间隔的连接器短截线的电路板。 在通孔之间的控制板内形成导线组。 迹线导体布置在控制板内的两个平面中，其中一个平面内的迹线导体在另一个平面中横向偏离迹线导体。 横向偏移迹线导体允许迹线导体平面的紧密间隔，同时最大化迹线导体和也放置在控制板内的相应参考导体之间的间隔。 此外，当从垂直于控制板的平面表面的视角观察时，迹线导体是蛇形的。 蛇纹形状与跟踪导体的平面之间以及轨迹导体平面和参考导体之间的仔细控制的间距结合，在满足SCSI规范所需的有限空间区域内提供高阻抗迹线导体。

公开(公告)号：US5432486A

公开(公告)日：1995-07-11

申请号：US64284

申请日：1993-05-20

Applicant: Larry K.-C. Wong

Inventor： Larry K.-C. Wong

IPC: H01R12/50 ,  H01R12/62 ,  H01R12/79 ,  H01R13/66 ,  H05K1/02 ,  H05K1/11 ,  H05K1/14 ,  H05K3/28 ,  H05K3/36 ,  H01P5/18

CPC classification number: H05K1/0246 ,  H01R12/62 ,  H01R13/6633 ,  H01R23/6873 ,  H05K1/0239 ,  H01R12/79 ,  H05K1/118 ,  H05K1/14 ,  H05K2201/044 ,  H05K2201/10022 ,  H05K3/28 ,  H05K3/361

Abstract: A coupling connector relies on inductive and capacitive coupling over a length L.sub.c to "connect" signals from a first circuit card to a second circuit card. The coupling connector includes a flex circuit which in a connected state is compressed to provide a coupling length L.sub.c between the first and second circuit cards. A typical application is for coupling cards to a backplane having a plurality of parallel, signal carrying tracks. The near end of each coupling track is input to a receiver having an input impedance equal to the characteristic impedance of the coupling track. The far end of the coupling track is terminated by a resistor whose value equals the characteristic impedance of the coupling track.

Abstract translation: 耦合连接器依赖于长度Lc上的感应和电容耦合以将信号从第一电路卡“连接”到第二电路卡。 耦合连接器包括在连接状态下被压缩以在第一和第二电路卡之间提供耦合长度Lc的柔性电路。 典型的应用是将卡耦合到具有多个平行的信号承载轨道的背板。 每个耦合轨道的近端被输入到具有等于耦合轨道的特征阻抗的输入阻抗的接收机。 耦合轨道的远端由电阻器终止，其电阻值等于耦合轨迹的特性阻抗。

公开(公告)号：US5269693A

公开(公告)日：1993-12-14

申请号：US980171

申请日：1992-11-23

Applicant: Yasuharu Sekine

Inventor： Yasuharu Sekine

IPC: H01R12/50 ,  H01R31/00 ,  H05K1/14 ,  H01R9/09

CPC classification number: H01R23/68 ,  H05K1/14 ,  H01R31/00 ,  H05K2201/044 ,  Y10T29/49126

Abstract: A connector for connecting printed circuit boards includes a stepped member made of an insulating material and having a lower surface and at least two stepped upper surfaces communicated to the lower surface by a plurality of through holes. A plurality of conductive pins are respectively disposed within the through holes. This configuration allows a plurality of printed circuit board members to be affixed to the lower surface and each of the two upper surfaces so that the plurality of conductive pins allows electrical communication therebetween.

Abstract translation: 用于连接印刷电路板的连接器包括由绝缘材料制成并且具有下表面的阶梯部件和通过多个通孔连通到下表面的至少两个阶梯状上表面。 多个导电针分别设置在通孔内。 这种构造允许多个印刷电路板构件固定到下表面和两个上表面中的每一个，使得多个导电销允许它们之间的电连通。

公开(公告)号：US5128832A

公开(公告)日：1992-07-07

申请号：US603219

申请日：1990-10-25

Applicant: Howard Lawrence

Inventor： Howard Lawrence

IPC: H05K1/00 ,  H05K1/02 ,  H05K7/16

CPC classification number: H05K1/0246 ,  H01R13/6466 ,  H01R13/6471 ,  H05K1/0231 ,  H05K7/16 ,  H05K1/0298 ,  H05K2201/044 ,  H05K2201/10022 ,  H05K2201/10522 ,  H05K2201/10636 ,  Y02P70/611

Abstract: In a "Futurebus+" backplane, at each end of the backplane the signal lines are each electrically connected to a power bus on a face of the board or to a power plane encapsulated in the board via a discrete resistor mounted on the face of the board and separately formed with respect to the other resistors and the ground lines are each electrically connected to the power bus or power plane via a discrete capacitor mounted on the face of the board and separately formed with respect to the other capacitors. Preferably, at each end of the backplane the discrete resistors and capacitors are mounted on both faces of the board, the number on one face being approximately the same as the number on the other face. In the event that a resistor or capacitor should be faulty, only the signal or ground line to which the faulty resistor or capacitor is connected will be out of service until the faulty resistor or capacitor is replaced.

Abstract translation: 在“Futurebus +”背板中，在背板的每一端，信号线分别通过安装在板的表面上的分立电阻电连接到板的表面上的电源总线或封装在电路板中的电源平面 并且相对于其它电阻器分开地形成，并且接地线通过安装在电路板的表面上并且相对于其它电容器单独形成的分立电容器电连接到电力总线或电源平面。 优选地，在背板的每一端，分立电阻器和电容器安装在板的两个面上，一个面上的数量与另一个面上的数量大致相同。 如果电阻或电容器有故障，只有连接有故障电阻或电容器的信号或接地线将不再使用，直到有故障的电阻或电容器被更换为止。

公开(公告)号：US5117331A

公开(公告)日：1992-05-26

申请号：US701180

申请日：1991-05-16

Applicant: Ghassan R. Gebara

Inventor： Ghassan R. Gebara

IPC: G06F13/40 ,  H05K1/02

CPC classification number: H05K1/0246 ,  G06F13/4086 ,  H04L25/0298 ,  H05K1/0231 ,  H05K2201/044 ,  H05K2201/10022 ,  H05K2201/10174

Abstract: A bus system wherein the control signal traces on the system board are routed to eliminate noise caused by transmission line reflections. Each control signal trace is routed between the bus controller and the corresponding terminal of the first or last connector of the bus. One side of an isolation resistor whose value preferably matches the lowest impedance of a fully loaded bus is connected to the corresponding terminal of either the first or last connector in the bus connector row through a relatively short trace. The other side of the isolation resistor is connected to a trace which is routed directly to the corresponding terminal of the first of a series of system loads on the system board. The system load traces are then serially continued between each corresponding terminal of each system load until the corresponding terminal of every system load is connected. The serially routed traces are then terminated at the last system load with an RC series network forming an ac termination. This procedure is repeated for each bus control signal. Also, each of the control signals is coupled to ground through a Schottky diode having a forward bias of approximately one volt or less, in order to clamp the control signals to ground to prevent excessive undershoot.

Abstract translation: 其中系统板上的控制信号迹线被路由以消除由传输线反射引起的噪声的总线系统。 每个控制信号迹线在总线控制器和总线的第一个或最后一个连接器的相应端子之间布线。 隔离电阻器的一端优选地与满载总线的最低阻抗匹配，通过相对较短的迹线连接到总线连接器行中的第一个或最后一个连接器的对应端子。 隔离电阻的另一侧连接到轨迹，该迹线直接路由到系统板上一系列系统负载中第一个的对应端子。 然后系统负载轨迹在每个系统负载的每个相应终端之间连续连续，直到每个系统负载的相应终端连接。 然后在最后的系统负载下，使用形成交流终端的RC系列网络终止串行路由的跟踪。 对于每个总线控制信号重复该过程。 此外，每个控制信号通过具有大约一伏或更小的正向偏压的肖特基二极管耦合到地，以便将控制信号钳位到地以防止过多的下冲。

公开(公告)号：US5092782A

公开(公告)日：1992-03-03

申请号：US648950

申请日：1991-02-01

Applicant: Brian S. Beaman

Inventor： Brian S. Beaman

IPC: H01R12/00 ,  H01R12/71 ,  H01R13/24 ,  H01R43/00 ,  H05K1/00 ,  H05K3/00 ,  H05K3/32 ,  H05K3/40 ,  H05K3/46

CPC classification number: H01R13/2414 ,  H01R12/714 ,  H01R43/007 ,  H05K3/326 ,  H05K3/4092 ,  H05K1/0298 ,  H05K2201/0133 ,  H05K2201/0397 ,  H05K2201/044 ,  H05K2201/0919 ,  H05K2201/10393 ,  H05K3/0017 ,  H05K3/4007 ,  Y10T29/49126

Abstract: An integral elastomeric card edge connector provides shorter signal paths through the contact with reduced interference. The card edge contact allows high density interconnection between several layers of multi-layer circuit card without routing signal paths to the card surface. Elastomeric contact tab supports provide positive contact pressure and the necessary wipe action to ensure electrical contact. The process for forming the integral contacts begins with a standard multi-layer card which is then beveled, etched to expose the contact tabs, filled with elastomeric material and processed to expose the tabs supported by elastomeric columns. The connector may be used in card on board technologies or for the connection of multi-chip organic substrates to boards or to other substrates.

公开(公告)号：US5091822A

公开(公告)日：1992-02-25

申请号：US535487

申请日：1990-06-11

Applicant: Tokuhei Takashima

Inventor： Tokuhei Takashima

IPC: G06F1/18 ,  G06F13/40 ,  G06F15/173 ,  H05K1/02 ,  H05K1/14

CPC classification number: H05K1/0228 ,  G06F13/409 ,  H05K1/14 ,  H05K1/0245 ,  H05K2201/044 ,  H05K2201/097

Abstract: A radial type of parallel system bus structure used bus wire-printed disks each having printed signal conductors of equal length extending radially from a common contact center. Each printed signal conductor comprises two twisted conductor lines, and each conductor line consists of many segments disposed alternately on opposite surfaces of the disk, the successive segments of each line being connected by plating in through-holes in the disk. The radial arrangement of signal conductors permits connection of selected CPU boards via equal length of signal path. Also, the use of twisted conductor lines improves the signal transmission characteristics of the bus in high-frequency ranges.

公开(公告)号：US4973794A

公开(公告)日：1990-11-27

申请号：US264912

申请日：1988-10-31

Applicant: Douglas S. Steele

Inventor： Douglas S. Steele

IPC: H01B7/08 ,  H01B11/20 ,  H04B3/28 ,  H05K1/02 ,  H05K1/11

CPC classification number: H05K1/0219 ,  H01B11/203 ,  H01B7/0861 ,  H04B3/28 ,  H05K1/0215 ,  H05K1/117 ,  H05K2201/044

Abstract: A cable assembly for an electrical signal transmission system comprises a plurality of elongated conductors, a conductive shield surrounding each conductor, and a dielectric layer between each shield and its respective conductor. The shielded conductors are embedded in a dielectric material and the dielectric material is wrapped in a double conductive shield. Adhesive layers are located between the double shield and the dielectric material and between the two shields making up the double shield. This cable assembly results in a signal transmission apparatus which has increased immunity to the effects of external electromagnetic fields, electrostatic charge, and mechanical vibration. It is particularly useful in transmitting low level signals produced by ionization detectors used in x-ray inspection apparatus.

Abstract translation: 用于电信号传输系统的电缆组件包括多个细长导体，围绕每个导体的导电屏蔽以及每个屏蔽件及其相应导体之间的介电层。 屏蔽导体嵌入电介质材料中，电介质材料被包裹在双重导电屏蔽中。 粘合剂层位于双层屏蔽和电介质材料之间以及组成双层屏蔽的两个屏蔽之间。 该电缆组件产生信号传输装置，其对外部电磁场，静电荷和机械振动的影响具有增强的抗扰度。 在用于X射线检查装置中的电离检测器所产生的低电平信号中特别有用。

公开(公告)号：US4694123A

公开(公告)日：1987-09-15

申请号：US339034

申请日：1982-01-13

Applicant: Edwin M. Massey

Inventor： Edwin M. Massey

IPC: H02G5/00 ,  H05K1/02 ,  H05K3/42 ,  H05K3/46 ,  H01B7/08

CPC classification number: H02G5/005 ,  H05K3/4641 ,  H05K1/0263 ,  H05K2201/044 ,  H05K2201/0919 ,  H05K2201/09309 ,  H05K2201/09845 ,  H05K2201/10272 ,  H05K3/429

Abstract: A backplane power distribution system characterized by generally uniform current densities so as to be capable of handling very high levels of current. This is achieved with a stepped backplane construction. For example, in a system having, in order, a first conductive layer, a first dielectric layer, a second conductive layer, and a second dielectric layer, the second conductive and dielectric layers extend transversely beyond the first conductive and dielectric layers to present a substantial exposed area of the second conductive layer. Typically, a rectangular metal bus bar is bolted to the backplane to make contact with the exposed area, and power supply connections to the bus bar are made in any convenient manner.

Abstract translation: 背板配电系统，其特征在于具有大致均匀的电流密度，以便能够处理非常高水平的电流。 这是通过阶梯式背板结构实现的。 例如，在依次具有第一导电层，第一介电层，第二导电层和第二介电层的系统中，第二导电和介电层横向延伸超过第一导电层和介电层，以呈现 第二导电层的实质暴露面积。 通常，矩形金属母线被螺栓连接到背板以与暴露的区域接触，并且以任何方便的方式制造到母线的电源连接。