公开(公告)号：US20070104926A1

公开(公告)日：2007-05-10

申请号：US11595088

申请日：2006-11-09

Applicant: Christian Goebl ,  Rainer Popp

Inventor： Christian Goebl ,  Rainer Popp

IPC: B32B15/04 ,  B32B3/02

CPC classification number: H01L25/165 ,  H01L23/3675 ,  H01L24/33 ,  H01L25/162 ,  H01L2924/1301 ,  H01L2924/13091 ,  H05K1/141 ,  H05K1/147 ,  H05K1/189 ,  H05K3/366 ,  H05K7/20445 ,  H05K7/209 ,  H05K2201/0352 ,  H05K2201/049 ,  H05K2201/09736 ,  H05K2201/10674 ,  Y10T428/24777 ,  Y10T428/31678 ,  H01L2924/00

Abstract: A frequency converter is presented. The frequency converter includes a circuit module, which is interconnected to a circuit board and is connected to a heat sink. For attaining a frequency converter in a modular version with optimal cooling properties, the circuit module has a flexible, electrically insulating plastic film, which on one side has a circuit-structured logic metal layer and on the opposite side has a circuit-structured power metal layer that is contacted with a contact edge to a peripheral portion of the circuit board. The flexible circuit module protrudes at an angle away from the circuit board. Power semiconductor chips are contacted on the power metal layer. A substrate is secured to the heat sink and is embodied with a circuit structure for contacting the power semiconductor chips.

Abstract translation: 提出了一种变频器。 变频器包括电路模块，其连接到电路板并连接到散热器。 为了以具有最佳冷却特性的模块化版本获得变频器，电路模块具有柔性的电绝缘塑料膜，其一侧具有电路结构的逻辑金属层，并且在相对侧上具有电路结构的功率金属 该层与电路板的周边部分的接触边缘接触。 柔性电路模块以远离电路板的角度突出。 功率半导体芯片在功率金属层上接触。 基板被固定到散热器，并且具有用于接触功率半导体芯片的电路结构。

公开(公告)号：US20070102796A1

公开(公告)日：2007-05-10

申请号：US11595082

申请日：2006-11-09

Applicant: Christian Goebl ,  Karlheinz Augustin

Inventor： Christian Goebl ,  Karlheinz Augustin

IPC: H01L23/02 ,  H01L23/34

CPC classification number: H05K3/4007 ,  H01L23/49833 ,  H01L23/4985 ,  H01L23/5385 ,  H01L23/5387 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/45 ,  H01L24/48 ,  H01L24/50 ,  H01L25/072 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/24226 ,  H01L2224/2518 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48472 ,  H01L2224/48724 ,  H01L2224/48747 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01068 ,  H01L2924/01082 ,  H01L2924/19107 ,  H01L2924/20757 ,  H05K1/0265 ,  H05K1/0393 ,  H05K1/09 ,  H05K3/4046 ,  H05K2201/0352 ,  H05K2201/0367 ,  H05K2201/09736 ,  H05K2201/10166 ,  H05K2203/049 ,  H01L2924/00

Abstract: A power semiconductor module is presented. The power semiconductor module has a substrate, a composite film, and a power semiconductor component between the substrate and the composite film. The composite film has a thin circuit-structured logic metal layer and a thick circuit-structured power metal layer and between them a thin electrically insulating plastic film. The composite film includes contact nubs, which provide bonding to the power semiconductor component. Feedthrough holes are provided between the logic metal layer and the power metal layer. The plastic film in the region of the respective through-plated hole includes a recess in a region that is free of the logic metal layer. A segment of a flexible thin wire extends through the free region of the logic metal layer and through the recess in the plastic film and is bonded to the logic metal layer and the power metal layer by means of bonding sites.

Abstract translation: 介绍了功率半导体模块。 功率半导体模块在基板和复合膜之间具有基板，复合膜和功率半导体部件。 复合膜具有薄的电路结构的逻辑金属层和厚电路结构的功率金属层，并且在它们之间是薄的电绝缘塑料膜。 复合膜包括提供与功率半导体部件的接合的接触凸块。 在逻辑金属层和功率金属层之间提供穿通孔。 在相应的通孔的区域中的塑料膜包括在没有逻辑金属层的区域中的凹部。 柔性细线的一段延伸穿过逻辑金属层的自由区域并穿过塑料膜中的凹槽，并通过结合位点结合到逻辑金属层和功率金属层。

公开(公告)号：US20070074392A1

公开(公告)日：2007-04-05

申请号：US11607156

申请日：2006-12-01

Applicant: Reed Gleason ,  Michael Bayne ,  Kenneth Smith

Inventor： Reed Gleason ,  Michael Bayne ,  Kenneth Smith

IPC: H01K3/10 ,  H05K3/20

CPC classification number: G01R1/06744 ,  G01R1/06738 ,  G01R1/0735 ,  G01R3/00 ,  H05K3/205 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/09736 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T29/49174 ,  Y10T29/49204 ,  Y10T29/49208 ,  Y10T29/49213 ,  Y10T29/49218 ,  Y10T29/49815

Abstract: A substrate, preferably constructed of a ductile material and a tool having the desired shape of the resulting device for contacting contact pads on a test device is brought into contact with the substrate. The tool is preferably constructed of a material that is harder than the substrate so that a depression can be readily made therein. A dielectric (insulative) layer, that is preferably patterned, is supported by the substrate. A conductive material is located within the depressions and then preferably lapped to remove excess from the top surface of the dielectric layer and to provide a flat overall surface. A trace is patterned on the dielectric layer and the conductive material. A polyimide layer is then preferably patterned over the entire surface. The substrate is then removed by any suitable process.

公开(公告)号：US07193324B2

公开(公告)日：2007-03-20

申请号：US10905803

申请日：2005-01-21

Applicant: Chi-Hsing Hsu

Inventor： Chi-Hsing Hsu

IPC: H01L23/48

CPC classification number: H05K1/0265 ,  H01L23/49822 ,  H01L2223/6627 ,  H01L2924/0002 ,  H01L2924/19032 ,  H01L2924/3011 ,  H05K1/0216 ,  H05K3/107 ,  H05K2201/09236 ,  H05K2201/09318 ,  H05K2201/09736 ,  H01L2924/00

Abstract: A circuit structure for a package substrate or a circuit board is provided. The circuit structure has a dielectric layer with an upper surface and a lower surface, at least a first line and at least a second line. The first line is disposed on the dielectric layer on which a base of the first line is aligned with the upper surface. In addition, the second line is disposed on the dielectric layer on which a base of the second line is embedded below the upper surface. Since the second line is embedded into the dielectric layer, the distance with a reference plane is reduced and the crosstalk between the signals is further effectively reduced.

Abstract translation: 提供了一种用于封装基板或电路板的电路结构。 电路结构具有具有上表面和下表面的电介质层，至少第一线和至少第二线。 第一线设置在第一线的基底与上表面对准的电介质层上。 此外，第二线设置在第二线的基底嵌入其上表面的电介质层上。 由于第二行被嵌入到介电层中，所以与参考平面的距离减小，并且信号之间的串扰被进一步有效地降低。

公开(公告)号：US20070023419A1

公开(公告)日：2007-02-01

申请号：US11529644

申请日：2006-09-28

Applicant: Kevin Ptasienski ,  James McMillin ,  Thomas Nagl ,  Rolando Juliano

Inventor： Kevin Ptasienski ,  James McMillin ,  Thomas Nagl ,  Rolando Juliano

IPC: H05B3/16

CPC classification number: H05B3/20 ,  H05B3/26 ,  H05B3/28 ,  H05B2203/003 ,  H05B2203/013 ,  H05B2203/017 ,  H05B2203/037 ,  H05K1/0263 ,  H05K1/0265 ,  H05K1/167 ,  H05K3/1241 ,  H05K2201/09736 ,  H05K2203/0126 ,  Y10T29/49099

Abstract: A layered heater is provided that includes at least one resistive layer having a resistive circuit pattern, the resistive circuit pattern defining a length, a width, and a thickness, wherein the thickness varies along the length of the resistive circuit pattern and/or the width of the resistive circuit pattern for a variable watt density. The present disclosure also provides layered heaters having a resistive circuit pattern with a variable thickness along with a variable width and/or spacing of the resistive circuit pattern in order to produce a variable watt density.

Abstract translation: 提供了层状加热器，其包括具有电阻电路图案的至少一个电阻层，电阻电路图案限定长度，宽度和厚度，其中厚度沿电阻电路图案的长度和/或宽度 的电阻电路图案用于可变瓦特密度。 本公开还提供了具有可变厚度的电阻电路图案以及电阻电路图案的可变宽度和/或间隔以便产生可变瓦特密度的分层加热器。

公开(公告)号：US20070022602A1

公开(公告)日：2007-02-01

申请号：US11495045

申请日：2006-07-28

Applicant: Howard Kingsford ,  William Clune ,  Kristel Ferry

Inventor： Howard Kingsford ,  William Clune ,  Kristel Ferry

IPC: H01K3/22

CPC classification number: B29C43/222 ,  A44B18/0049 ,  B29C43/46 ,  B29C2043/461 ,  B29C2043/465 ,  B29L2031/729 ,  H05K1/0284 ,  H05K1/0393 ,  H05K3/0014 ,  H05K3/0058 ,  H05K3/0091 ,  H05K3/107 ,  H05K3/125 ,  H05K3/1258 ,  H05K3/28 ,  H05K2201/0129 ,  H05K2201/09036 ,  H05K2201/09118 ,  H05K2201/09727 ,  H05K2201/09736 ,  H05K2201/209 ,  H05K2203/0108 ,  H05K2203/013 ,  H05K2203/0143 ,  H05K2203/1366 ,  H05K2203/1545 ,  Y10T29/49128 ,  Y10T29/49158

Abstract: A method of forming a flexible conductive strip includes: molding a continuous, flexible base of an electrically insulating thermoplastic resin, while forming channels in a surface of the base; at least partially filling the formed channels with a flowable, electrically conductive composition; and then stabilizing the flowable composition in the channels to form a pattern of stable, electrically conductive traces within the channels. A method of forming a flexible circuit board having loop-engageable touch fastener elements includes: molding a continuous, flexible base from an electrically insulating thermoplastic resin, while forming a field of stems integrally molded with and extending from a first side of the base; applying a conductive material to the base to form a pattern of electrically conductive traces in accordance with a circuit design; and forming loop-engageable heads on the stems.

Abstract translation: 一种形成柔性导电带的方法包括：在电绝缘热塑性树脂的模制中模制连续的柔性基底，同时在基底表面形成通道; 至少部分地用可流动的导电组合物填充所形成的通道; 然后稳定通道中的可流动组合物，以在通道内形成稳定的导电迹线图案。 一种形成具有可环路接触的紧固件元件的柔性电路板的方法包括：从电绝缘热塑性树脂模制连续的柔性基座，同时形成与基座的第一侧整体模制并从基座的第一侧延伸的杆的场; 将导电材料施加到基底以根据电路设计形成导电迹线图案; 并在茎上形成可圈套的头部。

公开(公告)号：US20070015363A1

公开(公告)日：2007-01-18

申请号：US11484520

申请日：2006-07-11

Applicant: Nobuaki Hashimoto

Inventor： Nobuaki Hashimoto

IPC: H01B13/00 ,  H01L21/302

CPC classification number: H01L23/3114 ,  G02F1/13452 ,  H01L23/5228 ,  H01L24/11 ,  H01L24/12 ,  H01L24/16 ,  H01L24/83 ,  H01L24/90 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/1148 ,  H01L2224/13099 ,  H01L2224/1319 ,  H01L2224/16225 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/83856 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01044 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01066 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01088 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/351 ,  H05K1/167 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/09727 ,  H05K2201/09736 ,  H05K2201/09909 ,  H05K2203/0361 ,  H01L2924/00 ,  H01L2924/01028

Abstract: An electronic board includes: a substrate; and a wiring pattern provided on the substrate and having a part that forms a resistance element, the part having wiring specifications that are different from those of other parts.

Abstract translation: 电子板包括：基板; 以及设置在基板上并具有形成电阻元件的部分的布线图案，该布线图形具有与其它部分不同的布线规格。

公开(公告)号：US20060288570A1

公开(公告)日：2006-12-28

申请号：US11512961

申请日：2006-08-31

Applicant: Todd Cannon ,  William Csongradi ,  Benjamin Fox ,  Roger Gravrok ,  Mark Hoffmeyer ,  David Pease ,  Ryan Schlichting

Inventor： Todd Cannon ,  William Csongradi ,  Benjamin Fox ,  Roger Gravrok ,  Mark Hoffmeyer ,  David Pease ,  Ryan Schlichting

IPC: H05K3/36 ,  H05K1/00

CPC classification number: H05K1/024 ,  H01P3/088 ,  H05K3/222 ,  H05K3/4614 ,  H05K2201/0187 ,  H05K2201/09036 ,  H05K2201/09736 ,  Y10T29/49126 ,  Y10T29/49147 ,  Y10T29/49155

Abstract: A method and structures are provided for implementing customizable dielectric printed circuit card traces. A void is defined near selected signal traces. The void is then filled with a dielectric material having a predefined dielectric property. The dielectric material is selected to alter at least one predefined electrical property of the selected signal traces, such as, coupling, propagation delay and attenuation. In one embodiment, an outer layer of a printed circuit card includes a plurality of signal traces and a mating circuit card layer including a plurality of matching signal traces is attached to the outer layer of the printed circuit card to create a cavity near selected signal traces. The cavity is filled with the selected dielectric material. In another embodiment, dielectric material is selectively removed near signal traces on an outer layer of the printed circuit card to define a void near selected signal traces.

Abstract translation: 提供了一种用于实现可定制的电介质印刷电路卡迹线的方法和结构。 在选择的信号迹线附近定义空白。 然后用具有预定介电特性的电介质材料填充该空隙。 选择介电材料以改变所选择的信号迹线的至少一个预定的电性质，例如耦合，传播延迟和衰减。 在一个实施例中，印刷电路卡的外层包括多个信号迹线，并且包括多个匹配信号迹线的匹配电路卡层附接到印刷电路卡的外层以在所选择的信号迹线附近产生空腔 。 空腔填充有所选择的电介质材料。 在另一个实施例中，在印刷电路卡的外层上的信号迹线附近选择性地去除电介质材料，以在选定的信号迹线附近限定空隙。

公开(公告)号：US07132608B2

公开(公告)日：2006-11-07

申请号：US11052817

申请日：2005-02-09

Applicant: Shinichi Endoh ,  Masaharu Iwasa ,  Hideyuki Ito

Inventor： Shinichi Endoh ,  Masaharu Iwasa ,  Hideyuki Ito

IPC: H05K1/03

CPC classification number: H05K1/117 ,  H05K1/092 ,  H05K3/0052 ,  H05K3/207 ,  H05K3/28 ,  H05K3/403 ,  H05K2201/035 ,  H05K2201/09736 ,  H05K2203/0113

Abstract: A film having a recess provided in a surface of the film is provided. The recess included a first portion and a second portion connected with the first portion. The second portion is deeper than the first portion. The recess in the film is filled with a conductive paste so as to fill the first portion and the second portion of the recess with a first portion and a second portion of the conductive paste, respectively. Then, the surface of the film is attached onto a surface of a substrate. The conductive paste is transferred to the surface of the substrate by removing the film from the substrate so as to transfer the first portion and the second portion of the conductive paste to the surface of the substrate. The transferred first portion and the transferred second portion of the conductive paste are baked to provide a first portion and the second portion of a conductor pattern, respectively. An insulating layer is provided on the conductor pattern. Then, the substrate, the insulating layer, and the conductor pattern are cut along a first border extending across the second portion of the conductor pattern, thus providing an electronic device. In this method, the side electrode is formed simultaneously to the cutting of the substrate.

Abstract translation: 提供了具有设置在膜的表面中的凹部的膜。 凹部包括与第一部分连接的第一部分和第二部分。 第二部分比第一部分更深。 膜中的凹部填充有导电膏，以分别用导电膏的第一部分和第二部分填充凹部的第一部分和第二部分。 然后，将膜的表面附着在基板的表面上。 通过从基板去除膜将导电浆料转移到基板的表面，以将导电浆料的第一部分和第二部分转移到基板的表面。 导电浆料的转移的第一部分和转移的第二部分被烘烤以分别提供导体图案的第一部分和第二部分。 绝缘层设置在导体图案上。 然后，沿着延伸穿过导体图案的第二部分的第一边界切割基板，绝缘层和导体图案，从而提供电子设备。 在该方法中，侧面电极与基板的切割同时形成。

公开(公告)号：US20060137904A1

公开(公告)日：2006-06-29

申请号：US11210860

申请日：2005-08-25

Applicant: Eiji Hirata

Inventor： Eiji Hirata

IPC: H05K1/03

CPC classification number: H05K3/4652 ,  H05K3/064 ,  H05K3/243 ,  H05K3/421 ,  H05K3/428 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09736 ,  H05K2203/0542 ,  H05K2203/1476 ,  Y10T29/49156 ,  Y10T29/49165

Abstract: This invention provides a multilayer printed wiring board having flat via holes. This is a multilayer printed wiring board formed by alternately laminating multiple metal foils and insulating layers, in which an interlayer connection via pad provided in a first insulating layer, a wiring circuit and an interlayer connection via bottom pad of a second insulating layer are provided in the same surface layer and at least the interlayer connection via pad and the interlayer connection via bottom pad of the second insulating layer have the same thickness.

Abstract translation: 本发明提供一种具有平坦通孔的多层印刷线路板。 这是通过交替层叠多个金属箔和绝缘层而形成的多层印刷布线板，其中通过设置在第一绝缘层中的层间连接通孔焊盘，布线电路和经由第二绝缘层的底焊盘的层间连接设置在 相同的表面层和至少层间连接通孔焊盘和经由第二绝缘层的底部焊盘的层间连接具有相同的厚度。