Abstract:
A backlight unit includes a base substrate and a first electrode which is formed on the base substrate in a line. An electron emission layer is formed on the first electrode in the substantially same pattern as the first electrode. A second electrode supporter is formed on the base substrate and disposed on sides of the first electrode and the electron emission layer. A second electrode is formed on the second electrode supporter and has an aperture pattern. A third electrode is formed on the front substrate for accelerating electrons emitted from the electron emission layer. A phosphor layer is formed on the third electrode responsive to electrons accelerated by the third electrode.
Abstract:
A system and method for addressing individual electron emitters in an emitter array is disclosed. The system includes an emitter array comprising a plurality of emitter elements arranged in a non-rectangular layout and configured to generate at least one electron beam and a plurality of extraction grids positioned adjacent to the emitter array, each extraction grid being associated with at least one emitter element to extract the at least one electron beam therefrom. The field emitter array system also includes a plurality of voltage control channels connected to the plurality of emitter elements and the plurality of extraction grids such that each of the emitter elements and each of the extraction grids is individually addressable. In the field emitter array system, the number of voltage control channels is equal to the sum of a pair of integers closest in value whose product equals the number of emitter elements.
Abstract:
A method is provided for preventing electron emission from a sidewall (34) of a gate electrode (20) and the edge (28) of the gate electrode stack of a field emission device (10), the gate electrode (20) having a surface (24) distally disposed from an anode (40) and a side (26) proximate to emission electrodes (38). The method comprises growing dielectric material (22) over the surface (24) and side (26) of the gate electrode (20), and performing an anisotropic etch (32) normal to the surface (24) to remove the dielectric material (22) from the surface (24) and leaving at least a portion of the dielectric material (22) on the side (26) of the gate electrode (20) and edge (28) of the gate electrode stack.
Abstract:
A method of manufacturing a field emission device (FED), which reduces the number of photomask patterning processes and improves the manufacturing yield of the FED, is provided. The method includes steps of sequentially forming a cathode layer, a first insulating layer, and a gate layer on a substrate, forming a protection layer on the gate electrode layer, etching portions of the protection layer and gate electrode to form a plurality of first opening holes where portions of the first insulating layer being exposed through the first opening holes, forming a second insulating layer on the protection layer and on the first opening holes, forming a focus electrode layer on the second insulating layer, forming a photoresist layer on the focus electrode layer, etching a portion of the photoresist layer and a portion of the focus electrode layer to form a second opening hole where a portion of the second insulating layer being exposed through the second opening hole, and forming emitter holes exposing a portion of the cathode layer by etching the exposed surface of the second insulating layer to a bottom surface of the first insulating layer. After removing the photoresist layer electron emission emitters are formed on the cathode layer.
Abstract:
An electron emission device includes a base substrate, at least one isolation layer on the base substrate, the isolation layer having a first lateral side and a second lateral side opposite the first lateral side, first and second electrodes on the base substrate along the first and second lateral sides of the isolation layer, respectively, a first electron emission layer between the first electrode and the first lateral side of the isolation layer, and a second electron emission layer between the second electrode and the second lateral side of the isolation layer.
Abstract:
An electron emission type backlight unit which may include a front substrate and a rear substrate, a gate electrode, an insulating unit disposed on the gate electrode, a cathode disposed on the insulating unit that intersects the gate electrode, a first opening formed in the cathode to expose the gate electrode, a second opening formed in the insulating unit to expose the gate electrode, in which the second opening connects to the first opening, an electron emitting unit disposed on the cathode that exposes the gate electrode, in which the electron emitting unit is formed to trace along a boundary of the cathode that defines the first opening, an auxiliary gate electrode disposed on the gate electrode, in which the auxiliary gate electrode passes through the first opening and the second opening; and an anode and a light emitting unit.
Abstract:
In an electron emission device, the surface roughness of a substrate with driving electrodes and an insulating layer is optimized. The electron emission device includes first and second substrates facing each other with a predetermined distance therebetween. An electron emission unit is formed on a surface of the first substrate facing the second substrate, and includes electron emission regions, a plurality of driving electrodes, and an insulating layer for insulating the driving electrodes from each other. A light emission unit is formed on a surface of the second substrate facing the first substrate, and includes phosphor layers and an anode electrode. The first substrate satisfies the following condition: 0.5 nm≦Ra≦1.8 nm, where Ra indicates the average roughness of the surface of the first substrate facing the second substrate.
Abstract translation:在电子发射器件中,优化了具有驱动电极和绝缘层的衬底的表面粗糙度。 电子发射装置包括彼此面对彼此以预定距离的第一和第二基板。 电子发射单元形成在面向第二衬底的第一衬底的表面上,并且包括电子发射区域,多个驱动电极和用于使驱动电极彼此绝缘的绝缘层。 在与第一基板相对的第二基板的表面上形成发光单元,并且包括荧光体层和阳极电极。 第一衬底满足以下条件:0.5nm <= Ra <= 1.8nm,其中Ra表示面向第二衬底的第一衬底的表面的平均粗糙度。
Abstract:
An electron emission device with conductive layers for preventing accumulation of static charges on an insulating layer of the device is shown that does not require an independent driving circuit. The device includes cathode electrodes formed on a substrate and separated from gate electrodes by an insulating layer formed over the cathode electrodes, all inside a partial vacuum chamber. Crossings of cathode and gate electrodes form the display areas while in the non-display areas of the insulating layer, that are susceptible to accumulation of electrostatic charge, conductive layers are formed parallel to the cathode or gate electrodes, for the most part separated from these electrodes by the insulating layer. Outside the device chamber, the conductive layers are electrically coupled to their corresponding electrodes. Conductive layers thus formed and coupled discharge accumulated static charge over the insulating layers inside the device to the outside circuit.
Abstract:
The present invention relates to gated nanorod field emission devices, wherein such devices have relatively small emitter tip-to-gate distances, thereby providing a relatively high emitter tip density and low turn on voltage. Such methods employ a combination of traditional device processing techniques (lithography, etching, etc.) with electrochemical deposition of nanorods. These methods are relatively simple, cost-effective, and efficient; and they provide field emission devices that are suitable for use in x-ray imaging applications, lighting applications, flat panel field emission display (FED) applications, etc.
Abstract:
A method for forming patterned insulating elements on a substrate includes a plurality of exposure steps of exposing a photosensitive paste provided on the substrate through at least one mask having a predetermined pattern; a developing step of developing the exposed photosensitive paste to form a precursor pattern; and a firing step of firing the precursor pattern to form the patterned insulating elements. This method is applied to a method for forming an electron source and a method for forming an image display device including the electron source.