公开(公告)号：US20080092376A1

公开(公告)日：2008-04-24

申请号：US11552368

申请日：2006-10-24

Applicant: Jaroslaw A. Magera ,  Gregory J. Dunn ,  Jovica Savic

Inventor： Jaroslaw A. Magera ,  Gregory J. Dunn ,  Jovica Savic

IPC: H01L21/00

CPC classification number: H05K3/20 ,  H05K1/167 ,  H05K3/06 ,  H05K3/205 ,  H05K3/244 ,  H05K2201/0361 ,  H05K2203/0376 ,  H05K2203/0384 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49156

Abstract: Fabricating (100, 1300) a printed circuit board includes fabricating patterned conductive traces (305, 310, 1410, 1415) onto a foil, laminating the patterned conductive traces to a printed circuit board substrate (405, 1505) by pressing on the foil, such that the conductive traces are pressed into a dielectric layer of the printed circuit board, and removing the foil to expose a co-planar surface of conductive trace surfaces and dielectric surfaces. Removal may be done by peeling (125) and/or etching (130, 1315).

Abstract translation: 制造（100,1300）印刷电路板包括在箔上制造图案化的导电迹线（305,310,1410,1415），通过压在箔上将图案化的导电迹线层压到印刷电路板衬底（405,1505）上， 使得导电迹线被压入印刷电路板的电介质层，并且去除箔以暴露导电迹线表面和电介质表面的共面表面。 可以通过剥离（125）和/或蚀刻（130,1315）进行去除。

公开(公告)号：US20070074902A1

公开(公告)日：2007-04-05

申请号：US11452321

申请日：2006-06-14

Applicant: Eiji Hirata

Inventor： Eiji Hirata

IPC: H05K1/11 ,  H01K3/10

CPC classification number: H05K3/20 ,  H05K3/0035 ,  H05K3/0038 ,  H05K3/06 ,  H05K3/421 ,  H05K3/427 ,  H05K3/4652 ,  H05K2201/0361 ,  H05K2201/0394 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2203/0384 ,  H05K2203/1184 ,  Y10T29/49156 ,  Y10T29/49165

Abstract: The present invention provides a printed-wiring board which can make the electric wiring densified and can be thinned, even when having a BVH of a non-penetration hole filled with a selectively plating, formed therein for interfacial connection means. The printed-wiring board has a blind via hole connecting different wiring-pattern-formed layers with each other, wherein the blind via hole is a non-penetration hole filled with a plating, and the plating is not formed on a wiring pattern including the round of the blind via hole. The process for manufacturing the printed-wiring board having a blind via hole connecting different wiring-pattern-formed layers with each other includes the steps of: sequentially layering at least a metallic foil and a barrier metal layer to be differently etched from the metallic foil, on an insulation layer; preparing such a non-penetration hole as to reach a desired wiring-pattern-forming layer, by directly irradiating the barrier metal layer with a laser beam; cleaning the inside of the non-penetration hole by desmearing treatment; filling the non-penetration hole with a plating, and at the same time forming a plating on the barrier metal layer, by plating treatment; removing the plating which has been formed on the barrier metal layer and protrudes from the non-penetration hole, by etching treatment; peeling the barrier metal layer; and etching the metallic foil to form a wiring pattern.

Abstract translation: 本发明提供了一种印刷电路板，即使在其中形成有用于界面连接装置形成的选择性镀覆的非穿透孔的BVH时，也可以使电线致密化并且可以变薄。 印刷布线板具有将不同的布线图案形成的层彼此连接的盲孔，其中，盲通孔是填充有镀层的非贯通孔，并且不形成在包括 盲孔通孔。 制造具有连接不同布线图案形成层的盲通孔的印刷电路板的方法包括以下步骤：顺序地分层至少金属箔和阻挡金属层以与金属箔不同地蚀刻 ，在绝缘层上; 通过用激光束直接照射阻挡金属层，制备这样的非穿透孔以达到所需的布线图形形成层; 通过洗涤处理清洁非穿透孔的内部; 用电镀填充非贯穿孔，同时通过电镀处理在阻挡金属层上形成电镀; 通过蚀刻处理去除已经形成在阻挡金属层上并从非穿透孔突出的电镀; 剥离阻挡金属层; 并蚀刻金属箔以形成布线图案。

公开(公告)号：US07176582B2

公开(公告)日：2007-02-13

申请号：US10510591

申请日：2003-04-08

Applicant: Hendrik Klaas Kloen ,  Gerardus Henricus Franciscus Willebrordus Steenbruggen ,  Peter Wilhelmus Maria Van De Water

Inventor： Hendrik Klaas Kloen ,  Gerardus Henricus Franciscus Willebrordus Steenbruggen ,  Peter Wilhelmus Maria Van De Water

IPC: H01L23/52 ,  H01L23/48 ,  H01L29/40

CPC classification number: H05K3/062 ,  H01L21/4821 ,  H01L21/4828 ,  H01L21/4832 ,  H01L23/3107 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16245 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48237 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/07811 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H05K1/185 ,  H05K2201/0361 ,  H05K2203/0384 ,  H05K2203/1469 ,  H05K2203/1476 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: In an example embodiment, the semiconductor device comprises a carrier and a semiconductor element, such as an integrated circuit. The carrier is provided with apertures, thereby defining connecting conductors having side faces. Notches are present in the side faces. The semiconductor element is enclosed in an encapsulation that extends into the notches in the carrier. As a result, the encapsulation is mechanically anchored in the carrier. The semiconductor device can be made in a process wherein, after the encapsulating step, no lithographic steps are necessary.

Abstract translation: 在示例性实施例中，半导体器件包括载体和诸如集成电路的半导体元件。 载体设置有孔，从而限定具有侧面的连接导体。 凹槽存在于侧面。 半导体元件被封装在延伸到载体中的凹口中的封装中。 结果，封装被机械地锚定在载体中。 半导体器件可以在其中在封装步骤之后不需要光刻步骤的过程中制成。

公开(公告)号：US07176382B1

公开(公告)日：2007-02-13

申请号：US10189674

申请日：2002-07-08

Applicant: Zhong-You Shi ,  Lakhi Nandal Goenka

Inventor： Zhong-You Shi ,  Lakhi Nandal Goenka

IPC: H05K1/00 ,  H05K7/20 ,  H01B7/42

CPC classification number: H05K1/0272 ,  H05K3/4641 ,  H05K2201/0361 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49165

Abstract: A multi-layer circuit board with heat pipes and a method for forming a multi-layer circuit board with heat pipes. The method includes forming channels in a first and second pre-circuit assembly and attaching the first pre-circuit assembly to the second pre-circuit assembly such that the channels cooperatively form a heat pipe.

Abstract translation: 具有热管的多层电路板和用热管形成多层电路板的方法。 该方法包括在第一和第二预循环组件中形成通道并将第一预循环组件附接到第二预循环组件，使得通道协同地形成热管。

公开(公告)号：US07175919B2

公开(公告)日：2007-02-13

申请号：US10399530

申请日：2001-10-04

Applicant: Kinji Saijo ,  Kazuo Yoshida ,  Hiroaki Okamoto ,  Shinji Ohsawa

Inventor： Kinji Saijo ,  Kazuo Yoshida ,  Hiroaki Okamoto ,  Shinji Ohsawa

IPC: B32B15/01

CPC classification number: H05K3/025 ,  B23K20/04 ,  B32B15/01 ,  H05K3/062 ,  H05K2201/0355 ,  H05K2201/0361 ,  H05K2203/0384 ,  H05K2203/068 ,  Y10T428/12 ,  Y10T428/12438 ,  Y10T428/12896 ,  Y10T428/12979

Abstract: An adhesive-free multilayered metal laminate having a given thickness which is obtained by bonding a metal sheet having a thin metal film on a surface thereof to a metal foil without using an adhesive; and a process for continuously producing the laminate. The process comprises the steps of; setting a metal sheet on a reel for metal sheet unwinding; setting a metal foil on a reel for metal foil unwinding; unwinding the metal sheet from the metal sheet-unwinding reel and activating a surface of the metal sheet to thereby form a first thin metal film on the metal sheet surface; unwinding the metal foil from the metal foil-unwinding reel and activating a surface of the metal foil to thereby form a second thin metal film on the metal foil surface; and press-bonding the activated surface of the first thin metal film to that of the second thin metal film so that the first thin metal film formed on the metal sheet is in contact with the second thin metal film formed on the metal foil.

Abstract translation: 具有给定厚度的无粘合剂的多层金属层压体，其通过在其表面上将不具有金属薄膜的金属薄片接合而不使用粘合剂而获得; 以及连续制造层压体的方法。 该方法包括以下步骤： 将金属板放在卷轴上用于金属板退绕; 在金属箔退绕卷轴上设置金属箔; 从金属板退绕卷轴退绕金属片并激活金属片的表面，从而在金属片表面上形成第一薄金属膜; 从金属箔退绕卷轴退绕金属箔并激活金属箔的表面，从而在金属箔表面上形成第二薄金属膜; 并且将第一薄金属膜的活化表面压接到第二薄金属膜的活化表面，使得形成在金属片上的第一薄金属膜与形成在金属箔上的第二薄金属膜接触。

公开(公告)号：US06972379B2

公开(公告)日：2005-12-06

申请号：US09814486

申请日：2001-03-20

Applicant: Delin Li

Inventor： Delin Li

IPC: H05K3/00 ,  H05K3/06 ,  H05K3/40 ,  H05K3/42 ,  H05K3/44 ,  H05K3/46 ,  H05K1/11

CPC classification number: H05K3/4685 ,  H05K3/0047 ,  H05K3/06 ,  H05K3/062 ,  H05K3/064 ,  H05K3/4038 ,  H05K3/4069 ,  H05K3/429 ,  H05K3/44 ,  H05K3/445 ,  H05K3/4608 ,  H05K3/4611 ,  H05K3/4623 ,  H05K3/4641 ,  H05K2201/0305 ,  H05K2201/0352 ,  H05K2201/0355 ,  H05K2201/0361 ,  H05K2201/0379 ,  H05K2201/0397 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09554 ,  H05K2201/09563 ,  H05K2201/09609 ,  H05K2201/09845 ,  H05K2201/09881 ,  H05K2203/0369 ,  H05K2203/066 ,  H05K2203/0733 ,  H05K2203/1152 ,  H05K2203/1184 ,  H05K2203/1536 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A method 10 for making a multi-layer electronic circuit board 110 having electroplated apertures 18, 20 which may be selectively and electrically isolated from electrically grounded member 12 and further having selectively formed air bridges and/or crossover members 50 which are structurally supported by material 54, and further having certain exposed connection surfaces 112, selectively and electrically connected to certain electrically conductive members 34, 42, and 44.

Abstract translation: 一种用于制造具有电镀孔18,20的多层电子电路板110的方法10，其可以与电接地构件12选择性地和电隔离，并且还具有结构上由材料支撑的选择性地形成的空气桥和/或交叉构件50 并且还具有某些暴露的连接表面112，其选择性地和电连接到某些导电构件34,42和44。

公开(公告)号：US20050193555A1

公开(公告)日：2005-09-08

申请号：US11119820

申请日：2005-05-03

Applicant: Kinji Saijo ,  Kazuo Yoshida ,  Hiroaki Okamoto ,  Shinji Ohsawa

Inventor： Kinji Saijo ,  Kazuo Yoshida ,  Hiroaki Okamoto ,  Shinji Ohsawa

IPC: H05K1/02 ,  H05K3/06 ,  H05K3/46 ,  H05K1/03

CPC classification number: H05K1/0221 ,  H05K3/062 ,  H05K3/4647 ,  H05K2201/0361 ,  H05K2201/09254 ,  H05K2203/0384 ,  H05K2203/0733 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49151 ,  Y10T29/49155 ,  Y10T29/49156

Abstract: A multilayer printed wiring board having a wiring lead-out port has a signal circuit conductor perfectly covered by an earth circuit in its inside and a wiring lead-out port. A signal circuit conductor having a branch pattern is preferable. A large number of products can be easily manufactured with good size reproducibility. The multilayer printed wiring board is manufactured by selectively etching the copper of a cladding sheet manufactured by bonding a copper foil to a nickel foil with 0.1-3 % reduction and forming a signal circuit conductor covered by an earth circuit and the wiring lead-out port.

Abstract translation: 具有布线引出口的多层印刷布线板具有完全被其内部的接地电路覆盖的信号电路导体和布线引出口。 具有分支图案的信号电路导体是优选的。 可以容易地制造大量的产品，具有良好的尺寸再现性。 多层印刷线路板是通过选择性地蚀刻通过将铜箔接合到镍箔上而制造的包层片的铜，其中，铜箔的折射率减少了0.1-3％，并且形成了由接地电路覆盖的信号电路导体和布线引出端口 。

公开(公告)号：US06913814B2

公开(公告)日：2005-07-05

申请号：US10717116

申请日：2003-11-19

Applicant: Kwun Yao Ho ,  Moriss Kung

Inventor： Kwun Yao Ho ,  Moriss Kung

IPC: H05K3/06 ,  H05K3/42 ,  H05K3/46 ,  B32B3/00 ,  H01L23/58

CPC classification number: H05K3/4617 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48228 ,  H01L2224/48464 ,  H01L2924/3011 ,  H05K3/062 ,  H05K3/064 ,  H05K3/423 ,  H05K3/4602 ,  H05K3/4647 ,  H05K2201/0355 ,  H05K2201/0361 ,  H05K2201/09881 ,  H05K2203/0384 ,  H05K2203/0733 ,  Y10S428/901 ,  Y10T428/24025 ,  Y10T428/24917 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A lamination process and structure of a high layout density substrate is disclosed. The lamination process comprises the following steps. First of all, a plurality of laminating layers are individually formed, wherein each laminating layer has a first dielectric layer, a plurality of first vias and a patterned conducting layer. Next, a bottom layer having a second dielectric layer and a plurality of second vias is formed. Then, the laminating layers and the bottom layer are stacked. Finally, the laminating layers and the bottom layer are laminated simultaneously to form a multiplayer substrate at one time.

Abstract translation: 公开了一种高布局密度衬底的叠层工艺和结构。 层压方法包括以下步骤。 首先，分别形成多个层压层，其中每个层压层具有第一介电层，多个第一通孔和图案化的导电层。 接下来，形成具有第二电介质层和多个第二通孔的底层。 然后层叠层叠体和底层。 最后，层压层和底层同时层压以形成多层底板。

公开(公告)号：US06852932B2

公开(公告)日：2005-02-08

申请号：US10650309

申请日：2003-08-28

Applicant: Achyuta Achari ,  Andrew Zachary Glovatsky ,  Robert Edward Belke ,  Brenda Joyce Nation ,  Delin Li ,  Lakhi N. Goenka ,  Mohan R. Paruchuri ,  Robert Joseph Gordon ,  Thomas Bernd Krautheim

Inventor： Achyuta Achari ,  Andrew Zachary Glovatsky ,  Robert Edward Belke ,  Brenda Joyce Nation ,  Delin Li ,  Lakhi N. Goenka ,  Mohan R. Paruchuri ,  Robert Joseph Gordon ,  Thomas Bernd Krautheim

IPC: H05K3/00 ,  H05K3/06 ,  H05K3/40 ,  H05K3/42 ,  H05K3/44 ,  H05K3/46 ,  H05K1/11 ,  H01R12/04

CPC classification number: H05K3/4038 ,  H05K3/0047 ,  H05K3/06 ,  H05K3/062 ,  H05K3/064 ,  H05K3/4069 ,  H05K3/429 ,  H05K3/44 ,  H05K3/445 ,  H05K3/4608 ,  H05K3/4611 ,  H05K3/4623 ,  H05K3/4641 ,  H05K3/4685 ,  H05K2201/0305 ,  H05K2201/0352 ,  H05K2201/0355 ,  H05K2201/0361 ,  H05K2201/0379 ,  H05K2201/0397 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09554 ,  H05K2201/09563 ,  H05K2201/09609 ,  H05K2201/09845 ,  H05K2201/09881 ,  H05K2203/0369 ,  H05K2203/066 ,  H05K2203/0733 ,  H05K2203/1152 ,  H05K2203/1184 ,  H05K2203/1536 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165 ,  Y10T156/1056

Abstract: A multi-layer circuit board having apertures that are selectively and electrically isolated from electrically grounded member and further having selectively formed air bridges and/or crossover members which are structurally supported by a polymeric material. Each of the apertures selectively receives an electrically conductive material.

Abstract translation: 一种多层电路板，其具有与电接地构件选择性地和电隔离的孔，并且还具有由聚合物材料在结构上支撑的选择性地形成的空气桥和/或交叉构件。 每个孔选择性地接收导电材料。

公开(公告)号：US20040108131A1

公开(公告)日：2004-06-10

申请号：US10650309

申请日：2003-08-28

Inventor： Achyuta Achari ,  Andrew Zachary Glovatsky ,  Robert Edward Belke ,  Brenda Joyce Nation ,  Delin Li ,  Lakhi N. Goenka ,  Mohan R. Paruchuri ,  Robert Joseph Gordon ,  Thomas Bernd Krautheim

IPC: H05K001/00 ,  H05K003/36 ,  H05K003/20

CPC classification number: H05K3/4038 ,  H05K3/0047 ,  H05K3/06 ,  H05K3/062 ,  H05K3/064 ,  H05K3/4069 ,  H05K3/429 ,  H05K3/44 ,  H05K3/445 ,  H05K3/4608 ,  H05K3/4611 ,  H05K3/4623 ,  H05K3/4641 ,  H05K3/4685 ,  H05K2201/0305 ,  H05K2201/0352 ,  H05K2201/0355 ,  H05K2201/0361 ,  H05K2201/0379 ,  H05K2201/0397 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09554 ,  H05K2201/09563 ,  H05K2201/09609 ,  H05K2201/09845 ,  H05K2201/09881 ,  H05K2203/0369 ,  H05K2203/066 ,  H05K2203/0733 ,  H05K2203/1152 ,  H05K2203/1184 ,  H05K2203/1536 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165 ,  Y10T156/1056

Abstract: A method for making a multi-layer circuit board 116 having apertures 96, 98 which may be selectively and electrically isolated from electrically grounded member 46 and further having selectively formed air bridges and/or crossover members 104 which are structurally supported by material 112. Each of the apertures 96, 98 selectively receives electrically conductive material 114.

Abstract translation: 一种用于制造具有孔96,98的多层电路板116的方法，其可以与电接地构件46选择性地和电隔离，并且还具有在结构上由材料112支撑的选择性地形成的空气桥和/或交叉构件104.每个 孔96,98选择性地接收导电材料114。