公开(公告)号：US08379391B2

公开(公告)日：2013-02-19

申请号：US12465560

申请日：2009-05-13

Applicant: Mike H. Amidi ,  Robert S. Pauley ,  Satyanarayan Shivkumar Iyer

Inventor： Mike H. Amidi ,  Robert S. Pauley ,  Satyanarayan Shivkumar Iyer

IPC: H05K5/00 ,  H05K7/00

CPC classification number: H05K1/141 ,  G11C5/04 ,  H01L25/0652 ,  H01L2924/0002 ,  H05K1/144 ,  H05K1/181 ,  H05K2201/042 ,  H05K2201/045 ,  H05K2201/10159 ,  H05K2201/10378 ,  H05K2203/1572 ,  H01L2924/00

Abstract: A memory module with attached transposer and interposers to provide additional surface area for the placement of memory devices is disclosed. The memory module includes a memory board with a first surface, a second surface and an edge with a set of electrical contacts. A transposer is attached to each surface of the memory board, and an interposer is attached to each transposer on the opposite surface of the transposer from the memory board. The interposer has space to allow placement of memory devices on both a first surface between the interposer and the memory board, and on a second surface of the interposer away from the memory board.

Abstract translation: 公开了一种具有连接的转印器和插入件以提供用于存储器件的放置的附加表面积的存储器模块。 存储器模块包括具有第一表面，第二表面和具有一组电触点的边缘的存储器板。 将转移器连接到存储器板的每个表面，并且插入器附接到转移器的与存储器板相反的表面上的每个转台。 插入器具有允许将存储器件放置在插入器和存储器板之间的第一表面上以及在插入器的远离存储器板的第二表面上的空间。

公开(公告)号：US08331094B2

公开(公告)日：2012-12-11

申请号：US13012078

申请日：2011-01-24

Applicant: Seshasayee Ankireddi ,  Vadim Gektin

Inventor： Seshasayee Ankireddi ,  Vadim Gektin

IPC: H05K7/20 ,  F28F7/00 ,  H01L23/48

CPC classification number: H01L23/367 ,  H01L23/427 ,  H01L2224/16225 ,  H01L2224/73253 ,  H05K1/144 ,  H05K2201/042 ,  H05K2201/10515 ,  H05K2201/2036

Abstract: A stacked microprocessor package architecture includes one or more microprocessor packages, the microprocessor packages including one or more microprocessor die disposed on a substrate, a satellite die, a thermal bus thermally coupled to the microprocessor die and thermally connected to system cooling, and a power bus providing power to the microprocessor die and coupled to system power. The microprocessor packages may include a module cap providing mechanical protection and/or thermal isolation or a thermal cooling path for stacked modules. Variable height standoffs provide signal connection from substrates of the stacked microprocessor packages to a system board.

Abstract translation: 堆叠的微处理器封装结构包括一个或多个微处理器封装，微处理器封装包括设置在基板上的一个或多个微处理器管芯，卫星管芯，热耦合到微处理器管芯并热连接到系统冷却的热总线，以及电源总线 向微处理器提供电源并连接到系统电源。 微处理器封装可以包括为层叠模块提供机械保护和/或热隔离或热冷却路径的模块盖。 可变高度支座提供从堆叠的微处理器封装的基板到系统板的信号连接。

公开(公告)号：US20120294044A1

公开(公告)日：2012-11-22

申请号：US13569358

申请日：2012-08-08

Applicant: Chul-woo OH ,  Joong-gi Kwon

Inventor： Chul-woo OH ,  Joong-gi Kwon

IPC: H02M3/22

CPC classification number: H02M3/00 ,  G03G15/80 ,  H05K1/0256 ,  H05K1/0262 ,  H05K1/189 ,  H05K2201/042 ,  H05K2201/09972

Abstract: Provided is a high-voltage power supply including a board having at least one bent portion separating a first region of the board from a second region of the board, the first region not being coplanar with the second region of the board; a first circuit, on the first region of the board, generating a second voltage according to a first voltage; and a second circuit, on the second region of the board, amplifying the second voltage and then rectifying the amplified second voltage.

Abstract translation: 本发明提供一种高压电源，其特征在于，包括具有将所述基板的第一区域与所述基板的第二区域分开的至少一个弯曲部分的基板，所述第一区域不与所述基板的第二区域共面; 在所述板的第一区域上的第一电路，根据第一电压产生第二电压; 以及第二电路，在所述板的第二区域上放大所述第二电压，然后对所述放大的第二电压进行整流。

公开(公告)号：US08297787B2

公开(公告)日：2012-10-30

申请号：US12542903

申请日：2009-08-18

Applicant: Beijing Yu

Inventor： Beijing Yu

IPC: F21S4/00 ,  F21V21/00

CPC classification number: F21V3/02 ,  F21K9/00 ,  F21K9/232 ,  F21K9/238 ,  F21V23/005 ,  F21V23/006 ,  F21Y2107/60 ,  F21Y2115/10 ,  H05K1/144 ,  H05K2201/042 ,  H05K2201/09027 ,  H05K2201/10106

Abstract: Disclosed is an LED light bulb having safe and efficient heat dissipation, while also providing maximum light distribution by providing multiple printed circuit boards arranged in a pyramidal structure, having multiple LEDs. The multiple printed circuit boards are connected by conductor wires contained within a transparent housing, so that the multiple printed circuit boards sit on a base of the LED light bulb. A bottom printed circuit board may also be employed if additional circuitry is desired.

Abstract translation: 公开了一种具有安全且高效散热的LED灯泡，同时通过提供具有多个LED的金字塔形结构中布置的多个印刷电路板来提供最大的光分布。 多个印刷电路板通过包含在透明外壳内的导线连接，使得多个印刷电路板位于LED灯泡的基座上。 如果需要附加电路，也可以采用底部印刷电路板。

公开(公告)号：US08198139B2

公开(公告)日：2012-06-12

申请号：US12284217

申请日：2008-09-18

Applicant: Gwi-gyeon Yang

Inventor： Gwi-gyeon Yang

IPC: H01L21/44 ,  H01L23/495

CPC classification number: H01L23/49575 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/4334 ,  H01L23/49537 ,  H01L23/49551 ,  H01L23/5387 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L25/162 ,  H01L2224/16 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2924/00011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19043 ,  H05K1/0306 ,  H05K1/053 ,  H05K1/144 ,  H05K1/189 ,  H05K3/284 ,  H05K2201/042 ,  H05K2201/1034 ,  H05K2203/1572 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/01049

Abstract: Provided are a power device package, which can be made compact by vertically stacking substrates on which semiconductor chips are mounted, and a method of fabricating the power device package. The power device package includes: a first substrate comprising a first surface and a second surface opposite to each other, and a first wiring pattern formed on the first surface; one or more power semiconductor chips mounted on the first surface of the first substrate and electrically connected to the first wiring pattern; a second substrate vertically spaced apart from the first substrate and comprising a second wiring pattern; one or more first control semiconductor chips mounted on the second substrate and electrically connected to the second wiring pattern; a lead frame electrically connected to the first wiring pattern and the second wiring pattern; and a sealing member sealing the first substrate, the power semiconductor chips, the second substrate, the first control semiconductor chips, and at least a part of the lead frame so as to expose the second surface of the first substrate.

Abstract translation: 提供了一种功率器件封装，其可以通过垂直堆叠安装半导体芯片的衬底而制造得紧凑，以及制造功率器件封装的方法。 功率器件封装包括：第一衬底，其包括彼此相对的第一表面和第二表面;以及形成在第一表面上的第一布线图案; 一个或多个功率半导体芯片安装在第一基板的第一表面上并电连接到第一布线图案; 第二衬底，其与所述第一衬底垂直间隔开并且包括第二布线图案; 安装在第二基板上并电连接到第二布线图案的一个或多个第一控制半导体芯片; 电连接到第一布线图案和第二布线图案的引线框架; 以及密封构件，密封第一基板，功率半导体芯片，第二基板，第一控制半导体芯片以及引线框架的至少一部分，以露出第一基板的第二表面。

公开(公告)号：US08193457B2

公开(公告)日：2012-06-05

申请号：US12641328

申请日：2009-12-18

Applicant: Hsin-Hung Shen

Inventor： Hsin-Hung Shen

IPC: H01R13/73

CPC classification number: H05K1/144 ,  H05K1/141 ,  H05K3/3436 ,  H05K2201/042 ,  H05K2201/09781 ,  H05K2201/10409 ,  H05K2201/2036

Abstract: A stack structure of a circuit board includes a first substrate, a second substrate and a fixing element. The first substrate has a first component area, a plurality of supporting solder elements, and a plurality of signal solder elements, wherein the plurality of signal elements is disposed in the first component area. The first substrate stacks on the second substrate. The plurality of supporting solder elements is disposed between the first and the second substrates for providing a supporting force. The fixing element secures the first substrate and the second substrate, and the supporting solder elements are disposed around the fixing element.

Abstract translation: 电路板的堆叠结构包括第一基板，第二基板和固定元件。 第一基板具有第一部件区域，多个支撑焊接元件和多个信号焊接元件，其中多个信号元件设置在第一部件区域中。 第一衬底堆叠在第二衬底上。 多个支撑焊料元件设置在第一和第二基板之间以提供支撑力。 固定元件固定第一基板和第二基板，并且支撑焊接元件设置在固定元件周围。

公开(公告)号：US08172622B1

公开(公告)日：2012-05-08

申请号：US13183595

申请日：2011-07-15

Applicant: Chun-Ming Huang ,  Hui-Ming Lin ,  Chih-Chyau Yang ,  Chien-Ming Wu ,  Shih-Lun Chen

Inventor： Chun-Ming Huang ,  Hui-Ming Lin ,  Chih-Chyau Yang ,  Chien-Ming Wu ,  Shih-Lun Chen

IPC: H01R13/502

CPC classification number: H01L25/0655 ,  H01L23/13 ,  H01L23/49827 ,  H01L25/105 ,  H01L25/16 ,  H01L2224/32225 ,  H01L2225/1052 ,  H01L2225/1064 ,  H01R13/2435 ,  H05K1/144 ,  H05K3/284 ,  H05K2201/042 ,  H05K2201/10325 ,  H05K2201/10378

Abstract: A socket structure stack and a socket structure thereof are provided. The socket structure stack includes at least two socket structures, and each socket structure includes a main body, a plurality of conductive elements, and a plurality of connecting elements. The main body includes an inner plate and an outer plate, wherein the inner plate has a receiving portion and an embedded portion. The conductive elements are embedded in the embedded portion, and the connecting elements are mounted on the outer plate so as to connect adjacent socket structures together. The socket structures are so configured that ICs, processors, and printed circuit boards connected to the socket structures or the socket structures themselves can be recycled. Moreover, the printed circuit boards can be easily assembled to the socket structures, and the socket structures can be stacked up and securely connected to form a 3D structure which is otherwise difficult to put together by soldering.

Abstract translation: 提供了一种插座结构堆叠及其插座结构。 插座结构堆叠包括至少两个插座结构，并且每个插座结构包括主体，多个导电元件和多个连接元件。 主体包括内板和外板，其中内板具有接收部分和嵌入部分。 导电元件嵌入在嵌入部分中，并且连接元件安装在外板上，以将相邻的插座结构连接在一起。 插座结构被配置成使得连接到插座结构或插座结构本身的IC，处理器和印刷电路板可以被再循环。 此外，印刷电路板可以容易地组装到插座结构上，并且插座结构可以堆叠并牢固地连接以形成否则难以通过焊接放在一起的3D结构。

公开(公告)号：US08145058B2

公开(公告)日：2012-03-27

申请号：US12188132

申请日：2008-08-07

Applicant: Jinxiang Liu ,  Tat Ming Teo

Inventor： Jinxiang Liu ,  Tat Ming Teo

IPC: H04B10/24

CPC classification number: H05K1/141 ,  H05K1/0219 ,  H05K1/0237 ,  H05K2201/042 ,  H05K2201/10318

Abstract: Systems and method for using a direct connect RF pin configuration for an ONU transceiver module to connect directly to an external component. The ONU module communicates with an optical network. The ONU module further includes an RF interface and a direct connect RF pin configuration to communicate using RF signals. In one embodiment, the direct connect RF pin configuration includes two ground pins and a data pin which are spaced apart and directly connected to a PCB of the ONU. The opposing ends of the pins are directly connected to a PCB of an external component, such as an ONU host box. The pins are thus spaced apart such that they do not impede each others' function and available for direct connection to the external component.

Abstract translation: 使用直接连接RF引脚配置的ONU收发器模块直接连接到外部组件的系统和方法。 ONU模块与光网络通信。 ONU模块还包括RF接口和直接连接RF引脚配置以使用RF信号进行通信。 在一个实施例中，直接连接RF引脚配置包括间隔开并直接连接到ONU的PCB的两个接地引脚和数据引脚。 引脚的相对端直接连接到诸如ONU主机盒的外部组件的PCB。 因此，引脚间隔开，使得它们不会妨碍彼此的功能并且可用于直接连接到外部部件。

公开(公告)号：US08089774B2

公开(公告)日：2012-01-03

申请号：US12000930

申请日：2007-12-19

Applicant: Hyun-Seok Choi ,  Yong-Hyun Kim ,  Jung-Chan Cho ,  Hyung-Mo Hwang

Inventor： Hyun-Seok Choi ,  Yong-Hyun Kim ,  Jung-Chan Cho ,  Hyung-Mo Hwang

IPC: H05K7/02 ,  H05K7/06 ,  H05K7/08 ,  H05K7/10

CPC classification number: H05K1/147 ,  G11C5/04 ,  H01L2224/16225 ,  H05K1/117 ,  H05K1/189 ,  H05K3/4691 ,  H05K2201/042 ,  H05K2201/10159 ,  H05K2201/2009 ,  H05K2203/1572

Abstract: A semiconductor memory module includes a printed circuit board (PCB) including a rigid PCB part and a flexible PCB part including an overlap portion, a non-overlap portion, and memory components mounted on the PCB. The rigid PCB part includes a first surface and a second surface facing the first surface. The overlap portion of the flexible PCB part overlaps the rigid PCB part, and the non-overlap portion does not overlap the rigid PCB part. The flexible PCB part may include an overlap stacked structure including at least one doubling portion.

Abstract translation: 半导体存储器模块包括印刷电路板（PCB），其包括刚性PCB部件和包括重叠部分的柔性PCB部件，非重叠部分和安装在PCB上的存储器部件。 刚性PCB部件包括第一表面和面向第一表面的第二表面。 柔性PCB部分的重叠部分与刚性PCB部分重叠，并且非重叠部分不与刚性PCB部分重叠。 柔性PCB部件可以包括包括至少一个加倍部分的重叠堆叠结构。

公开(公告)号：US08054639B2

公开(公告)日：2011-11-08

申请号：US12292906

申请日：2008-12-01

Applicant: Chi-Hsing Hsu

Inventor： Chi-Hsing Hsu

IPC: H05K1/00

CPC classification number: H05K9/0058 ,  H05K1/182 ,  H05K1/189 ,  H05K2201/042 ,  H05K2201/10121

Abstract: An image-sensing module for reducing its overall thickness and preventing electromagnetic interference (EMI) includes a flexible substrate, an image sensor, and a plurality of electronic elements. The flexible substrate has a first PCB (Printed Circuit Board), a flexible bending board bent upwards from one side of the first PCB, and a second PCB extending forwards from the flexible bending board and disposed above the first PCB. The second PCB has at least one first opening. The image sensor is electrically disposed on the first PCB, and the image sensor is exposed by the first opening of the second PCB. The electronic elements are selectively electrically disposed on the first PCB and/or on the second PCB so that the electronic elements are disposed between the first PCB and the second PCB.

Abstract translation: 用于减小其总体厚度并防止电磁干扰（EMI）的图像感测模块包括柔性基板，图像传感器和多个电子元件。 柔性基板具有第一PCB（印刷电路板），从第一PCB的一侧向上弯曲的柔性弯曲板，以及从柔性弯曲板向前延伸并设置在第一PCB上方的第二PCB。 第二PCB具有至少一个第一开口。 图像传感器电气地布置在第一PCB上，并且图像传感器被第二PCB的第一开口曝光。 电子元件选择性地电设置在第一PCB上和/或第二PCB上，使得电子元件设置在第一PCB和第二PCB之间。