公开(公告)号：US11901108B2

公开(公告)日：2024-02-13

申请号：US16953365

申请日：2020-11-20

Applicant: Delta Electronics (Shanghai) Co., Ltd.

Inventor： Jin-Fa Zhang ,  Hai-Jun Yang ,  Zhong-Wei Ke ,  Kai Dong ,  Shuai-Lin Du

IPC: H01F27/28 ,  H05K7/20 ,  H05K1/18 ,  H05K1/14 ,  H01F17/04 ,  H02M1/42 ,  H01F17/00 ,  H02M1/00 ,  H02M3/00 ,  H02M3/335

CPC classification number: H01F27/2804 ,  H01F17/04 ,  H01F27/28 ,  H02M1/4225 ,  H05K1/141 ,  H05K1/181 ,  H05K7/20909 ,  H01F2017/0093 ,  H02M1/0085 ,  H02M3/003 ,  H02M3/01 ,  H02M3/33573 ,  H05K2201/045 ,  H05K2201/1003 ,  H05K2201/1006

Abstract: A power module includes a printed circuit board (PCB), a magnetic element, primary and secondary winding circuits and a regulator. The magnetic element is disposed on the PCB and has first to fourth sides. The second side is opposite to the first side, the fourth side is opposite to the third side. The primary winding circuit is disposed on the PCB and positioned in a vicinity of the first or second side. The secondary winding circuit is disposed on the first PCB and positioned in a vicinity of the third or fourth side. The regulator includes a switch disposed on the PCB, and coupled to the primary winding circuit. The at least one switch, the primary winding circuit, and the magnetic element are arranged in a first direction in order. A power device is also disclosed herein.

公开(公告)号：US20180316375A1

公开(公告)日：2018-11-01

申请号：US15769723

申请日：2015-12-08

Applicant: Intel Corporation

Inventor： Telesphor KAMGAING ,  Richard J. DISCHLER

IPC: H04B1/18 ,  H01L23/498 ,  H01L25/16 ,  H01P5/08 ,  H01P3/16 ,  H01L23/66 ,  H01P1/24 ,  H01L23/367 ,  H01L25/065 ,  H05K1/18 ,  H05K1/14

CPC classification number: G06F1/16 ,  H05K1/0274 ,  H05K1/147 ,  H05K2201/045 ,  H05K2201/046

Abstract: Wireless interconnects are shown on flexible cables for communication between computing platforms. One example has an integrated circuit chip, a package substrate to carry the integrated circuit chip, the package substrate having conductive connectors to connect the integrated circuit chip to external components, a cable on the package substrate coupled to the integrated circuit chip at one end, a radio chip on the cable coupled to the cable at the other end, the radio chip to modulate data over a carrier and to transmit the modulated data, and a waveguide transition coupled to a dielectric waveguide to receive the transmitted modulated data from the radio and to couple it into the waveguide, the waveguide to carry the modulated data to an external component.

公开(公告)号：US09980381B2

公开(公告)日：2018-05-22

申请号：US14571369

申请日：2014-12-16

Applicant: MOTOROLA SOLUTIONS, INC

Inventor： Seng Huan Chuah ,  Friedrich Josef Bollmann ,  Khai Jin Choo ,  Weng Kong Hor ,  Sih Hau Tan

IPC: H05K1/11 ,  H05K1/14 ,  H04M1/02 ,  H05K5/06 ,  H05K1/02

CPC classification number: H05K1/144 ,  H04M1/0277 ,  H05K1/0215 ,  H05K1/0224 ,  H05K1/14 ,  H05K5/064 ,  H05K2201/041 ,  H05K2201/042 ,  H05K2201/043 ,  H05K2201/045 ,  H05K2201/10371 ,  H05K2201/10409 ,  H05K2201/2018

Abstract: A method and circuit board arrangement for an intrinsically safe portable device includes two or more circuit boards having a frame structure that forms a contiguous boundary around a space between the circuit boards. In the space there are circuit components mounted on both circuit boards, and a connector that connect the two circuit boards. An encapsulant material fills the space bounded by the frame structure between the circuit boards to exclude airborne material from coming into contact with the encapsulated circuit components.

公开(公告)号：US09220167B2

公开(公告)日：2015-12-22

申请号：US14623689

申请日：2015-02-17

Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

Inventor： Noriyoshi Shimizu ,  Masato Tanaka ,  Toshinori Koyama ,  Akio Rokugawa

IPC: H01L23/12 ,  H05K1/02 ,  H01L23/498 ,  H01L21/48 ,  H05K1/03 ,  H05K1/11 ,  H05K3/46 ,  H01L23/15 ,  H01L23/538

CPC classification number: H05K1/0298 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/15 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5385 ,  H01L23/5389 ,  H01L2224/16225 ,  H01L2924/12044 ,  H05K1/0271 ,  H05K1/036 ,  H05K1/0366 ,  H05K1/113 ,  H05K1/115 ,  H05K1/141 ,  H05K3/429 ,  H05K3/46 ,  H05K3/4602 ,  H05K3/4688 ,  H05K2201/0191 ,  H05K2201/045 ,  H05K2201/09409 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2201/09781 ,  H05K2201/09827 ,  H05K2201/10204 ,  H05K2201/10674 ,  Y10T29/49162 ,  H01L2924/00

Abstract: A wiring substrate includes a first wiring structure, a second wiring structure stacked on an upper surface of the first wiring structure, and an outermost insulating layer stacked on a lower surface of the first wiring structure. The outermost insulating layer covers a part of a bottom wiring layer of the wiring layers forming the first wiring structure. The second wiring structure has a wiring density higher than that of the first wiring structure. A volume ratio V1/V2 is from 0.8 to 1.5, where V1 represents the volume of the wiring layers forming the entire second wiring structure, and V2 represents the volume of the bottom wiring layer in the first wiring structure.

Abstract translation: 布线基板包括第一布线结构，堆叠在第一布线结构的上表面上的第二布线结构和堆叠在第一布线结构的下表面上的最外绝缘层。 最外层绝缘层覆盖形成第一布线结构的布线层的底部布线层的一部分。 第二布线结构具有比第一布线结构高的布线密度。 体积比V1 / V2为0.8〜1.5，其中V1表示形成整个第二布线结构的布线层的体积，V2表示第一布线结构中底布线层的体积。

公开(公告)号：US20150245473A1

公开(公告)日：2015-08-27

申请号：US14623689

申请日：2015-02-17

Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

Inventor： Noriyoshi SHIMIZU ,  Masato TANAKA ,  Toshinori KOYAMA ,  Akio ROKUGAWA

IPC: H05K1/02 ,  H05K3/46 ,  H05K1/03 ,  H05K1/11 ,  H01L23/498 ,  H01L21/48

CPC classification number: H05K1/0298 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/15 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5385 ,  H01L23/5389 ,  H01L2224/16225 ,  H01L2924/12044 ,  H05K1/0271 ,  H05K1/036 ,  H05K1/0366 ,  H05K1/113 ,  H05K1/115 ,  H05K1/141 ,  H05K3/429 ,  H05K3/46 ,  H05K3/4602 ,  H05K3/4688 ,  H05K2201/0191 ,  H05K2201/045 ,  H05K2201/09409 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2201/09781 ,  H05K2201/09827 ,  H05K2201/10204 ,  H05K2201/10674 ,  Y10T29/49162 ,  H01L2924/00

Abstract: A wiring substrate includes a first wiring structure, a second wiring structure stacked on an upper surface of the first wiring structure, and an outermost insulating layer stacked on a lower surface of the first wiring structure. The outermost insulating layer covers a part of a bottom wiring layer of the wiring layers forming the first wiring structure. The second wiring structure has a wiring density higher than that of the first wiring structure. A volume ratio V1/V2 is from 0.8 to 1.5, where V1 represents the volume of the wiring layers forming the entire second wiring structure, and V2 represents the volume of the bottom wiring layer in the first wiring structure.

Abstract translation: 布线基板包括第一布线结构，堆叠在第一布线结构的上表面上的第二布线结构和堆叠在第一布线结构的下表面上的最外绝缘层。 最外层绝缘层覆盖形成第一布线结构的布线层的底部布线层的一部分。 第二布线结构具有比第一布线结构高的布线密度。 体积比V1 / V2为0.8〜1.5，其中V1表示形成整个第二布线结构的布线层的体积，V2表示第一布线结构中底布线层的体积。

公开(公告)号：US09099999B1

公开(公告)日：2015-08-04

申请号：US13485768

申请日：2012-05-31

Applicant: Bonnie I. Wang ,  Chiakang Sung ,  Joseph Huang ,  Khai Nguyen ,  Tony Ngai ,  Zhe Li ,  Hong Shi

Inventor： Bonnie I. Wang ,  Chiakang Sung ,  Joseph Huang ,  Khai Nguyen ,  Tony Ngai ,  Zhe Li ,  Hong Shi

IPC: H01L29/73 ,  H01L29/40 ,  H03K17/00 ,  H05K1/18 ,  H01L25/065 ,  H01L27/06

CPC classification number: H03K17/00 ,  H01L25/0652 ,  H01L25/0657 ,  H01L27/0688 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2924/0002 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H05K1/144 ,  H05K1/181 ,  H05K2201/045 ,  H05K2201/10378 ,  H05K2201/10674 ,  H05K2201/10734 ,  H01L2924/00

Abstract: An integrated circuit in a multi-chip package is provided. The integrated circuit may include adjustable interface circuitry configured to interface with other off-chip components. In particular, the adjustable interface circuitry may include a microbump input-output buffer operable to drive signals off of the integrated circuit and operable to receive signals from other integrated circuits in the multi-chip package via a microbump. The microbump input-output buffer may include output buffers and input buffers. The output buffers may have programmable drive strengths and may each be selectively switched in and out of use depending on the desired application. Each output buffer may include a level shifter, a buffer circuit, and multiple inverter-like circuits each of which can be turned on or off to adjust the drive strength of that output buffer.

Abstract translation: 提供了一种多芯片封装中的集成电路。 该集成电路可以包括被配置为与其它片外部件接口的可调节接口电路。 特别地，可调接口电路可以包括微控制输入 - 输出缓冲器，其可操作用于驱动离开集成电路的信号，并且可操作以经由微型小型接收器从多芯片封装中的其他集成电路接收信号。 微控制输入 - 输出缓冲器可以包括输出缓冲器和输入缓冲器。 输出缓冲器可以具有可编程驱动强度，并且可以根据期望的应用选择性地切换和使用。 每个输出缓冲器可以包括电平移位器，缓冲电路和多个类似逆变器的电路，每个可以导通或关断以调整该输出缓冲器的驱动强度。

公开(公告)号：US09042108B2

公开(公告)日：2015-05-26

申请号：US13702216

申请日：2011-04-11

Applicant: Kazuhiro Nobori

Inventor： Kazuhiro Nobori

IPC: H05K1/00 ,  H05K7/00 ,  G02F1/1345 ,  H05K1/14 ,  H05K3/36 ,  H05K13/00 ,  H05K3/32

CPC classification number: H05K7/00 ,  G02F1/13452 ,  H01L2924/0002 ,  H05K1/147 ,  H05K3/323 ,  H05K3/361 ,  H05K13/00 ,  H05K2201/045 ,  H05K2201/055 ,  H05K2201/09445 ,  Y10T29/49124 ,  H01L2924/00

Abstract: In a display device (100), a row of protruding electrodes (115) and a row of protruding electrodes (116) are formed on the connecting surface of a terminal section (112), the row of the protruding electrodes (116) is disposed between the row of the protruding electrodes (115) and a display section (111), one end of a flexible printed board (150) is connected to the row of the protruding electrodes (115), one end of a flexible printed board (160) is connected to the row of the protruding electrodes (116), the row of the protruding electrodes (115) is adjacent to the row of the protruding electrodes (116), and the one end of the flexible printed board (150) and the one end of the flexible printed board (160) are opposed to each other.

Abstract translation: 在显示装置（100）中，在端子部（112）的连接面上形成有一排突出电极（115）和一排突出电极（116），一排突出电极（116） 在一排突出电极（115）和显示部分（111）之间，柔性印刷电路板（150）的一端连接到一排突出电极（115），柔性印刷电路板（160）的一端 ）连接到所述突出电极（116）的行，所述突出电极（115）的行与所述突出电极（116）的行相邻，并且所述柔性印刷电路板（150）的一端和 柔性印刷电路板（160）的一端彼此相对。

公开(公告)号：US08131903B2

公开(公告)日：2012-03-06

申请号：US11799169

申请日：2007-04-30

Applicant: Roger A. Pearson ,  Shane Ward

Inventor： Roger A. Pearson ,  Shane Ward

IPC: G06F13/00 ,  G06F13/28 ,  H05K7/10

CPC classification number: G06F13/409 ,  H05K1/14 ,  H05K2201/044 ,  H05K2201/045 ,  H05K2201/10159

Abstract: A multi-channel memory connection system comprises a circuit board comprising a plurality of memory connectors, at least one of the plurality of memory connectors configured to receive either a memory module or a memory riser, the at least one memory connector having at least two memory channels connected thereto through the circuit board.

Abstract translation: 多通道存储器连接系统包括包括多个存储器连接器的电路板，所述多个存储器连接器中的至少一个被配置为接收存储器模块或存储器提升器，所述至少一个存储器连接器具有至少两个存储器 通过电路板与其连接的通道。

公开(公告)号：US07848115B2

公开(公告)日：2010-12-07

申请号：US11586912

申请日：2006-10-26

Applicant: Brian W. Casto ,  John J. Retterer ,  Thomas L. Smith

Inventor： Brian W. Casto ,  John J. Retterer ,  Thomas L. Smith

IPC: H01R12/16

CPC classification number: H05K1/14 ,  G06F1/18 ,  H05K1/144 ,  H05K2201/044 ,  H05K2201/045 ,  H05K2201/049 ,  H05K2201/10189

Abstract: In one exemplary embodiment, a system for supplying electrical connectivity to one or more circuit board based devices includes a backplane and at least one module. The backplane includes a mounting surface having a plurality of modular power connectors. The at least one module includes an interface portion, a power connection portion, and a circuit board. The power connection portion is configured to connect with the corresponding one of the plurality of modular power connectors. The circuit board includes a plurality of power-related electrical contacts and a plurality of data-related electrical contacts. At least one of the plurality of power-related electrical contacts is connected with the power connection portion, and at least one of the plurality of data-related electrical contacts is connected with the interface portion. The backplane is configured to connect with a power supply, such that the power supply supplies power to the at least one module through one of the modular power connectors when the at least one module is connected with the corresponding modular power connector.

Abstract translation: 在一个示例性实施例中，用于向一个或多个基于电路板的设备提供电连接的系统包括背板和至少一个模块。 背板包括具有多个模块化电源连接器的安装表面。 所述至少一个模块包括接口部分，电源连接部分和电路板。 电源连接部分被配置为与多个模块化电源连接器中的相应一个连接。 电路板包括多个功率相关的电触点和多个数据相关的电触点。 所述多个功率相关的电触头中的至少一个与所述电源连接部分连接，并且所述多个与数据有关的电触点中的至少一个与所述接口部分连接。 背板被配置为与电源连接，使得当至少一个模块与相应的模块化电源连接器连接时，电源通过模块化电源连接器之一向至少一个模块供电。

公开(公告)号：US07719850B2

公开(公告)日：2010-05-18

申请号：US10240334

申请日：2002-02-13

Applicant: Thomas Duerbaum ,  Reinhold Elferich

Inventor： Thomas Duerbaum ,  Reinhold Elferich

IPC: H05K7/02 ,  H05K7/06 ,  H05K7/08 ,  H05K7/10

CPC classification number: H05K7/1092 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/19105 ,  H05K1/0231 ,  H05K1/0263 ,  H05K1/141 ,  H05K1/182 ,  H05K2201/045 ,  H05K2201/10515 ,  H05K2201/10636 ,  H05K2201/10734 ,  H05K2203/1572 ,  Y02P70/611 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A power supply module arrangement with an integrated circuit mounted on a bearing unit and a power supply includes an integrated circuit mounted on a bearing unit and a power supply module arrangement that is placed on the combination of bearing unit and integrated circuit. The power supply module arrangement includes a base extending at least partially over the base of the integrated circuit and/or all around the base of the integrated circuit. The power supply module arrangement allows for greater permissible load jumps, greater permissible current change rates and ever tighter tolerances regarding the constancy of the supply voltage.

Abstract translation: 具有安装在轴承单元和电源上的集成电路的电源模块装置包括安装在轴承单元上的集成电路和放置在轴承单元和集成电路的组合上的电源模块装置。 电源模块装置包括至少部分地在集成电路的基极上延伸的基座和/或整个集成电路的基极周围的基极。 电源模块布置允许更大的允许负载跳跃，更大的允许电流变化率和关于电源电压的恒定性的更严格的公差。