公开(公告)号：US20060049494A1

公开(公告)日：2006-03-09

申请号：US11189728

申请日：2005-07-27

Applicant: Tatsuhiro Urushido

Inventor： Tatsuhiro Urushido

IPC: H01L23/495

CPC classification number: H01L24/02 ,  H01L21/563 ,  H01L23/49838 ,  H01L23/50 ,  H01L24/49 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/49171 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/19041 ,  H05K1/117 ,  H05K3/361 ,  H05K2201/09418 ,  H05K2201/09427 ,  H05K2201/09709 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device comprises; a semiconductor chip including a first and second groups of pads; and a wiring substrate including a first and second groups of leads, wherein the first group pads are arranged in line with a first line extending along one side of the semiconductor chip; the second group pads are arranged in line with a second line located the further inside of the semiconductor chip more than the location of first line and extending along one side of the semiconductor chip; and each of a first and second groups of leads includes a joint part, a bending part extended to the joint part and an end part extended to the bending part; wherein the semiconductor chip is mounted on the substrate such that the first group pads oppose the joint parts of the first group leads and the second group pads oppose the joint parts of the second group leads; the joint parts of the first group leads extend along any of a plural of lines passing through a first point; the joint parts of the second group leads extend along any of a plural of lines passing through a second point; and the first and second group leads are extracted from the side of the semiconductor chip.

Abstract translation: 半导体器件包括： 包括第一和第二组焊盘的半导体芯片; 以及包括第一和第二组引线的布线基板，其中所述第一组焊盘与沿着所述半导体芯片的一侧延伸的第一线排成一列; 第二组焊盘与位于半导体芯片的内侧的第二线排列成多于第一线的位置并沿着半导体芯片的一侧延伸; 并且第一组和第二组引线中的每一个包括接合部，延伸到接合部的弯曲部和延伸到弯曲部的端部; 其中所述半导体芯片安装在所述基板上，使得所述第一组焊盘与所述第一组引线的所述接合部分相对，并且所述第二组焊盘与所述第二组引线的所述接合部分相对; 第一组引线的接合部分沿着穿过第一点的多条线中的任一条延伸; 第二组的接合部分沿着穿过第二点的多条线中的任一条延伸; 并且从半导体芯片的侧面提取第一和第二组引线。

公开(公告)号：US20060038270A1

公开(公告)日：2006-02-23

申请号：US11248310

申请日：2005-10-12

Applicant: Masaaki Oka

Inventor： Masaaki Oka

IPC: H01L23/06

CPC classification number: H01L25/165 ,  H01L23/525 ,  H01L25/105 ,  H01L25/18 ,  H01L2225/1005 ,  H01L2924/0002 ,  H05K1/181 ,  H05K2201/09409 ,  H05K2201/09418 ,  H05K2201/09709 ,  H05K2201/10159 ,  H05K2201/10689 ,  Y02P70/611 ,  H01L2924/00

Abstract: An electronic device is provided on which semiconductor packages can be mounted efficiently. The electronic device includes a board that can receive a plurality of first semiconductor packages each carrying a processor device and a plurality of second semiconductor packages each carrying a memory device. Mount regions where the packages are to be mounted and non-mount regions are alternately arranged in rows and columns on the board. This ensures approximately equal wiring distances between the packages, allowing processor devices to access associated memory devices at the same time.

公开(公告)号：US06992374B1

公开(公告)日：2006-01-31

申请号：US10867055

申请日：2004-06-14

Applicant: Zhiping Yang ,  Vinayagam Arumugham ,  Lekhanh Dang

Inventor： Zhiping Yang ,  Vinayagam Arumugham ,  Lekhanh Dang

IPC: H01L23/02 ,  H01L23/48 ,  H01L29/00

CPC classification number: H05K1/0231 ,  H05K1/114 ,  H05K2201/09418 ,  H05K2201/10545 ,  H05K2201/10734 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49165

Abstract: A circuit board module has an IC device, discrete components, and a circuit board structure in electrical communication with the IC device and the discrete component. The circuit board structure includes non-conductive material defining a top surface of the circuit board structure and a bottom surface of the circuit board structure, vias supported by the non-conductive material, top pads electrically coupled to the vias, and bottom pads electrically coupled to the vias. The top pads are disposed along the top surface of the circuit board structure and are soldered to IC device. The bottom pads are disposed along the bottom surface of the circuit board structure and are configured to solder to the discrete components. The bottom pads include a group of angled bottom pads which is soldered to a group of the discrete components substantially at 45 degree angles relative to sides of the IC device.

公开(公告)号：US20050124194A1

公开(公告)日：2005-06-09

申请号：US11004340

申请日：2004-12-03

Applicant: Josef Loibl ,  Georg Mentzel

Inventor： Josef Loibl ,  Georg Mentzel

IPC: H01R4/02 ,  H05K1/11 ,  H05K3/36 ,  H01R3/00

CPC classification number: H01R4/027 ,  H05K1/117 ,  H05K3/36 ,  H05K2201/09027 ,  H05K2201/09418 ,  H05K2201/10287

Abstract: A component (5) which can be screwed into a circuit module (1) with a circuit board (3) has ring-segment shaped contacts (9, 10, 11), which allow contacting between the circuit board (3) and component (5) irrespective of the rotational position of the component (5).

Abstract translation: 可以用电路板（3）拧入电路模块（1）的部件（5）具有环形形状的触点（9,10,11），其允许电路板（3）和部件 5），而与组件（5）的旋转位置无关。

公开(公告)号：US06900978B2

公开(公告)日：2005-05-31

申请号：US10903275

申请日：2004-07-30

Applicant: Masayuki Shimizu ,  Naoto Yokoyama

Inventor： Masayuki Shimizu ,  Naoto Yokoyama

IPC: H01G4/38 ,  H05K1/02 ,  H05K1/11 ,  H05K1/18 ,  H05K1/16

CPC classification number: H01G4/38 ,  H05K1/0231 ,  H05K1/113 ,  H05K1/181 ,  H05K2201/09418 ,  H05K2201/10522 ,  H05K2201/10636 ,  Y02P70/611

Abstract: A capacitor mounting structure has four capacitors close-arranged so that the outline of the arrangement is almost rectangular. The capacitors are arranged so that an angle formed by the current vectors of each pair of adjacent capacitors is 90 degrees and that one end face in the length direction of each capacitor is directed in parallel to an inner side face of another adjacent capacitor.

Abstract translation: 电容器安装结构具有四个紧密排列的电容器，使得该布置的轮廓几乎是矩形的。 电容器被布置成使得由每对相邻电容器的电流矢量形成的角度为90度，并且每个电容器的长度方向上的一个端面平行于另一相邻电容器的内侧面。

公开(公告)号：US06854853B2

公开(公告)日：2005-02-15

申请号：US10390269

申请日：2003-03-17

Applicant: Christopher L. Rovik ,  Wesley R. Corrion ,  Ricardo Hernandez ,  Adrian G. Gheorghiu

Inventor： Christopher L. Rovik ,  Wesley R. Corrion ,  Ricardo Hernandez ,  Adrian G. Gheorghiu

IPC: G01D7/00 ,  B60K35/00 ,  B60K37/02 ,  B60Q3/04 ,  H05K1/11 ,  H05K3/34 ,  G01D11/28

CPC classification number: H05K3/3468 ,  B60Q3/14 ,  H05K1/111 ,  H05K3/3442 ,  H05K2201/09381 ,  H05K2201/09418 ,  H05K2201/10106 ,  H05K2201/10636 ,  H05K2203/168 ,  Y02P70/611 ,  Y10S362/80

Abstract: An instrument cluster for communicating a vehicle's operating status to a vehicle occupant is disclosed. The instrument cluster includes a housing for supporting the instrument cluster. The housing is mountable to a vehicle instrument panel. A circuit board is secured to the housing. A motor having a motor shaft is rotatably coupled to the motor and the motor is secured to the circuit board. A gauge pointer is mounted on the motor shaft and rotatable therewith for indicating the vehicle's operating status. At least one diode is provided for illuminating the gauge pointer and at least one diode “footprint” is disposed on the circuit board proximate the motor shaft for electrically interconnecting the at least one diode to the circuit board. The at least one diode “footprint” has a cathode solder pad and an anode solder pad. The anode solder pad is substantially rectangular and the cathode solder pad is substantially L-shaped.

Abstract translation: 公开了一种用于将车辆的运行状态传达给车辆乘客的仪表组。 仪器组包括用于支撑仪表组的外壳。 外壳可安装到车辆仪表板上。 电路板固定在外壳上。 具有电动机轴的电动机可旋转地联接到电动机，并且电动机固定到电路板。 仪表指针安装在电动机轴上并与其一起旋转以指示车辆的运行状态。 提供至少一个用于照亮测量指示器的二极管，并且至少一个二极管“占地面积”设置在靠近电机轴的电路板上，用于将至少一个二极管电连接到电路板。 至少一个二极管“覆盖区”具有阴极焊盘和阳极焊盘。 阳极焊盘基本上是矩形的，而阴极焊盘大致为L形。

公开(公告)号：US20040183205A1

公开(公告)日：2004-09-23

申请号：US10753357

申请日：2004-01-09

Applicant: SEIKO EPSON CORPORATION

Inventor： Koji Yamaguchi

IPC: H01L023/48

CPC classification number: H05K3/3436 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/50 ,  H01L2224/05548 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15159 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K2201/09418 ,  Y02P70/613 ,  H01L2224/05599 ,  H01L2924/00012

Abstract: To improve the connection reliability in mounting semiconductor chips Solder balls 6 are disposed on a back surface of an interposer substrate 1, in a manner to avoid diagonal lines 7 of the interposer substrate 1, and a semiconductor chip 3 is mounted on a surface of the interposer substrate 1.

Abstract translation: 提高安装半导体芯片的连接可靠性焊球6以避免插入物基板1的对角线7的方式配置在中介基板1的背面，半导体芯片3安装在 内插基板1。

公开(公告)号：US20040113285A1

公开(公告)日：2004-06-17

申请号：US10322308

申请日：2002-12-17

Inventor： Cheng Siew Tay ,  Swee Kian Cheng ,  Eng Huat Goh

IPC: H01L023/485

CPC classification number: H01L23/49816 ,  H01L23/49838 ,  H01L2924/0002 ,  H05K3/3452 ,  H05K2201/09418 ,  H05K2201/0989 ,  H05K2201/099 ,  H05K2201/10734 ,  H01L2924/00

Abstract: A method and apparatus is provided that pertains to resisting crack initiation and propagation in electrical interconnections between components and substrates in ball grid array microelectronic packages. A hybrid of dielectric defined and non-dielectric defined electrical interconnects reduces the potential for electrical interconnection failure without having to control the dielectric defined interconnect ratio of substrates. In addition selective orientation of the dielectric defined edge portion of the electrical interconnect away from the point where cracks initiate resists crack propagation and component failure.

Abstract translation: 提供了一种方法和装置，其涉及抵抗在球栅阵列微电子封装中的部件和基板之间的电互连中的裂纹起始和传播。 电介质限定和非介质限定的电互连的混合物减少了电互连故障的可能性，而不必控制介质限定的衬底互连比。 此外，电互连的电介质限定边缘部分远离开始点的选择性取向抵抗裂纹扩展和部件故障。

公开(公告)号：US20040061223A1

公开(公告)日：2004-04-01

申请号：US10676624

申请日：2003-09-30

Inventor： William M. Siu ,  Bidyut K. Bhattacharyya

IPC: H01L023/48 ,  H01L023/52 ,  H01L029/40

CPC classification number: H01L23/49811 ,  H01L23/49838 ,  H01L2924/0002 ,  H05K1/111 ,  H05K2201/09418 ,  H05K2201/10734 ,  Y02P70/611 ,  H01L2924/00

Abstract: An integrated circuit die and/or package. An apparatus is described having a substrate with a central region and an outer region. A first plurality of electrical connections is spaced apart by a first distance on the outer region of the substrate. A second plurality of electrical connections is spaced apart by a second distance, smaller than the first distance, on the central region of the substrate.

Abstract translation: 集成电路管芯和/或封装。 描述了具有中心区域和外部区域的基板的装置。 第一多个电连接在衬底的外部区域上间隔开第一距离。 第二组多个电连接在衬底的中心区域上隔开第二距离，小于第一距离。

公开(公告)号：US06549179B2

公开(公告)日：2003-04-15

申请号：US09859519

申请日：2001-05-18

Applicant: John S. Youngquist ,  John W. Toulmin

Inventor： John S. Youngquist ,  John W. Toulmin

IPC: G09G314

CPC classification number: H05K1/181 ,  G09F9/33 ,  G09G3/32 ,  H01L25/0753 ,  H01L2924/0002 ,  H05K1/112 ,  H05K2201/09409 ,  H05K2201/09418 ,  H05K2201/10106 ,  H05K2201/10522 ,  H05K2201/10636 ,  Y02P70/611 ,  Y10S362/80 ,  H01L2924/00

Abstract: Surface mounted LEDs are arrayed in special patterns to provide a relatively high resolution dot-matrix visual display and/or multi-segment character displays. Especially abbreviated solder bonding pads are utilized to obtain a higher density packing of the surface mounted arrays in at least some embodiments. Special anti-glare coatings and structures are employed to reduce ambient light reflections for aircraft instrument applications. Multi-colored display outputs are also provided.

Abstract translation: 表面安装的LED以特殊图案排列以提供相对高分辨率的点阵视觉显示和/或多段字符显示。 在至少一些实施例中，使用特别简略的焊接焊盘来获得表面安装阵列的较高密度的填料。 采用特殊的防眩光涂层和结构来减少航空器仪表应用的环境光反射。 还提供多色显示输出。