公开(公告)号：US20120307461A1

公开(公告)日：2012-12-06

申请号：US13511798

申请日：2010-10-07

Applicant: Uwe Liskow

Inventor： Uwe Liskow

IPC: H05K1/02 ,  H05K1/14

CPC classification number: H05K3/281 ,  H05K1/0393 ,  H05K1/147 ,  H05K2201/09781 ,  H05K2201/2009 ,  H05K2203/1147

Abstract: A flexible circuit board is provided. The flexible circuit board includes a conductive path and a shell that at least regionally surrounds the conductive path. The shell is fastened to the conductive path with an adhesive layer between the conductive path and the shell. The shell is enveloped at least regionally by a cover. A filler layer is provided between the shell and the cover. The flexible circuit board is used in an electric device.

Abstract translation: 提供了柔性电路板。 柔性电路板包括至少区域围绕导电路径的导电路径和壳体。 壳体通过导电路径和壳体之间的粘合剂层紧固到导电路径。 外壳至少在封面上被区域封闭。 在壳体和盖子之间设置填充层。 柔性电路板用于电气设备中。

公开(公告)号：US08319107B2

公开(公告)日：2012-11-27

申请号：US12162740

申请日：2007-02-07

Applicant: Ki-Geon Lee

Inventor： Ki-Geon Lee

IPC: H05K7/20

CPC classification number: H05K1/0206 ,  H05K1/116 ,  H05K3/0061 ,  H05K3/3447 ,  H05K3/42 ,  H05K2201/09609 ,  H05K2201/09781 ,  H05K2201/0979 ,  H05K2201/10106 ,  H05K2201/10303 ,  H05K2201/10651

Abstract: A circuit board and a heat radiating system of the circuit board. In the circuit board, a plurality of conductive layer regions coated with a conductor are separately formed on both sides of an insulating substrate, the conductive layer region formed on either side of an insulating region on each of the both sides of the insulating substrate, the plurality of the conductive layer regions includes a plurality of through holes which penetrate through the insulating substrate and are coated with a conductor over an inner wall, the conductor in the through hole electrically conducts the coated conductor of the plurality of the conductive layer regions, one of the lead pins is connected to one of the separated conductive layer regions on the both sides based on the insulating region, and the other lead pin is connected to the other conductive layer region. Accordingly, the efficient heat radiation of the circuit board can prevent the component malfunction, the lifespan reduction, the power consumption increase, and the illuminance drop.

Abstract translation: 电路板的电路板和散热系统。 在电路基板中，在绝缘基板的两面分别形成涂布有导体的多个导电层区域，在绝缘基板的两侧的绝缘区域的两侧形成的导电层区域， 多个导电层区域包括穿过绝缘基板并在内壁上涂覆有导体的多个通孔，通孔中的导体导电多个导电层区域的涂覆导体，一个 基于绝缘区域将引线引脚连接到两侧的分离的导电层区域中的一个，另一个引脚与另一个导电层区域连接。 因此，电路板的高效散热可以防止元件故障，寿命降低，功率消耗增加和照度下降。

公开(公告)号：US08299876B2

公开(公告)日：2012-10-30

申请号：US12704529

申请日：2010-02-12

Applicant: Pei-Yang Lin ,  Chih-Chung Lin ,  Wen-Lin Yang

Inventor： Pei-Yang Lin ,  Chih-Chung Lin ,  Wen-Lin Yang

IPC: H01P1/203 ,  H03H7/38

CPC classification number: H01P1/20345 ,  H05K1/0216 ,  H05K1/0245 ,  H05K1/0251 ,  H05K3/429 ,  H05K2201/09636 ,  H05K2201/09781

Abstract: A filter for filtering noise generated by a differential signal having a specific wavelength transmitted by a first transmission line and a second transmission line is disclosed. The filter includes a multi-layer substrate, a first microstrip line and a second microstrip line. The first and the second transmission lines and the first and the second microstrip lines are disposed at the multi-layer substrate. In addition, one end of the first microstrip line and one end of the second microstrip line are electrically connected to the first and the second transmission lines, respectively, by passing through the vias, and the other end is in a floating state. The impedances of the first and the second microstrip lines match the impedances of the first and the second transmission lines, respectively. Thus, the first and the second microstrip lines may filter the noise generated by the differential signal having the specific wavelength.

Abstract translation: 公开了一种用于滤波由具有由第一传输线和第二传输线传输的特定波长的差分信号产生的噪声。 滤波器包括多层基板，第一微带线和第二微带线。 第一和第二传输线以及第一和第二微带线设置在多层基板上。 此外，第一微带线的一端和第二微带线的一端分别通过穿过通孔而电连接到第一和第二传输线，另一端处于浮置状态。 第一和第二微带线的阻抗分别匹配第一和第二传输线的阻抗。 因此，第一和第二微带线可以滤除由具有特定波长的差分信号产生的噪声。

公开(公告)号：US20120212252A1

公开(公告)日：2012-08-23

申请号：US13029187

申请日：2011-02-17

Applicant: Scott H. Aronson ,  Gerald G. Gagnon

Inventor： Scott H. Aronson ,  Gerald G. Gagnon

IPC: G01R31/28 ,  H05K3/20 ,  H01F5/00

CPC classification number: H05K1/0268 ,  G01R31/2805 ,  G01R31/2818 ,  H05K1/165 ,  H05K3/4638 ,  H05K2201/09781 ,  Y10T29/49165

Abstract: A structure for determining misregistration of layers of a printed circuit board. A first conductive pattern is on a first layer of the printed circuit board. A second conductive pattern on a second layer of the printed circuit board. There is a hole through the first layer and the second layer of the printed circuit board. There is electrically conductive material in the hole. If the first layer and the second layer of the printed circuit board are registered properly, the first conductive pattern and the second conductive pattern are not electrically continuous with the conductive material in the hole. If either or both of the first layer and the second layer are a misregistered layer, the conductive trace on the misregistered layer is electrically continuous with the conductive material in the hole.

Abstract translation: 一种用于确定印刷电路板的层的重合不良的结构。 第一导电图案位于印刷电路板的第一层上。 在印刷电路板的第二层上的第二导电图案。 在印刷电路板的第一层和第二层上有一个孔。 孔中有导电材料。 如果正确登记印刷电路板的第一层和第二层，则第一导电图案和第二导电图案不与孔中的导电材料电连接。 如果第一层和第二层中的任一个或第二层是不对准层，则未配准层上的导电迹线与孔中的导电材料电连接。

公开(公告)号：US20120200974A1

公开(公告)日：2012-08-09

申请号：US13362562

申请日：2012-01-31

Applicant: Yuuki Mikami ,  Toru Itabashi ,  Takahiko Furuta ,  Ryoichi Shiraishi ,  Yusuke Takahashi ,  Hiroaki Nakamura ,  Shigeki Nishiyama

Inventor： Yuuki Mikami ,  Toru Itabashi ,  Takahiko Furuta ,  Ryoichi Shiraishi ,  Yusuke Takahashi ,  Hiroaki Nakamura ,  Shigeki Nishiyama

IPC: H02H3/08 ,  H02H5/04

CPC classification number: H02H5/047 ,  H01H85/046 ,  H01H85/08 ,  H01H85/10 ,  H05K1/0265 ,  H05K1/0293 ,  H05K2201/09263 ,  H05K2201/09727 ,  H05K2201/09736 ,  H05K2201/09781 ,  H05K2201/0989 ,  H05K2201/09909 ,  H05K2201/10181

Abstract: An electronic control device includes a substrate, a plurality of component-mounted wires, a plurality of electronic components, a common wire, an interrupt wire and a protective layer. The component-mounted wires and the common wire are disposed on the substrate. The electronic components are mounted on the respective component-mounted wires and are coupled with the common wire. The interrupt wire is coupled between one component-mounted wire and the common wire, and is configured to melt in accordance with heat generated by an overcurrent to interrupt a coupling between the component-mounted wire and the common wire. The protective layer covers a surface of the substrate including the interrupt wire and defines an opening portion so that at least a portion of the interrupt wire is exposed.

Abstract translation: 电子控制装置包括基板，多个部件安装导线，多个电子部件，公共线，中断线和保护层。 组件安装线和公共线设置在基板上。 电子部件安装在相应的部件安装的导线上并与公共线耦合。 中断线耦合在一个部件安装的线和公共线之间，并且被配置为根据由过电流产生的热量熔化，以中断部件安装的线和公共线之间的耦合。 保护层覆盖包括中断线的基板的表面，并且限定开口部分，使得中断线的至少一部分被暴露。

公开(公告)号：US20120200366A1

公开(公告)日：2012-08-09

申请号：US13358818

申请日：2012-01-26

Applicant: Daisuke NISHIYAMA ,  Kenji Kasahara ,  Hiroyuki Murakoshi

Inventor： Daisuke NISHIYAMA ,  Kenji Kasahara ,  Hiroyuki Murakoshi

IPC: H03B5/32 ,  H05K3/34

CPC classification number: H03H9/10 ,  H03H9/13 ,  H05K1/111 ,  H05K3/3442 ,  H05K2201/09781 ,  H05K2201/10075 ,  H05K2201/2036 ,  Y10T29/42 ,  Y10T29/49144

Abstract: An oscillator that can suppress a solder crack caused by a temperature change by a simple structure at low cost and improve heat cycle resistance performance is provided. The oscillator includes an epoxy resin board and an electronic component mounted on the board. Two-terminal electrode patterns are formed on the board, and connected to terminal electrodes of the electronic component by solder. A projection is formed on each of the electrode patterns at a part connected to a corresponding terminal electrode to create a space between the terminal electrode and the electrode pattern, and the solder forms a fillet in the space. This contributes to enhanced adhesion strength of the solder.

Abstract translation: 提供了一种可以通过简单的结构以低成本抑制由温度变化引起的焊料裂纹并提高耐热循环性能的振荡器。 振荡器包括环氧树脂板和安装在板上的电子部件。 在电路板上形成两端电极图形，并通过焊料与电子部件的端子电极连接。 在与相应的端子电极连接的部分上的每个电极图案上形成突起，以在端子电极和电极图案之间形成空间，并且焊料在该空间中形成圆角。 这有助于提高焊料的粘附强度。

公开(公告)号：US08237056B2

公开(公告)日：2012-08-07

申请号：US12505032

申请日：2009-07-17

Applicant: Ayao Niki

Inventor： Ayao Niki

IPC: H05K1/03

CPC classification number: B23K1/0016 ,  B23K3/0623 ,  B23K20/103 ,  B23K26/389 ,  B23K2101/40 ,  B23K2101/42 ,  B23K2103/42 ,  B23K2103/50 ,  H01L21/4857 ,  H01L21/6835 ,  H01L23/49816 ,  H01L23/49822 ,  H01L24/81 ,  H01L2221/68345 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H05K1/0271 ,  H05K3/025 ,  H05K3/4682 ,  H05K2201/09781 ,  H05K2201/10674 ,  H05K2201/2009 ,  Y10T29/49149 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: To provide a novel multilayer printed wiring board in which a conductor on the outermost resin layer is positioned properly. Furthermore, to provide a novel multilayer printed wiring board in which productivity is enhanced when forming solder bumps on the pads for mounting a semiconductor element. In multilayer printed wiring board, multiple pads for connection with a semiconductor chip are formed on one surface, and on its opposite surface, external connection terminals for connection with another substrate are formed. The pads for connection with a semiconductor chip are formed in the central region of one surface, stiffener is formed in the peripheral region surrounding the pads for connection with a semiconductor chip, pads for connection with a semiconductor chip and stiffener are formed with the same material and are set to be the same height, and the actual area of the stiffener is determined according to the total area of the multiple pads for connection with a semiconductor chip.

Abstract translation: 提供一种新颖的多层印刷线路板，其中最外层树脂层上的导体正确定位。 此外，提供一种新颖的多层印刷线路板，其中在用于安装半导体元件的焊盘上形成焊料凸块时，其生产率得到提高。 在多层印刷布线板中，在一个表面上形成用于与半导体芯片连接的多个焊盘，并且在其相对表面上形成用于与另一基板连接的外部连接端子。 用于与半导体芯片连接的焊盘形成在一个表面的中心区域中，在围绕焊盘的周边区域中形成加强件以与半导体芯片连接，用于与半导体芯片和加强件连接的焊盘用相同的材​​料形成 并且被设定为相同的高度，并且根据用于与半导体芯片连接的多个焊盘的总面积来确定加强件的实际面积。

公开(公告)号：US20120145437A1

公开(公告)日：2012-06-14

申请号：US13403155

申请日：2012-02-23

Applicant: Junichi Nakamura ,  Kotaro Kodani ,  Michiro Ogawa

Inventor： Junichi Nakamura ,  Kotaro Kodani ,  Michiro Ogawa

IPC: H05K1/00

CPC classification number: H01L23/49544 ,  H01L23/49822 ,  H01L24/97 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/19041 ,  H05K1/0271 ,  H05K3/0052 ,  H05K3/284 ,  H05K3/4682 ,  H05K2201/09136 ,  H05K2201/09681 ,  H05K2201/09781 ,  H05K2201/2009 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A wiring board includes a wiring forming region in which a plurality of wiring layers are stacked while sandwiching insulating layers, an outer periphery region which is arranged around the wiring forming region and in which a reinforcing pattern is formed in the same layer as each of the wiring layers. An area ratio of the reinforcing pattern to the outer periphery region and an area ratio of the wiring layer to the wiring forming region are substantially the same in each of the layers, and the reinforcing patterns exist without a gap in the outer periphery region when the wiring board is viewed in planar perspective.

Abstract translation: 布线基板包括布线形成区域，其中堆叠多个布线层，同时夹着绝缘层;外周区域布置在布线形成区域周围，并且其中加强图案形成在与每个布线形成区域相同的层中 接线层。 增强图案与外周区域的面积比和布线层与布线形成区域的面积比在各层中基本相同，并且当外围区域中没有间隙时，增强图案在外周区域中不存在间隙 接线板以平面视角观看。

公开(公告)号：US08199306B2

公开(公告)日：2012-06-12

申请号：US12343183

申请日：2008-12-23

Applicant: Gwan-Hyoung Lee ,  Young-Bee Chu ,  Sang-Hee Lee ,  Jeong-Seok Oh ,  Young-Soo Kim ,  Wal-Hee Kim

Inventor： Gwan-Hyoung Lee ,  Young-Bee Chu ,  Sang-Hee Lee ,  Jeong-Seok Oh ,  Young-Soo Kim ,  Wal-Hee Kim

IPC: G02F1/1345

CPC classification number: H05K1/0209 ,  H05K3/0061 ,  H05K2201/0209 ,  H05K2201/0215 ,  H05K2201/09781 ,  H05K2201/10106

Abstract: A printed circuit board (PCB) includes a base substrate, an electrical wiring, a dummy pad and a thermally conductive adhesion member. The base substrate includes a light-emitting diode (LED) mounted on a first surface of the base substrate. The electrical wiring is electrically connected to the LED. The dummy pad is formed on the first surface to be connected to the electrical wiring. The thermally conductive adhesion member is attached to a second surface of the base substrate. Therefore, superior heat radiation may be obtained, thereby reducing or preventing damage to the LED and the LCD device using the LED by radiating the heat from the LED used as a light source.

Abstract translation: 印刷电路板（PCB）包括基底基板，电线，虚拟焊盘和导热粘接部件。 基底基板包括安装在基底基板的第一表面上的发光二极管（LED）。 电线电连接到LED。 虚拟焊盘形成在要连接到电线的第一表面上。 导热粘合构件附接到基底基板的第二表面。 因此，可以获得优异的热辐射，从而通过辐射来自用作光源的LED的热量来减少或防止对使用LED的LED和LCD装置的损坏。

公开(公告)号：US20120120617A1

公开(公告)日：2012-05-17

申请号：US13387566

申请日：2010-06-17

Applicant: Kazuhiro Kashiwakura

Inventor： Kazuhiro Kashiwakura

IPC: H05K1/18 ,  H05K9/00 ,  H01B9/00

CPC classification number: H05K1/0228 ,  H05K1/162 ,  H05K2201/09236 ,  H05K2201/09245 ,  H05K2201/09781

Abstract: Provided is a feed line structure that enables suppression of noise entering a primary power supply from an electronic circuit without using a circuit component such as a choke coil and a capacitor and also without increasing an occupied area on the circuit board, so that an EMI countermeasure is achieved. The feed line structure includes a feed line composed by pairing a power supply wire 41 and a reference potential wire 42 in an insulator 40, and is characterized in that a wire 43 in a floating state in potential is provided.

Abstract translation: 提供了一种馈线结构，其能够抑制从电子电路进入主电源的噪声，而不使用诸如扼流线圈和电容器的电路元件，并且还不增加电路板上的占用面积，使得EMI对策 已完成。 馈电线结构包括通过将电源线41和参考电位线42配对在绝缘体40中而构成的馈电线，其特征在于提供处于浮置状态的电线43。