公开(公告)号：US07456493B2

公开(公告)日：2008-11-25

申请号：US11385582

申请日：2006-03-20

Applicant: Shinji Murata ,  Masayoshi Takeuhi

Inventor： Shinji Murata ,  Masayoshi Takeuhi

IPC: H01L23/495

CPC classification number: H01L23/49816 ,  H01L21/563 ,  H01L23/49838 ,  H01L24/16 ,  H01L24/28 ,  H01L24/81 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/1601 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81385 ,  H01L2224/81801 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/0132 ,  H05K1/111 ,  H05K3/108 ,  H05K3/3436 ,  H05K3/388 ,  H05K2201/09663 ,  H05K2201/0969 ,  H05K2201/098 ,  H05K2201/10977 ,  H05K2203/0594 ,  Y02P70/611 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: There is provided a structure for mounting a semiconductor part having improved productivity, in which a bump is detached from a land portion and a method of manufacturing a mounting substrate used therein. The structure for mounting the semiconductor part includes a mounting substrate 1 having an insulating substrate 2 on which a wiring pattern 3 and a land portion 4 are provided, a semiconductor part 5 mounted on the mounting substrate 1 using a bump 7 and the land portion 4, and an underfill 8 inserted between the semiconductor part 5 and the insulating substrate 2. An undercut portion 4c having an inverse tapered shape from the insulating substrate 2 to an upper surface of the land portion 4 is provided in an edge 4a of the land portion 4 in which the bump 7 is located, and the bump is inserted into the undercut portion. Accordingly, since the couple between the bump 7 and the land portion 4 becomes stronger, the bump is not detached from the land portion 4 when the underfill 8 expands or contracts.

Abstract translation: 提供一种用于安装具有提高的生产率的半导体部件的结构，其中凸块从凸台部分分离，以及制造其中使用的安装基板的方法。 用于安装半导体部件的结构包括：安装基板1，其具有设置有布线图案3和接地部4的绝缘基板2，使用凸块7安装在安装基板1上的半导体部5以及接地部4 以及插入在半导体部件5和绝缘基板2之间的底部填充物8。 具有从绝缘基板2到基台部4的上表面的倒锥形的底切部分4c设置在凸块7所在的凸台部分4的边缘4a中，凸块被插入 底切部分。 因此，由于凸块7和凸台部4之间的连接变得更强，所以当底部填充物8膨胀或收缩时，凸起部不会从陆部4脱离。

公开(公告)号：US20080250634A1

公开(公告)日：2008-10-16

申请号：US12140042

申请日：2008-06-16

Applicant: Osamu NAKAO ,  Reiji Higuchi ,  Syouji Ito ,  Masahiro Okamoto

Inventor： Osamu NAKAO ,  Reiji Higuchi ,  Syouji Ito ,  Masahiro Okamoto

IPC: H05K3/36

CPC classification number: H05K3/4617 ,  H05K3/386 ,  H05K3/4069 ,  H05K3/4652 ,  H05K2201/0397 ,  H05K2201/09509 ,  H05K2201/096 ,  H05K2201/0969 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

Abstract: A base material (20) is arranged on top of at least one first internal layer base material (10), and a second internal base material (30) is arranged underneath the base material (10). And thereafter a surface layer circuitry conductive foil (40) is arranged underneath the base material (30), and subsequently these materials are colaminated for forming a colaminated body (80). While this colaminating operation, conductive portions being formed in the base materials 10, 30 are aligned to electrically connect one another for forming an internal circuitry. And thereafter, an interlayer conductive portion (51) being electrically connected to the internal circuitry is formed, and a minute circuitry is formed on the top of the base material (20) and the conductive foil (40) accordingly.

Abstract translation: 基材（20）布置在至少一个第一内层基材（10）的顶部上，并且第二内基材（30）布置在基材（10）的下方。 此后，表面层电路导电箔（40）布置在基底材料（30）的下面，随后将这些材料进行混合以形成一个混合体（80）。 在这种分层操作中，形成在基材10,30中的导电部分被对齐以彼此电连接以形成内部电路。 此后，形成电连接到内部电路的层间导电部分（51），并且相应地在基底材料（20）的顶部和导电箔（40）上形成分电路。

公开(公告)号：US07427717B2

公开(公告)日：2008-09-23

申请号：US11131341

申请日：2005-05-18

Applicant: Shinji Morimoto ,  Koji Nakashima ,  Toyokazu Yoshino ,  Katsuya Okamoto

Inventor： Shinji Morimoto ,  Koji Nakashima ,  Toyokazu Yoshino ,  Katsuya Okamoto

IPC: H05K1/00

CPC classification number: H05K3/363 ,  H05K3/281 ,  H05K3/3452 ,  H05K3/386 ,  H05K3/4038 ,  H05K2201/0215 ,  H05K2201/0305 ,  H05K2201/096 ,  H05K2201/0969 ,  H05K2201/09909 ,  H05K2203/0278 ,  H05K2203/058

Abstract: A flexible printed wiring board has a configuration which is equipped with a solder resist portion formed by coating through the use of a screen printing method on a region including a component mounting portion of a conductor pattern, and a cover lay film pasted in such a manner that an outer circumference portion of an opening portion overlaps an upper portion of a circumference portion of the solder resist portion. A manufacturing method of a flexible printed wiring board of the invention has a configuration which is equipped with a conductor pattern forming process, a solder resist forming process, and a cover lay film pasting process.

Abstract translation: 柔性印刷布线板具有这样的构造，该构造配备有通过使用丝网印刷法在包括导体图案的部件安装部分的区域上涂覆而形成的阻焊部分和以这种方式粘贴的覆盖膜 开口部分的外周部分与阻焊部分的圆周部分的上部重叠。 本发明的柔性印刷电路板的制造方法具有配置有导体图案形成工序，阻焊剂形成工序以及覆盖膜贴合工序的结构。

公开(公告)号：US20080186045A1

公开(公告)日：2008-08-07

申请号：US12023144

申请日：2008-01-31

Applicant: Yoji UEDA ,  Tsukasa SHIRAISHI ,  Yositake HAYASHI ,  Rikiya OKIMOTO

Inventor： Yoji UEDA ,  Tsukasa SHIRAISHI ,  Yositake HAYASHI ,  Rikiya OKIMOTO

IPC: G01R31/02 ,  H05K1/00 ,  H05K3/36

CPC classification number: H05K3/4638 ,  H05K1/0268 ,  H05K1/116 ,  H05K3/4623 ,  H05K2201/0969 ,  H05K2201/09781 ,  Y10T29/49126

Abstract: An inspection mark structure has an inspection via hole, which is provided in substrate sheets to be heat-pressed constituting at least two layers of laminates; a round pattern electrode, which is formed on one main face side of the substrate sheet provided with the inspection via hole, and provided around the end face of the inspection via hole at such a predetermined distance as not to come into contact with the end face; and a conduction electrode, which is formed on the other main face side of the substrate sheet provided with the inspection via hole, and provided so as to be electrically connected with the end face of the inspection via hole.

Abstract translation: 检查标记结构具有检查通孔，其设置在构成至少两层层压体的被加热的基板中; 圆形图案电极，其形成在设置有检查通孔的基板的一个主面侧上，并且设置在检查通孔的端面周围以不与端面接触的预定距离 ; 以及导电电极，其形成在设置有检查通孔的基板的另一主面侧，并且设置成与检查通孔的端面电连接。

公开(公告)号：US07405945B2

公开(公告)日：2008-07-29

申请号：US11500510

申请日：2006-08-08

Applicant: Tsuyoshi Miura

Inventor： Tsuyoshi Miura

IPC: H05K7/00

CPC classification number: H05K3/3421 ,  H05K3/3468 ,  H05K2201/0969 ,  H05K2201/09781 ,  H05K2201/10689 ,  H05K2203/046 ,  Y02P70/613

Abstract: A four-way lead flat package IC-mount printed circuit board, carrying a four-way lead flat package IC and having front soldering land groups placed in front of the four way lead flat package IC and rear soldering land groups placed in the rear of the four-way lead flat package IC, has solder drawing lands, in a neighboring area, between the front soldering land groups and the rear soldering land groups adjacent to the front soldering land groups, and/or a trailing area of the rear soldering land groups. The solder drawing lands are formed with slits substantially parallel to the lines of soldering lands of the front soldering land groups or the rear soldering land groups placed in front of the solder drawing lands. These result in an advantageous effect of enabling the prevention of the occurrence of soldering bridges and soldering residues in the front soldering land groups or the rear soldering land groups.

Abstract translation: 一个四路铅扁平封装IC安装印刷电路板，载有四路铅扁平封装IC，并且前面的焊接区域放置在四通导线扁平封装IC的前面，后面的焊接焊盘组放置在 四路铅扁平封装IC，在相邻区域中，在前焊接区域组和与前焊接区域组相邻的后焊接区域之间具有焊接绘图区域和/或后焊接区域的后部区域 团体 焊料焊盘形成有大致平行于前焊接焊盘组的焊盘的焊缝的缝隙或者位于焊料焊盘前方的后焊接焊盘组。 这些产生的效果是能够防止前端焊接组或后焊接组中的焊接桥和焊料残留的发生。

公开(公告)号：US07388733B2

公开(公告)日：2008-06-17

申请号：US11551985

申请日：2006-10-23

Applicant: Kurt C. Swanson ,  Jeffrey Wang

Inventor： Kurt C. Swanson ,  Jeffrey Wang

IPC: G11B5/48 ,  G11B21/16

CPC classification number: G11B5/48 ,  G11B5/484 ,  G11B5/486 ,  H05K1/056 ,  H05K3/108 ,  H05K3/244 ,  H05K3/4007 ,  H05K2201/0394 ,  H05K2201/0969 ,  H05K2203/0726

Abstract: A method of manufacturing an integrated lead head suspension flexure of the type having conductors on a spring metal layer capable of being etched by a first etching process. The method includes forming a patterned layer having gaps one or more flying lead regions of dielectric material on a major surface of the spring metal layer and forming one or more conductive leads on the flexure, including onto the dielectric material and over exposed spring metal at the gap at each flying lead region. At least the flying lead portion of the conductive lead is formed from conductive material resistant to the first etching process. The method also includes etching a flying lead region of the spring metal layer to remove a portion of the spring metal layer in the flying lead region and expose the flying lead portions of the conductive lead.

Abstract translation: 一种制造具有能够通过第一蚀刻工艺蚀刻的弹簧金属层上的导体的类型的集成引线头悬架挠曲的方法。 该方法包括在弹簧金属层的主表面上形成具有间隙一个或多个介电材料的引导区的图案层，并在挠曲件上形成一个或多个导电引线，包括在电介质材料上以及在暴露的弹簧金属上 每个飞行引导区域的间隙。 至少导电引线的引导部分由耐第一蚀刻工艺的导电材料形成。 该方法还包括蚀刻弹簧金属层的飞行引导区域以去除飞行引导区域中的弹簧金属层的一部分并暴露导电引线的飞行引线部分。

公开(公告)号：US07361994B2

公开(公告)日：2008-04-22

申请号：US11239952

申请日：2005-09-30

Applicant: Xiaoning Ye

Inventor： Xiaoning Ye

IPC: H01L23/52 ,  H01L23/48 ,  H01L29/40

CPC classification number: H01L23/49827 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/645 ,  H01L2224/16 ,  H01L2924/01078 ,  H01L2924/15311 ,  H05K1/0251 ,  H05K1/116 ,  H05K3/429 ,  H05K2201/093 ,  H05K2201/0969 ,  H05K2201/09718 ,  H05K2201/09727

Abstract: A system may include a conductive plane defining a non-conductive antipad area and a second non-conductive area extending from the antipad area in at least a first direction, a dielectric plane coupled to the conductive plane, a conductive via passing through the dielectric plane and the antipad area, a conductive pad connected to an end of the conductive via, and a conductive trace coupled to the dielectric plane and connected to the conductive pad, the conductive trace extending from the conductive pad in the first direction.

Abstract translation: 系统可以包括限定非导电止动区域的导电平面和在至少第一方向上从止血区域延伸的第二非导电区域，耦合到导电平面的电介质平面，穿过电介质平面的导电通孔 并且所述反面区域，连接到所述导电通孔的端部的导电焊盘以及耦合到所述电介质平面并连接到所述导电焊盘的导电迹线，所述导电迹线从所述导电焊盘沿所述第一方向延伸。

公开(公告)号：US07355853B2

公开(公告)日：2008-04-08

申请号：US10496005

申请日：2002-11-08

Applicant: Hideyuki Emoto ,  Masahiro Ibukiyama ,  Isao Sugimoto ,  Manabu Uto

Inventor： Hideyuki Emoto ,  Masahiro Ibukiyama ,  Isao Sugimoto ,  Manabu Uto

IPC: H05K7/20

CPC classification number: H05K3/0061 ,  H01L23/367 ,  H01L23/3735 ,  H01L2924/0002 ,  H05K1/0271 ,  H05K1/0306 ,  H05K3/341 ,  H05K2201/09663 ,  H05K2201/0969 ,  H05K2201/09745 ,  H01L2924/00

Abstract: A module is provided that has high reliability in the junction between a ceramic circuit board and a heat sink, undergoes small changes in shape and warp of a module structure comprising a ceramic circuit board and a metal heat sink event under a temperature history during power module assembly and power module actual use, eliminates an unfavorableness during power module assembly, and maintains high reliability over a long period of time. A module structure characterized in that in a module member formed by bonding the ceramic circuit board to the metal heat sink via a metal plate (A) the main component of which is aluminum, the metal plate (A) has a thickness of 400 μm or more and 1,200 μm or less.

Abstract translation: 提供了在陶瓷电路板和散热片之间的接合处具有高可靠性的模块，在功率模块的温度历史下，在包括陶瓷电路板和金属散热器事件的模块结构的形状和翘曲方面经历小的变化 组装和电源模块实际使用，消除了电源模块组装过程中的不利影响，并在长时间内保持高可靠性。 一种模块结构，其特征在于，在通过其主要成分为铝的金属板（A）将陶瓷电路板与金属散热器接合而形成的模块构件中，金属板（A）的厚度为400μm或 更多和1200个妈妈或更少。

公开(公告)号：US20080079889A1

公开(公告)日：2008-04-03

申请号：US11866667

申请日：2007-10-03

Applicant: Jin-Suk Lee ,  Hong-Tae Baeg

Inventor： Jin-Suk Lee ,  Hong-Tae Baeg

IPC: G02F1/1333 ,  H01J9/24

CPC classification number: H05K3/361 ,  G02F1/13452 ,  G02F1/13458 ,  H05K1/117 ,  H05K3/323 ,  H05K2201/0108 ,  H05K2201/0969

Abstract: A display apparatus includes a display panel having a signal pad section that receives image signals and provides the image signals to a signal line, and a conductive bonding member that is interposed between the signal pad section and a driver. The conductive bonding member is cured by light incident through an opening in the signal pad section and the heat generated as the light is absorbed in the signal pad section. The temperature difference between the display panel and the driver is reduced, so that the display is prevented from being bent, and the yield of products and the productivity are improved.

Abstract translation: 显示装置包括具有接收图像信号并将图像信号提供给信号线的信号焊盘部分的显示面板以及介于信号焊盘部分和驱动器之间的导电接合部件。 导电接合部件通过入射到信号焊盘部分中的开口的光固化，并且当光被吸收在信号焊盘部分中时产生的热量被固化。 显示面板和驱动器之间的温度差减小，防止显示器弯曲，并且提高产品的产量和生产率。

公开(公告)号：US20080059919A1

公开(公告)日：2008-03-06

申请号：US11936673

申请日：2007-11-07

Applicant: Hubert Harrer ,  Andreas Huber ,  Thomas-Michael Winkel

Inventor： Hubert Harrer ,  Andreas Huber ,  Thomas-Michael Winkel

IPC: G06F17/50

CPC classification number: H05K1/0265 ,  H05K2201/093 ,  H05K2201/09663 ,  H05K2201/0969 ,  H05K2201/10189 ,  Y10T29/49156

Abstract: A computer program for balancing power plane pin currents in a printed wiring board (PWB) provides for reduction in pin counts required for power plane (including ground plane) connections and/or reduction in requirements for connector current handling per pin. One or more slots is introduced in the metal layer implementing the power plane that alter the current distribution in the power plane. The per-pin current profile for connector pins connected to the power plane is equalized by tuning the length of the slot(s). The slots may be dashed or made internal to the power plane metal layer to avoid weakening the metal layer for laminated multi-layer PWBs and may be shaped around a connector end when the power plane pin allocation is not uniform at the connector ends. The resulting equalization reduces either pin count required for carrying the power plane current or reduces connector pin current requirements.

Abstract translation: 用于平衡印刷电路板（PWB）中的电源平面引脚电流的计算机程序提供了降低电源平面（包括接地平面）连接所需的引脚数量和/或减少每个引脚上连接器电流处理的要求。 在实现改变电力平面中的电流分布的电力平面的金属层中引入一个或多个槽。 连接到电源平面的连接器引脚的每引脚电流曲线通过调整插槽的长度来均衡。 槽可以在电源平面金属层的内部虚线或内部形成，以避免层压的多层PWB的金属层的削弱，并且当电源平面引脚分配在连接器端不均匀时可以围绕连接器端成形。 所产生的均衡减少了承载电源平面电流所需的引脚数或减少连接器引脚电流要求。