公开(公告)号：US08313983B2

公开(公告)日：2012-11-20

申请号：US13108430

申请日：2011-05-16

Applicant: Ryoichi Kajiwara ,  Shigehisa Motowaki ,  Kazutoshi Itou ,  Hiroshi Hozoji

Inventor： Ryoichi Kajiwara ,  Shigehisa Motowaki ,  Kazutoshi Itou ,  Hiroshi Hozoji

IPC: H01L21/44

CPC classification number: H01L23/49582 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/49586 ,  H01L24/29 ,  H01L24/37 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/29 ,  H01L2224/29101 ,  H01L2224/29116 ,  H01L2224/2919 ,  H01L2224/29298 ,  H01L2224/32245 ,  H01L2224/37124 ,  H01L2224/37147 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/48699 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/8384 ,  H01L2224/84801 ,  H01L2224/92247 ,  H01L2924/00011 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01014 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/10253 ,  H01L2924/12044 ,  H01L2924/15747 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/351 ,  H05K1/0306 ,  H05K1/053 ,  H05K1/056 ,  H05K3/28 ,  H05K2201/0175 ,  H05K2201/0195 ,  H05K2203/121 ,  Y10T428/12493 ,  Y10T428/12868 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/2929 ,  H01L2924/00012

Abstract: A fabrication method for a resin encapsulated semiconductor device includes the steps of: (1) die-bonding a semiconductor device to a first electrical connection metallic terminal of a wiring substrate; (2) electrically connecting an electrode of the semiconductor device and a second electrical connection metallic terminal of the wiring substrate via an electrical connector; (3) surface treating such an assembly by applying a solution to a surface of the assembly and baking the applied solution; and (4) transfer-molding an insulating encapsulating resin onto the surface-treated assembly.

Abstract translation: 树脂封装半导体器件的制造方法包括以下步骤：（1）将半导体器件芯片接合到布线基板的第一电连接金属端子; （2）经由电连接器电连接半导体器件的电极和布线基板的第二电连接金属端子; （3）通过将溶液施加到组件的表面并烘烤所施加的溶液来表面处理这样的组件; 和（4）将绝缘包封树脂传递模塑到表面处理的组件上。

公开(公告)号：US08199456B2

公开(公告)日：2012-06-12

申请号：US12078648

申请日：2008-04-02

Applicant: Sung-Taek Lim ,  Yul-Kyo Chung ,  Woon-Chun Kim

Inventor： Sung-Taek Lim ,  Yul-Kyo Chung ,  Woon-Chun Kim

IPC: H01G4/06

CPC classification number: H01G4/33 ,  H01G2/06 ,  H01G4/10 ,  H05K1/162 ,  H05K3/048 ,  H05K3/244 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2203/0315 ,  Y10T29/435

Abstract: A capacitor and a method of manufacturing the capacitor are disclosed. The capacitor may include a board, a polymer layer formed on one side of the board, a circuit pattern selectively formed over the polymer layer, and a titania nanosheet corresponding with the circuit pattern. Embodiments of the invention can provide flatness in the board, and allows the copper of the board to maintain its functionality as an electrode while increasing the adhesion to the titania nanosheet. The titania nanosheet may thus be implemented on a patterned board in a desired shape, number of layers, and thickness.

Abstract translation: 公开了电容器和制造该电容器的方法。 电容器可以包括板，形成在板的一侧上的聚合物层，选择性地形成在聚合物层上的电路图案，以及与电路图案对应的二氧化钛纳米片。 本发明的实施例可以提供板中的平坦度，并且允许板的铜保持其作为电极的功能，同时增加与二氧化钛纳米片的粘合性。 因此，二氧化钛纳米片可以在图案化的板上实现所需的形状，层数和厚度。

公开(公告)号：US08174017B2

公开(公告)日：2012-05-08

申请号：US11505201

申请日：2006-08-16

Applicant: Markondeya Raj Pulugurtha ,  Devarajan Balaraman ,  Isaac R. Abothu ,  Rao Tummala ,  Farrokh Ayazi

Inventor： Markondeya Raj Pulugurtha ,  Devarajan Balaraman ,  Isaac R. Abothu ,  Rao Tummala ,  Farrokh Ayazi

IPC: H01L27/108

CPC classification number: H01L27/1203 ,  H01G4/1227 ,  H01G4/33 ,  H01L21/84 ,  H01L28/55 ,  H01L28/91 ,  H05K1/162 ,  H05K3/243 ,  H05K2201/0175 ,  H05K2201/0355 ,  H05K2201/0373 ,  H05K2203/0315

Abstract: Disclosed are three-dimensional dielectric structures on high surface area electrodes and fabrication methods. Exemplary structures comprise a copper foil substrate, trench electrodes or high surface area porous electrode structures formed on the substrate, a insulating thin film formed on the surface and laminating the foil on a organic substrate. A variety of materials may be used to make the films including perovksite ceramics such as barium titanate, strontium titanate, barium strontium titanate (BST), lead zirconate titanate (PZT); other intermediate dielectric constant films such as zinc oxide, aluminum nitride, silicon nitride; typical paraelectrics such as tantalum oxide, alumina, and titania. The films may be fabricated using sol-gel, hydrothermal synthesis, anodization or vapor deposition techniques.

Abstract translation: 公开了高表面电极上的三维电介质结构和制造方法。 示例性结构包括铜箔衬底，形成在衬底上的沟槽电极或高表面积多孔电极结构，在表面上形成的绝缘薄膜，并将箔层压在有机衬底上。 可以使用各种材料来制造包括钛酸钡，钛酸锶，钛酸锶钡（BST），锆钛酸铅（PZT）等周波陶瓷的膜。 其它中间介电常数膜如氧化锌，氮化铝，氮化硅; 典型的顺电介质如氧化钽，氧化铝和二氧化钛。 可以使用溶胶 - 凝胶，水热合成，阳极氧化或气相沉积技术来制造膜。

公开(公告)号：US08093508B2

公开(公告)日：2012-01-10

申请号：US12758908

申请日：2010-04-13

Applicant: Takashi Kariya ,  Akira Mochida

Inventor： Takashi Kariya ,  Akira Mochida

IPC: H05K1/16 ,  H05K1/11

CPC classification number: H01L21/6835 ,  H01L21/4857 ,  H01L2221/68345 ,  H01L2221/68363 ,  H01L2224/05001 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2924/0102 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3011 ,  H05K1/162 ,  H05K3/4602 ,  H05K2201/0175 ,  H05K2201/0355 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/09718 ,  H05K2203/0353 ,  Y10T29/435 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49128 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A printed wiring board including a first insulating layer, a second insulating layer formed over the first insulating layer, a capacitor portion including an upper electrode, a lower electrode and a ceramic high dielectric layer formed between the upper electrode and the lower electrode, the capacitor portion sandwiched by the first insulating layer and the second insulating layer, an upper electrode connecting portion passing through the capacitor portion without contact and through the second insulating layer and electrically connected to the upper electrode of the capacitor portion, and a lower electrode connecting portion passing through the second insulating layer and the upper electrode of the capacitor portion without contact and electrically connected to the lower electrode in contact.

Abstract translation: 一种印刷布线板，包括形成在第一绝缘层上的第一绝缘层，第二绝缘层，形成在上电极和下电极之间的上电极，下电极和陶瓷高介电层的电容器部分，电容器 夹在第一绝缘层和第二绝缘层之间的部分，通过电容器部分而没有接触并穿过第二绝缘层并电连接到电容器部分的上电极的上电极连接部分和通过电容器部分的下电极连接部分 通过第二绝缘层和电容器部分的上电极而不接触并与下电极接触地电连接。

公开(公告)号：US20110304018A1

公开(公告)日：2011-12-15

申请号：US13214773

申请日：2011-08-22

Applicant: Islam A. Salama ,  Yongki Min

Inventor： Islam A. Salama ,  Yongki Min

IPC: H01L29/40

CPC classification number: H05K1/162 ,  H01L23/49822 ,  H01L23/50 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H05K3/4602 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2203/1105

Abstract: Some embodiments of the invention include thin film capacitors formed on a package substrate of an integrated circuit package. At least one of the film capacitors includes a first electrode layer, a second electrode layer, and a dielectric layer between the first and second electrode layers. Each of the first and second electrode layers and the dielectric layer is formed individually and directly on the package substrate. Other embodiments are described and claimed.

Abstract translation: 本发明的一些实施例包括形成在集成电路封装的封装衬底上的薄膜电容器。 薄膜电容器中的至少一个包括在第一和第二电极层之间的第一电极层，第二电极层和电介质层。 第一和第二电极层和电介质层中的每一个单独形成并直接形成在封装衬底上。 描述和要求保护其他实施例。

公开(公告)号：US08039759B2

公开(公告)日：2011-10-18

申请号：US11808298

申请日：2007-06-08

Applicant: Jung Won Lee ,  Yul Kyo Chung ,  In Hyung Lee

Inventor： Jung Won Lee ,  Yul Kyo Chung ,  In Hyung Lee

IPC: H05K1/16

CPC classification number: H05K1/162 ,  H01G4/33 ,  H01G13/00 ,  H01L21/4857 ,  H01L23/50 ,  H01L2924/0002 ,  H05K2201/0108 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2203/016 ,  H05K2203/107 ,  Y10T29/43 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2924/00

Abstract: A method for manufacturing a printed circuit board with a capacitor embedded therein which has a dielectric film using laser lift off, and a capacitor manufactured thereby. In the method, a dielectric film is formed on a transparent substrate and heat-treated. A first conductive layer is formed on the heat-treated dielectric film. A laser beam is irradiated onto a stack formed, from below the transparent substrate, to separate the transparent substrate from the stack. After the transparent substrate is separated from the stack, a second conductive layer is formed with a predetermined pattern on the dielectric film. Also, an insulating layer and a third conductive layer are formed on the first and second conductive layers to alternate with each other in a predetermined number.

公开(公告)号：US20110127562A1

公开(公告)日：2011-06-02

申请号：US12787074

申请日：2010-05-25

Applicant: Chien-Min Sung ,  Ming Chi Kan ,  Shao Chung Hu

Inventor： Chien-Min Sung ,  Ming Chi Kan ,  Shao Chung Hu

IPC: H01L33/00 ,  H05K1/02 ,  H05K3/00

CPC classification number: H05K1/053 ,  H01L23/3735 ,  H01L2924/0002 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0195 ,  H05K2201/0323 ,  H05K2203/0315 ,  Y10T29/49124 ,  H01L2924/00

Abstract: Electrical substrates having low current leakage and high thermal conductivity, including associated methods, are provided. In one aspect for example, a multilayer substrate having improved thermal conductivity and dielectric properties can include a metal layer having a working surface with a local Ra of greater than about 0.1 micron, a dielectric layer coated on the working surface of the metal layer, and a thermally conductive insulating layer disposed on the dielectric layer, wherein the multilayer substrate has a minimum resistivity between the metal layer and the thermally conductive insulating layer across all of the working surface of at least 1×106 ohms.

Abstract translation: 提供了具有低电流泄漏和高导热性的电气基板，包括相关方法。 在一个方面，例如，具有改善的导热性和介电性能的多层基底可以包括具有局部Ra大于约0.1微米的工作表面的金属层，涂覆在金属层的工作表面上的电介质层，以及 布置在所述电介质层上的导热绝缘层，其中所述多层衬底在所述工作表面上的所述金属层和所述导热绝缘层之间具有至少为1×106欧姆的最小电阻率。

公开(公告)号：US07887879B2

公开(公告)日：2011-02-15

申请号：US12437672

申请日：2009-05-08

Applicant: Jun Hee Bae ,  Seung Hyun Kim ,  Yul Kyo Chung ,  Won Hoon Song ,  Sung Taek Lim ,  Hyun Ju Jin

Inventor： Jun Hee Bae ,  Seung Hyun Kim ,  Yul Kyo Chung ,  Won Hoon Song ,  Sung Taek Lim ,  Hyun Ju Jin

IPC: B05D3/12 ,  B05D1/40 ,  B05D5/12

CPC classification number: H01L21/02282 ,  H01G4/1218 ,  H01G4/33 ,  H01L21/02186 ,  H01L21/316 ,  H05K1/162 ,  H05K2201/0175 ,  H05K2201/0179

Abstract: Disclosed herein are a coating solution for the formation of a dielectric thin film and a method for the formation of a dielectric thin film using the coating solution. The coating solution comprises a titanium alkoxide, a β-diketone or its derivative, and a benzoic acid derivative having an electron donating group. The method comprises spin coating the coating solution on a substrate to form a thin film and drying the thin film at a low temperature to crystallize the thin film. The titanium-containing coating solution is highly stable. In addition, the coating solution enables formation of a thin film, regardless of the kind of substrates, and can be used to form dielectric thin films in an in-line mode in the production processes of PCBs.

公开(公告)号：US20110024738A1

公开(公告)日：2011-02-03

申请号：US12936736

申请日：2009-04-02

Applicant: Wolfgang Lohwasser ,  Michael Kiy ,  Matthias Reinhold ,  Christian Weber

Inventor： Wolfgang Lohwasser ,  Michael Kiy ,  Matthias Reinhold ,  Christian Weber

IPC: H01L51/50 ,  H05K1/09

CPC classification number: H01L51/0022 ,  H05K1/0393 ,  H05K3/12 ,  H05K3/388 ,  H05K2201/0175 ,  H05K2201/0329

Abstract: In a substrate with a hydrophilic surface and a structure made of a conductive and/or light-emitting organic polymer imprinted on the hydrophilic surface, the hydrophilic surface is formed from a layer arranged on the substrate of an oxide ceramic and/or metallic material.

Abstract translation: 在具有亲水表面的基底和由亲水表面上印刷的导电和/或发光有机聚合物制成的结构的亲水表面由设置在氧化物陶瓷和/或金属材料的基底上的层形成。

公开(公告)号：US20100323097A1

公开(公告)日：2010-12-23

申请号：US12868425

申请日：2010-08-25

Applicant: Tomohiko KATOH ,  Kenji Horino ,  Yuko Saya

Inventor： Tomohiko KATOH ,  Kenji Horino ,  Yuko Saya

IPC: B05D5/12

CPC classification number: H01G4/33 ,  H01G4/008 ,  H01L27/016 ,  H05K1/162 ,  H05K3/38 ,  H05K2201/0175 ,  H05K2201/0355 ,  H05K2201/2063 ,  H05K2203/1105 ,  Y10T29/49126 ,  Y10T29/49163 ,  Y10T29/49204 ,  Y10T29/49213

Abstract: A dielectric device has a first conductor and a dielectric disposed thereon. An intermediate region is formed between the first conductor and dielectric. In the intermediate region, an additive different from the first conductor and dielectric and the dielectric are mixed with each other. The additive contains at least one element of Si, Al, P, Mg, Mn, Y, V, Mo, Co, Nb, Fe, and Cr.

Abstract translation: 电介质器件具有设置在其上的第一导体和电介质。 在第一导体和电介质之间形成中间区域。 在中间区域中，与第一导体和电介质和电介质不同的添加剂彼此混合。 添加剂含有Si，Al，P，Mg，Mn，Y，V，Mo，Co，Nb，Fe和Cr中的至少一种元素。