公开(公告)号：US20050014348A1

公开(公告)日：2005-01-20

申请号：US10917681

申请日：2004-08-12

Applicant: Brad Rumsey ,  Matt Schwab

Inventor： Brad Rumsey ,  Matt Schwab

IPC: H01L23/544 ,  H05K1/02 ,  H05K3/00 ,  H05K3/34 ,  H01L21/44

CPC classification number: H01L24/49 ,  B33Y10/00 ,  B33Y80/00 ,  H01L23/544 ,  H01L24/45 ,  H01L24/48 ,  H01L2223/5442 ,  H01L2223/54473 ,  H01L2224/05553 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48463 ,  H01L2224/4847 ,  H01L2224/4911 ,  H01L2224/49175 ,  H01L2224/49433 ,  H01L2224/73215 ,  H01L2224/85207 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/3025 ,  H05K1/0266 ,  H05K3/0008 ,  H05K3/0052 ,  H05K3/3452 ,  H05K2201/0989 ,  H05K2201/09918 ,  Y10T29/49121 ,  Y10T29/4913 ,  Y10T29/49133 ,  Y10T29/49144 ,  Y10T29/49146 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49169 ,  Y10T29/49171 ,  Y10T29/49172 ,  Y10T29/49222 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: The present invention features a novel design for a fiducial and pin one indicator that utilizes a single solder resist opening in a die mounting substrate to perform the combined functions of prior art fiducials and pin one indicators. Methods of fabricating a carrier substrate and fabricating a semiconductor device package using the combination pin one indicator and alignment fiducial of the present invention are also provided.

公开(公告)号：US20050005996A1

公开(公告)日：2005-01-13

申请号：US10844619

申请日：2004-05-12

Applicant: Seigo Mizutani

Inventor： Seigo Mizutani

IPC: G02F1/13 ,  B05C5/00 ,  B05D5/12 ,  B41J2/01 ,  G09F9/00 ,  H01L21/288 ,  H01L51/40 ,  H01L51/50 ,  H05B33/10 ,  H05B33/14 ,  H05K1/02 ,  H05K3/00 ,  H05K3/12

CPC classification number: H05K3/0008 ,  H01L51/0004 ,  H05K1/0266 ,  H05K3/0097 ,  H05K3/125 ,  H05K2201/09918 ,  H05K2203/013

Abstract: A liquid droplet ejection apparatus which selectively ejects a function liquid from a nozzle array arranged in a function liquid droplet ejection head is made up of: a linear scale which is constituted by a mark array continuously marked on a workpiece; an encoder which is constituted by a linear sensor which faces the linear scale; and a drive control means which controls the driving of the function liquid from the nozzle arrays. The linear scale has a reference mark which shows the position of starting the detection of each of the imaging regions arranged in a perpendicular direction relative to the direction of detection of the linear sensor. The reference mark is marked in a mode which is different from a mode of the other marks.

Abstract translation: 从设置在功能液滴喷射头中的喷嘴阵列中选择性地喷射功能液体的液滴喷射装置由在工件上连续标记的标记阵列构成的线性刻度尺构成; 编码器，由面向线性刻度的线性传感器构成; 以及驱动控制装置，其控制来自喷嘴阵列的功能液体的驱动。 线性刻度具有参考标记，其示出了相对于线性传感器的检测方向在垂直方向上布置的每个成像区域的开始检测的位置。 参考标记以与其他标记的模式不同的模式标记。

公开(公告)号：US06807732B2

公开(公告)日：2004-10-26

申请号：US10202738

申请日：2002-07-24

Applicant: Albert An-Bon Yeh ,  Regina Nora Pabilonia ,  Thomas James Weaver ,  Arthur Fong

Inventor： Albert An-Bon Yeh ,  Regina Nora Pabilonia ,  Thomas James Weaver ,  Arthur Fong

IPC: H05K302

CPC classification number: H05K3/4638 ,  B23K26/351 ,  H05K1/0269 ,  H05K3/0008 ,  H05K3/0032 ,  H05K3/0047 ,  H05K3/027 ,  H05K3/225 ,  H05K2201/09918 ,  H05K2203/175 ,  Y10T29/49117 ,  Y10T29/49155 ,  Y10T29/49156

Abstract: Disclosed herein are methods for modifying an inner-layer circuit feature of a printed circuit board. A trimming point on the inner-layer circuit feature is identified using an x-ray inspection system. The coordinates of the trimming point are then related to the coordinates of a visible reference marker on the printed circuit board. Next, the relationship between the visible reference marker and the trimming point is used to position a cutting tool over the trimming point. Finally, the cutting tool is used to make one or more cuts into the printed circuit board, until the inner-layer circuit feature is acceptably modified at the trimming point.

公开(公告)号：US06760054B1

公开(公告)日：2004-07-06

申请号：US09708557

申请日：2000-11-09

Applicant: Takashi Okuyama

Inventor： Takashi Okuyama

IPC: B41J2435

CPC classification number: H05K3/0008 ,  H05K1/0269 ,  H05K2201/09918 ,  H05K2203/107

Abstract: A laser imaging apparatus includes a scanning unit that emits at least one scanning laser beam, which scans on a surface to be scanned in a main scanning direction to form a scanning section. A plurality of position marks formed on the surface are detected to determine the distortion of the surface to be scanned. A calculating system is provided to calculate an inclination of each scanning section with respect the main scanning direction, and a scaling factor of each scanning section with respect to a predetermined length in the main scanning direction based on the shape of the surface to be scanned. Then, when image is formed, the rotational position of the surface to be scanned is changed in accordance with the inclination, and a start position of each scanning section on the surface to be scanned is changed in accordance with the scaling factor.

Abstract translation: 激光成像装置包括扫描单元，其发射至少一个扫描激光束，扫描激光束在主扫描方向上扫描的表面上扫描以形成扫描部分。 检测形成在表面上的多个位置标记，以确定待扫描表面的变形。 提供一种计算系统，用于基于待扫描表面的形状来计算每个扫描部分相对于主扫描方向的倾斜度和每个扫描部分相对于主扫描方向上的预定长度的缩放因子。 然后，当形成图像时，根据倾斜度改变要扫描的表面的旋转位置，并且根据缩放因子改变要扫描的表面上的每个扫描部分的开始位置。

公开(公告)号：US20040118824A1

公开(公告)日：2004-06-24

申请号：US10389544

申请日：2003-03-14

Applicant: LASERVIA CORPORATION, an Oregon corporation

Inventor： Larry W. Burgess

IPC: B23K026/00

CPC classification number: B23K26/0626 ,  B23K26/066 ,  B23K26/082 ,  B23K26/0853 ,  B23K26/0876 ,  B23K26/282 ,  B23K26/389 ,  B23K26/40 ,  B23K2101/40 ,  B23K2103/50 ,  H05K1/0269 ,  H05K1/112 ,  H05K1/167 ,  H05K3/0008 ,  H05K3/0026 ,  H05K3/0035 ,  H05K3/4638 ,  H05K3/4652 ,  H05K3/4679 ,  H05K2201/09518 ,  H05K2201/09845 ,  H05K2201/09918 ,  H05K2203/0165 ,  H05K2203/0554 ,  H05K2203/056 ,  H05K2203/081 ,  H05K2203/082 ,  H05K2203/1509 ,  H05K2203/1545 ,  H05K2203/1563 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165 ,  Y10T29/532 ,  Y10T29/53261

Abstract: A laser drilling system for drilling blind vias in printed circuit board panels, multichip modules and chipscale packages with top and bottom surfaces and which include multiple dielectric polymer and metal layers. The system includes a first laser module comprising a laser able to form at least one via per pulse through one or more polymer layers. The vias are circular or non-circular in shape. An articulated arm is adapted to move at a speed of about 200 inches per second and at an acceleration of about 5 g's or more. A beam delivery unit is attached to the articulated arm and a conveyor adapted to move panels at a constant speed. The first laser module positioned on a separate track from the conveyor moves at a faster rate than the conveyor to drill the top surface. A second laser module is positioned to move on another separate track from the conveyor movable at a faster rate so as to drill the bottom surface.

Abstract translation: 一种用于在印刷电路板面板，多芯片模块和具有顶表面和底表面的芯片尺寸封装中钻孔盲孔的激光钻孔系统，并且包括多个介电聚合物和金属层。 该系统包括第一激光器模块，其包括能够通过一个或多个聚合物层在每个脉冲上形成至少一个通孔的激光器。 通孔为圆形或非圆形。 铰接臂适于以每秒约200英寸的速度和约5g或更大的加速度移动。 梁传送单元附接到铰接臂和适于以恒定速度移动面板的传送器。 位于与输送机分离的轨道上的第一激光模块以比输送机更快的速度移动以钻顶表面。 第二激光模块被定位成在另一独立的轨道上移动，该输送机能够以更快的速度运动，以便钻下底面。

公开(公告)号：US20040037061A1

公开(公告)日：2004-02-26

申请号：US10224639

申请日：2002-08-21

Inventor： David Liu ,  Chengping Zhang ,  Michael T. Duignan

IPC: H05K001/11

CPC classification number: H05K3/4614 ,  H03H3/00 ,  H03H7/0115 ,  H03H7/06 ,  H03H7/1775 ,  H03H2001/0078 ,  H05K1/16 ,  H05K1/162 ,  H05K1/165 ,  H05K1/167 ,  H05K3/046 ,  H05K3/4069 ,  H05K3/4638 ,  H05K2201/0108 ,  H05K2201/09881 ,  H05K2201/09918 ,  H05K2201/10378 ,  H05K2203/0528 ,  H05K2203/107 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49131 ,  Y10T29/49165

Abstract: A method for manufacturing a modular electrical circuit includes the steps of pre-manufacturing a plurality of components having fine features such as resistors, capacitors, inductances, and conductors formed on a dielectric substrate. The pre-manufactured components are laminated each to the other in a predetermined order. Each pre-manufactured component includes one or more electrical elements of the same type coupled each to the other by conducting lines. Each dielectric substrate includes through vias filled with the conductive material which serve for cross-coupling of the elements of neighboring components. Position of the passive elements, as well as conductive lines and through vias, are pre-designed to allow precise coordination between the elements of different components in the multi-layered modular electrical circuit.

Abstract translation: 一种用于制造模块化电路的方法包括以下步骤：预先制造具有精细特征的部件，例如电阻器，电容器，电感和形成在电介质基片上的导体。 预先制造的部件按预定的顺序彼此分层。 每个预制的部件包括一个或多个相同类型的电气元件，每个通过导线彼此连接。 每个电介质基片包括填充有导电材料的通孔，其用于交叉耦合相邻元件的元件。 无源元件以及导线和通孔的位置被预先设计成允许多层模块化电路中的不同元件的元件之间的精确协调。

公开(公告)号：US06631558B2

公开(公告)日：2003-10-14

申请号：US09823217

申请日：2001-03-30

Applicant: Larry W. Burgess

Inventor： Larry W. Burgess

IPC: H01K310

CPC classification number: H05K3/4679 ,  B23K26/066 ,  B23K26/0853 ,  B23K26/282 ,  B23K26/389 ,  H05K1/0269 ,  H05K1/112 ,  H05K1/167 ,  H05K3/0008 ,  H05K3/0035 ,  H05K3/4638 ,  H05K3/4652 ,  H05K2201/09518 ,  H05K2201/09918 ,  H05K2203/0165 ,  H05K2203/0554 ,  H05K2203/056 ,  H05K2203/081 ,  H05K2203/082 ,  Y10T29/49156 ,  Y10T29/49165

Abstract: A method for laser drilling blind vias at multiple depths in a multilayer panel comprising forming a panel having a plurality of conductive layers and a plurality of dielectric layers interposed therebetween, a first relief in the first conductive layer, a second relief in a second conductive layer, and a blind pin in the third conductive layer, the first and second reliefs and blind pin being aligned. The panel is irradiated, laser energy passing through the first and second reliefs to remove material from the first and second dielectric layers and then plated, thereby forming a blind via from the first to third conductive layers through the second conductive layer. A printed circuit board has two conductive layers by a dielectric layer, and a blind via electrically interconnecting the first and third conductive layers through the first and second dielectric layers and second conductive layer. The blind via can be round or oblong. Blind vias can be daisy-chained and/or buried under successive dielectric and conductive layers for additional level interconnects.

Abstract translation: 一种用于在多层板中的多个深度处激光钻孔盲孔的方法，包括形成具有多个导电层和介于其间的多个介电层的面板，所述第一导电层中的第一凸起，第二导电层中的第二凸起 以及在第三导电层中的盲引脚，第一和第二浮雕和盲引脚对准。 照射面板，激光能量通过第一和第二凸起以从第一和第二电介质层去除材料，然后镀覆，由此通过第二导电层从第一至第三导电层形成盲通孔。 印刷电路板具有通过电介质层的两个导电层，以及通过第一和第二电介质层和第二导电层将第一和第三导电层电连接的盲孔。 盲孔可以是圆形或长圆形。 盲孔可以被菊花链连接和/或埋在连续的电介质层和导电层中，用于额外的电平互连。

公开(公告)号：US06619786B2

公开(公告)日：2003-09-16

申请号：US09876909

申请日：2001-06-08

Applicant: Brian Lee Cobb ,  Jeffrey Louis Sangalli

Inventor： Brian Lee Cobb ,  Jeffrey Louis Sangalli

IPC: B41J214

CPC classification number: B41J2/1753 ,  B41J2/14072 ,  H05K1/0269 ,  H05K1/182 ,  H05K3/28 ,  H05K3/328 ,  H05K3/3494 ,  H05K3/361 ,  H05K2201/0394 ,  H05K2201/09918 ,  H05K2201/10681 ,  H05K2203/0195 ,  H05K2203/166 ,  Y10T29/49144 ,  Y10T29/49401

Abstract: An improved TAB circuit is provided for use with ink jet printer cartridges, which carries electrical signals to an array of nozzles on a heater chip. The TAB circuit eliminates bent or broken electrical circuit traces before being bonded to the heater chip by creating a chip window that partially overlaps the edges of the heater chip, and by bringing the electrical circuit traces to the chip window and terminating these circuit traces at a PI (polyimide) edge, which defines the inner perimeter of the chip window. The circuit traces thus are not unsupported at their ends before being assembled to the heater chip, and are automatically correctly positioned to make contact with bond pads of the heater chip when the overall TAB circuit is in correct registration therewith. The TAB circuit also provides an improved tolerance for a covercoat placement that will tend to prevent corrosive ink from coming into contact with these metal traces. The chip window of the TAB circuit also allows for a separate nozzle plate to be assembled to the heater chip.

公开(公告)号：US06609297B1

公开(公告)日：2003-08-26

申请号：US09581298

申请日：2000-06-12

Applicant: Yasuji Hiramatsu ,  Motoo Asai ,  Naohiro Hirose ,  Takashi Kariya

Inventor： Yasuji Hiramatsu ,  Motoo Asai ,  Naohiro Hirose ,  Takashi Kariya

IPC: H01K310

CPC classification number: H05K3/4679 ,  H05K1/0269 ,  H05K3/0008 ,  H05K3/0035 ,  H05K3/0082 ,  H05K3/421 ,  H05K3/4652 ,  H05K3/4655 ,  H05K2201/09781 ,  H05K2201/09918 ,  H05K2203/0554 ,  Y10S430/146 ,  Y10T29/49004 ,  Y10T29/49082 ,  Y10T29/49085 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

Abstract: A board 20 is provided with a Cu film 30 as a conformal mask, in which are formed a register mark 30b and an opening 3a through which a via hole is formed. A camera senses this register mark 30b so that the position of the board 30 is determined. A laser beam is directed to the approximate position of the opening 30a, so that the opening 26a through which the via hole is drilled is formed. The accuracy of the position of the opening of the via hole depends on the accuracy of the position of the opening 30a in the Cu film 30 as the conformal mask. Therefore, the via hole can be formed at an adequate position despite the low accuracy of the position for laser irradiation.

Abstract translation: 板20设置有作为保形掩模的Cu膜30，其中形成有对准标记30b和形成通孔的开口3a。 摄像机感测该对准标记30b，从而确定板30的位置。 激光束被引导到开口30a的近似位置，从而形成通孔穿过的开口26a。 通孔的开口的位置的精度取决于作为保形掩模的Cu膜30中的开口30a的位置的精度。 因此，尽管激光照射位置的精度低，但是通孔可以形成在适当的位置。

公开(公告)号：US06580491B2

公开(公告)日：2003-06-17

申请号：US09749044

申请日：2000-12-26

Applicant: Richard Ronald Hall ,  Robert Lee Lewis ,  How Tzu Lin ,  Peter Michael Nichols ,  Robert David Sebesta

Inventor： Richard Ronald Hall ,  Robert Lee Lewis ,  How Tzu Lin ,  Peter Michael Nichols ,  Robert David Sebesta

IPC: G03B2768

CPC classification number: G03F7/70466 ,  G03F7/70258 ,  G03F9/00 ,  H05K1/0269 ,  H05K3/0008 ,  H05K3/0082 ,  H05K2201/09918

Abstract: Apparatus and method for compensating for distortion of the substrate of a printed circuit workpiece that involves performing two tasks. First, a mask that carries functional circuit features and alignment features is positioned rotatably so that the mask alignment features, when projected onto a table that holds the printed circuit workpiece, will be on a line extending parallel to one of two orthogonal axes of the table. Second, the spacing of alignment features on the printed circuit workpiece is determined and this determination is a measure of the distortion of the printed circuit workpiece substrate. A lens through which the mask image is projected is moved to adjust the magnification of the image in accordance with the measured distortion of the substrate of the printed circuit workpiece.