公开(公告)号：US08872312B2

公开(公告)日：2014-10-28

申请号：US13250697

申请日：2011-09-30

Applicant: Chuei-Tang Wang ,  Der-Chyang Yeh

Inventor： Chuei-Tang Wang ,  Der-Chyang Yeh

IPC: H01L23/552 ,  H01L29/04 ,  H01L29/82 ,  H01L23/48 ,  H01L23/02 ,  H01L21/00 ,  H01L21/56 ,  H01L23/31 ,  H01L25/065 ,  H05K3/28 ,  H01L23/00

CPC classification number: H01L23/552 ,  H01L21/565 ,  H01L21/76802 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/3128 ,  H01L24/16 ,  H01L24/64 ,  H01L25/0655 ,  H01L25/16 ,  H01L25/50 ,  H01L2224/02317 ,  H01L2224/02372 ,  H01L2224/02373 ,  H01L2224/0401 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/81191 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K3/284 ,  H05K2201/0715 ,  H05K2201/09972 ,  H05K2201/10378 ,  H05K2203/1316 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/00

Abstract: An integrated circuit structure includes a substrate, a photosensitive molding on a first side of the substrate, a via formed in the molding, and a conformable metallic layer deposited over the first side of the substrate and in the via. A through via may be formed through the substrate aligned with the via in the molding with an electrically conductive liner deposited in the through via in electrical contact with the conformable metallic layer. The integrated circuit structure may further include a connector element such as a solder ball on an end of the through via on a second side of the substrate opposite the first side. The integrated circuit structure may further include a die on the first side of the substrate in electrical contact with another through via or with a redistribution layer.

Abstract translation: 集成电路结构包括基板，在基板的第一侧上的感光模制件，在模制件中形成的通孔，以及沉积在基板的第一侧和通孔中的一致的金属层。 可以通过在模制件中与通孔对准的基板形成贯通孔，其中导电衬垫沉积在贯通通孔中，以与适形金属层电接触。 集成电路结构还可以包括诸如焊球之间的连接器元件，该连接器元件在通孔的端部上，与第一侧相反的第二面上。 集成电路结构还可以包括在基板的第一侧上的与另一通孔或再分布层电接触的管芯。

公开(公告)号：US08872038B2

公开(公告)日：2014-10-28

申请号：US13393568

申请日：2010-08-25

Applicant: Yutaka Nakaone

Inventor： Yutaka Nakaone

IPC: H05K1/03 ,  H01L23/498 ,  H05K3/32 ,  H01R43/00

CPC classification number: H05K3/32 ,  H01L21/486 ,  H01L23/145 ,  H01L23/49827 ,  H01L23/49894 ,  H01L2924/0002 ,  H01R43/007 ,  H05K2201/0133 ,  H05K2201/083 ,  H05K2201/10378 ,  H05K2201/10962 ,  H05K2203/104 ,  H01L2924/00

Abstract: To provide a technique by which a material exhibiting high adhesiveness to objects to be fixed can be selected regardless of a material used for an insulating base in an anisotropic conductor having an adhesive section. An intermediate sheet which can be attached to the base is provided between the base and adhesive section. Since the intermediate sheet is provided in this manner, adhesive materials that exhibit high adhesive force to objects to be fixed can be used for the adhesive section without the consideration for adhesive force to the base. Furthermore, adhesive force which cannot be exhibited between the adhesive section and the base in the case of direct contact of the adhesive section with the base can be exhibited.

Abstract translation: 提供一种技术，通过该技术可以选择对具有粘合部分的各向异性导体中用于绝缘基底的材料的任何材料，可以选择对待固定物体具有高粘附性的材料。 可以在基部和粘合部之间设置可附接到基部的中间片。 由于以这种方式设置中间片，所以对于粘合部可以使用对固定物具有高粘合力的粘合剂材料，而不考虑对基底的粘合力。 此外，在粘合部与基部直接接触的情况下，可以显示在粘合部和基部之间不能发挥的粘合力。

公开(公告)号：US08870579B1

公开(公告)日：2014-10-28

申请号：US13350484

申请日：2012-01-13

Applicant: Roger E. Weiss ,  Clifford Read ,  Everett Simons

Inventor： Roger E. Weiss ,  Clifford Read ,  Everett Simons

IPC: H01R4/58

CPC classification number: H01R13/2414 ,  H01R12/52 ,  H05K3/32 ,  H05K2201/0133 ,  H05K2201/0314 ,  H05K2201/10378 ,  H05K2201/10962 ,  H05K2203/104 ,  Y10T428/31609

Abstract: An elastomeric material includes an elastomeric matrix having one or more outer surfaces and a set of electrically conductive pathways disposed through the elastomeric matrix. The elastomeric material also includes a thermally-conductive and electrically-insulative material, disposed through the elastomeric matrix, which improves the formation of the electrically conductive pathways.

Abstract translation: 弹性体材料包括具有一个或多个外表面的弹性体基体和穿过弹性体基体设置的一组导电通路。 弹性体材料还包括通过弹性体基体设置的导热和电绝缘材料，其改善导电通路的形成。

公开(公告)号：US20140312501A1

公开(公告)日：2014-10-23

申请号：US14282590

申请日：2014-05-20

Applicant: Rong-Chang Liang ,  Hsiao-Ken Chuang ,  Jerry Chung ,  Chin-Jen Tseng ,  Shuji Rokutanda ,  Yuhao Sun

Inventor： Rong-Chang Liang ,  Hsiao-Ken Chuang ,  Jerry Chung ,  Chin-Jen Tseng ,  Shuji Rokutanda ,  Yuhao Sun

IPC: H05K1/02 ,  H05K3/00 ,  H01L23/48

CPC classification number: H05K1/0296 ,  B32B3/08 ,  B32B3/30 ,  B32B7/06 ,  B32B7/12 ,  B32B27/08 ,  B32B27/16 ,  B32B27/28 ,  B32B27/30 ,  B32B27/32 ,  B32B27/34 ,  B32B27/36 ,  B32B27/38 ,  B32B27/40 ,  B32B2264/02 ,  B32B2264/10 ,  B32B2307/202 ,  B32B2307/706 ,  B32B2457/00 ,  B32B2457/08 ,  B32B2457/202 ,  H01B1/22 ,  H01L23/48 ,  H01L24/29 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/07811 ,  H01L2924/12042 ,  H05K3/00 ,  H05K3/323 ,  H05K2201/10378 ,  H05K2203/0113 ,  H05K2203/0338 ,  Y10T428/24289 ,  H01L2924/00

Abstract: Structures and manufacturing processes of an ACF array using a non-random array of microcavities of predetermined configuration, shape and dimension. The manufacturing process includes fluidic filling of conductive particles onto a substrate or carrier web comprising a predetermined array of microcavities, of selective metallization of the array followed by filling the array with a filler material and a second selective metallization on the filled microcavity array. The thus prepared filled conductive microcavity array is then over-coated or laminated with an adhesive film. Cavities in the array, and particles filling the cavities, can have a unimodal, bimodal, or multimodal distribution.

Abstract translation: 使用具有预定构型，形状和尺寸的微腔的非随机阵列的ACF阵列的结构和制造工艺。 该制造方法包括将导电颗粒流体填充到包含预定阵列的微腔的衬底或载体网上，阵列的选择性金属化，然后用填充材料填充阵列，并在填充的微腔阵列上进行第二选择性金属化。 然后将由此制备的填充的导电微腔阵列用粘合剂膜覆盖或层压。 阵列中的腔和填充腔的颗粒可以具有单峰，双峰或多峰分布。

公开(公告)号：US08853553B2

公开(公告)日：2014-10-07

申请号：US13548234

申请日：2012-07-13

Applicant: Mark A. Hinton ,  Minh V. Quach ,  Regee Petaja

Inventor： Mark A. Hinton ,  Minh V. Quach ,  Regee Petaja

IPC: H05K1/03

CPC classification number: H01L23/50 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L2224/16 ,  H01L2924/15311 ,  H05K1/0222 ,  H05K1/0228 ,  H05K1/0245 ,  H05K1/113 ,  H05K2201/09227 ,  H05K2201/09309 ,  H05K2201/10378 ,  H05K2201/10734

Abstract: A ball grid array (BGA) and via pattern includes a printed circuit board (PCB) having a surface on which a plurality of regions are formed and a transmit (TX) and receive (RX) cluster comprising a transmit differential signal pair and a receive differential signal pair formed using at least a portion of the plurality of regions on the surface of the PCB, the transmit differential signal pair and the receive differential signal pair comprising nodes arranged in a diagonal orientation in which each node of the receive differential signal pair is equidistant from each node of the transmit differential signal pair.

Abstract translation: 球栅阵列（BGA）和通孔图案包括具有其上形成有多个区域的表面的印刷电路板（PCB）和包括发射差分信号对和接收器的发射（TX）和接收（RX） 使用PCB表面上的多个区域的至少一部分形成的差分信号对，发射差分信号对和接收差分信号对，包括以对角方向布置的节点，其中接收差分信号对的每个节点为 与发射差分信号对的每个节点等距。

公开(公告)号：US20140254120A1

公开(公告)日：2014-09-11

申请号：US14282693

申请日：2014-05-20

Applicant: FUJIKURA LTD.

Inventor： Satoshi YAMAMOTO ,  Hiroyuki HIRANO ,  Takanao SUZUKI

IPC: H05K1/11 ,  H05K3/00

CPC classification number: H05K3/0094 ,  H01L21/486 ,  H01L23/473 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/13 ,  H01L24/16 ,  H01L25/0657 ,  H01L2224/13101 ,  H01L2224/16225 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2225/06589 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/1461 ,  H01L2924/15174 ,  H01L2924/15184 ,  H05K1/113 ,  H05K2201/09836 ,  H05K2201/10378 ,  H05K2201/10545 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/00

Abstract: Provided is a device packaging structure including: an interposer substrate including a substrate, and a plurality of through-hole interconnections formed inside a plurality of through-holes passing through the substrate from a first main surface toward a second main surface, the first main surface being one main surface of the substrate, the second main surface being the other main surface thereof; a first device which includes a plurality of electrodes and is arranged so that these electrodes face the first main surface; and a second device which includes a plurality of electrodes of which an arrangement is different from an arrangement of each of the electrodes of the first device, and is arranged so that these electrodes face the second main surface.

Abstract translation: 本发明提供一种器件封装结构，其特征在于，包括：内插基板，具有基板和形成在从第一主面朝向第二主面的贯穿基板的多个通孔内形成的多个通孔布线，所述第一主面 作为基板的一个主表面，第二主表面是其另一个主表面; 第一装置，其包括多个电极，并且被布置成使得这些电极面对第一主表面; 以及第二装置，其包括多个电极，其布置与第一装置的每个电极的布置不同，并且被布置成使得这些电极面对第二主表面。

公开(公告)号：US20140217075A1

公开(公告)日：2014-08-07

申请号：US14251883

申请日：2014-04-14

Applicant: ASAHI GLASS COMPANY, LIMITED

Inventor： Shintaro TAKAHASHI ,  Satoshi MORI

IPC: B44C1/22

CPC classification number: B44C1/228 ,  B23K26/382 ,  B23K26/40 ,  B23K2103/50 ,  B26D7/1845 ,  B26F1/28 ,  H01L21/486 ,  H05K3/0017 ,  H05K3/0029 ,  H05K2201/10378 ,  H05K2203/107

Abstract: A method including (a) preparing an insulating substrate, and (b) forming n (n is an integer equal to or greater than 9) through holes on the insulating substrate in a through hole density in a range of 1000 pieces/cm2 to 20000 pieces/cm2 at a pitch P (μm) in a range of 20 μm to 300 μm, wherein (b) is performed on a front surface of the insulating substrate and includes (b1) forming a first through hole at a first target position, (b2) forming a second through hole at a second target position, wherein a distance between the first target position and the second target position is greater than the pitch P (μm) . . . , and (bn) forming an n-th final through hole at an n-th target position, wherein a distance between the (n−1) target position and the n-th target position is greater than the pitch P (μm).

Abstract translation: 一种方法，包括（a）制备绝缘基板，以及（b）通过绝缘基板上的通孔密度在1000个/ cm 2至20000的范围内形成n（n是等于或大于9的整数） 以（μm）的间距P（μm）为20μm〜300μm的片/ cm 2，（b）在绝缘性基板的正面进行，（b1）在第一目标位置形成第一通孔， （b2）在第二目标位置形成第二通孔，其中，所述第一目标位置与所述第二目标位置之间的距离大于所述间距P（μm）。 。 。 ，并且（bn）在第n个目标位置形成第n个最终通孔，其中（n-1）目标位置和第n个目标位置之间的距离大于间距P（μm）。

公开(公告)号：US20140206184A1

公开(公告)日：2014-07-24

申请号：US14221486

申请日：2014-03-21

Applicant: TESSERA, INC.

Inventor： Belgacem Haba ,  Ilyas Mohammed

IPC: H01L21/48

CPC classification number: H01L21/486 ,  H01L23/49827 ,  H01L23/49861 ,  H01L23/49894 ,  H01L2224/16225 ,  H01L2924/09701 ,  H01L2924/15311 ,  H05K3/4046 ,  H05K2201/0979 ,  H05K2201/10378 ,  H05K2201/10674

Abstract: A method for making an interconnection component is disclosed, including forming a plurality of metal posts extending away from a reference surface. Each post is formed having a pair of opposed end surface and an edge surface extending therebetween. A dielectric layer is formed contacting the edge surfaces and filling spaces between adjacent ones of the posts. The dielectric layer has first and second opposed surfaces adjacent the first and second end surfaces. The dielectric layer has a coefficient of thermal expansion of less than 8 ppm/° C. The interconnection component is completed such that it has no interconnects between the first and second end surfaces of the posts that extend in a lateral direction. First and second pluralities of wettable contacts are adjacent the first and second opposed surfaces. The wettable contacts are usable to bond the interconnection component to a microelectronic element or a circuit panel.

Abstract translation: 公开了一种用于制造互连部件的方法，包括形成远离参考表面延伸的多个金属柱。 每个柱形成具有一对相对的端面和在它们之间延伸的边缘表面。 形成接触边缘表面和相邻柱之间的填充空间的电介质层。 电介质层具有邻近第一和第二端面的第一和第二相对表面。 电介质层的热膨胀系数小于8ppm /℃。互连部件完成，使得它们在横向方向上延伸的柱的第一和第二端面之间没有互连。 第一和第二多个可湿接触部分邻近第一和第二相对表面。 可湿接触可用于将互连部件连接到微电子元件或电路板。

公开(公告)号：US08735737B2

公开(公告)日：2014-05-27

申请号：US12782861

申请日：2010-05-19

Applicant: Yoshihiro Ihara ,  Takehito Terasawa ,  Masakuni Kitajima

Inventor： Yoshihiro Ihara ,  Takehito Terasawa ,  Masakuni Kitajima

IPC: H05K1/11 ,  H01R12/57

CPC classification number: H01R12/57 ,  H01L2924/0002 ,  H01R13/2435 ,  H05K3/325 ,  H05K3/3421 ,  H05K2201/0311 ,  H05K2201/10378 ,  H05K2201/10719 ,  H05K2201/10946 ,  H01L2924/00

Abstract: A substrate includes a substrate base, first contact parts arranged in a pattern on a surface of the substrate base, and leads respectively having a generally U-shape with a flexible part, a first end fixed to a corresponding one of the first contact parts, and a second end that is located a predetermined distance away from the first end relative to the surface of the substrate base. The first and second ends of each of the leads are substantially aligned in a direction perpendicular to the surface of the substrate base in a state where the second end of each lead is pushed by a target object and deformed thereby in order to electrically connect the substrate to the target object.

Abstract translation: 基板包括：基板，在基板基板的表面上以图案排列的第一接触部分，以及分别具有柔性部分的大致U形的引线，固定到相应的一个第一接触部分的第一端， 以及第二端，其相对于所述基板基板的表面距离所述第一端部预定距离。 每个引线的第一和第二端在垂直于基板的表面的方向上基本上对准，在这种状态下，每个引线的第二端被目标物体推动并且由此变形从而将基板电连接 到目标对象。

公开(公告)号：US08730673B2

公开(公告)日：2014-05-20

申请号：US13354531

申请日：2012-01-20

Applicant: David L. Vos

Inventor： David L. Vos

IPC: H05K7/20 ,  H01L23/34

CPC classification number: H05K7/20 ,  H01L23/427 ,  H01L23/473 ,  H01L2924/0002 ,  H05K1/0272 ,  H05K3/0061 ,  H05K2201/064 ,  H05K2201/10378 ,  H01L2924/00

Abstract: A self-contained fluid-cooled electro-optical plug in type module capable of being exchangeably mounted in an external chassis incorporates electronic or electro-optical devices mounted on one or more interposers which provide electrical power and electric and optical signal connections to the devices and are also provided with fluid conduits through which a cooling fluid is circulated in a closed-loop cooling path to a heat exchanger for transferring the heat generated in the devices to external heat disposal equipment in the mounting chassis.

Abstract translation: 能够可交换地安装在外部机架中的独立的流体冷却的电光插头型模块包括安装在一个或多个内插器上的电子或电光器件，其提供电力和与设备的电和光信号连接， 还设置有流体管道，冷却流体通过该流体管道在闭环冷却路径中循环到热交换器，用于将装置中产生的热量转移到安装底盘中的外部热处理设备。