公开(公告)号：US20040198231A1

公开(公告)日：2004-10-07

申请号：US10827004

申请日：2004-04-19

Applicant: HARRIS CORPORATION

Inventor： Charles M. Newton ,  Raymond C. Rumpf ,  Carol Gamlen

IPC: H01L021/00 ,  H04B001/06

CPC classification number: B81C1/0015 ,  B81B2201/0271 ,  B81C2201/0109 ,  H01H59/0009 ,  H01P1/127 ,  H05K1/092 ,  H05K3/02 ,  Y10T29/49117 ,  Y10T428/24926 ,  Y10T428/2495

Abstract: A microelectromechanical structure and method is disclosed. A ceramic substrate preferably is formed from low temperature co-fired ceramic sheets. A low loss photodefinable dielectric planarizing layer is formed over one surface of the ceramic substrate. This layer can e a sacrificial layer or a subsequent sacrificial layer added. A photodefined conductor is printed over the low loss dielectric planarizing layer and formed with the sacrificial layer into a structural circuit component. In one aspect of the invention, a switch is formed with a biasing actuator and deflectable member formed over the biasing actuator and moveable into open and closed circuit positions.

Abstract translation: 公开了一种微机电结构和方法。 陶瓷基板优选由低温共烧陶瓷片形成。 在陶瓷基板的一个表面上形成低损耗可光限定介电平面化层。 该层可以添加牺牲层或随后的牺牲层。 在低损耗介电平面化层上印刷光致定导体，并将牺牲层形成为结构电路部件。 在本发明的一个方面，开关形成有偏置致动器和可偏转构件，该偏置致动器和偏转构件形成在偏置致动器上方并且可移动到打开和闭合的位置。

公开(公告)号：US20040161909A1

公开(公告)日：2004-08-19

申请号：US10723998

申请日：2003-11-26

Inventor： Andreas Meckes ,  Horst Theuss ,  Michael Weber

IPC: H01L021/301

CPC classification number: B81C1/00301 ,  B81B2203/0315 ,  B81B2207/092 ,  B81C2201/0109 ,  B81C2203/0136 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/11 ,  H01L2924/00014 ,  H01L2924/16235 ,  H01L2224/05599

Abstract: An electronic component includes a semiconductor die which exhibits on its active top side above an active surface area a self-supporting electrically conductive cover layer which is supported by through lines and forms a hollow space to the active surface area. A method for producing the electronic component includes additional features.

Abstract translation: 电子部件包括半导体管芯，其半导体管芯的有源顶侧在有源表面区域的上方具有自支撑导电性覆盖层，该覆盖层由贯通的管线支撑并形成到有源表面区域的中空空间。 电子元件的制造方法具有附加特征。

公开(公告)号：US20040119125A1

公开(公告)日：2004-06-24

申请号：US10328923

申请日：2002-12-23

Applicant: Motorola Inc.

Inventor： Bishnu Gogoi ,  Raymond M. Roop

IPC: H01L021/76 ,  H01L021/36

CPC classification number: B81C1/00476 ,  B81B2201/025 ,  B81B2203/0307 ,  B81C2201/0109 ,  Y10S438/977

Abstract: A method for creating a MEMS structure is provided. In accordance with the method, an article is provided which comprises a substrate (101) and a single crystal semiconductor layer (105), and having a sacrificial layer (103) comprising a first dielectric material which is disposed between the substrate and the semiconductor layer. An opening (107) is created which extends through the semiconductor layer (105) and the sacrificial layer (103) and which exposes a portion of the substrate (101). An anchor portion (109) comprising a second dielectric material is then formed in the opening (107). Next, the semiconductor layer (105) is epitaxially grown to a suitable device thickness, thereby forming a device layer (111).

Abstract translation: 提供了一种用于产生MEMS结构的方法。 根据该方法，提供一种包括基板（101）和单晶半导体层（105）的制品，并且具有包括设置在基板和半导体层之间的第一介电材料的牺牲层（103） 。 产生一个开口（107），其延伸穿过半导体层（105）和牺牲层（103），并露出基底（101）的一部分。 然后在开口（107）中形成包括第二电介质材料的锚定部分（109）。 接下来，将半导体层（105）外延生长至合适的器件厚度，从而形成器件层（111）。

公开(公告)号：US06747338B1

公开(公告)日：2004-06-08

申请号：US10306639

申请日：2002-11-27

Applicant: Thomas K. Nunan ,  David E. Grosjean ,  Denis M. O'Kane ,  James S. Sellars

Inventor： Thomas K. Nunan ,  David E. Grosjean ,  Denis M. O'Kane ,  James S. Sellars

IPC: H01L2358

CPC classification number: B81C1/00595 ,  B81C1/00698 ,  B81C2201/0109 ,  B81C2201/0142 ,  B81C2201/016 ,  B81C2201/019

Abstract: A method of manufacturing MEMS structures and devices that allows the fabrication of dielectric structures with improved etch selectivity and good electrical leakage characteristics. The dielectric structure includes a composite stack of silicon nitride sub-layers with a silicon-rich nitride sub-layer and a stoichiometric silicon nitride sub-layer at opposite ends of the stack. Alternatively, the dielectric structure includes a single silicon nitride layer providing a graded change in silicon content through the dielectric layer, from silicon-rich nitride to stoichiometric silicon nitride.

Abstract translation: 制造MEMS结构和器件的方法，其允许制造具有改进的蚀刻选择性和良好漏电特性的电介质结构。 电介质结构包括在堆叠的相对端处具有富硅氮化物子层和化学计量氮化硅子层的氮化硅子层的复合叠层。 或者，电介质结构包括单个氮化硅层，其通过介电层提供硅含量的梯度变化，从富含硅的氮化物到化学计量的氮化硅。

公开(公告)号：US06743654B2

公开(公告)日：2004-06-01

申请号：US10014880

申请日：2001-12-11

Applicant: Salvatore Coffa ,  Luigi Occhipinti

Inventor： Salvatore Coffa ,  Luigi Occhipinti

IPC: H01L2100

CPC classification number: B81C1/00182 ,  B81B2201/0257 ,  B81B2201/0264 ,  B81B2203/0127 ,  B81C2201/0109 ,  B81C2201/0115 ,  G01L9/0042

Abstract: A method of making a monolithically integrated pressure sensor includes making a cavity in the semiconductor substrate. This may be formed by plasma etching the front side or the back side of the silicon wafer to cut a plurality of trenches or holes deep enough to extend for at least part of its thickness into a doped buried layer of opposite type of conductivity of the substrate and of the epitaxial layer grown over it. The method may also include electrochemically etching through such trenches, and the silicon of the buried layer with an electrolytic solution suitable for selectively etching the doped silicon of the opposite type of conductivity, thereby making the silicon of the buried layer porous. The method may also include oxidizing and leaching away the silicon so made porous.

Abstract translation: 制造单片集成压力传感器的方法包括在半导体衬底中形成空腔。 这可以通过等离子体蚀刻硅晶片的前侧或背面来形成，以切割多个深度足以将其厚度的至少一部分延伸到衬底的相反导电性的掺杂掩埋层中的沟槽或孔 以及在其上生长的外延层。 该方法还可以包括通过这样的沟槽进行电化学蚀刻，以及使用适合于选择性地蚀刻具有相反导电性的掺杂硅的电解液的掩埋层的硅，从而使掩埋层的硅多孔化。 该方法还可以包括氧化和浸出如此制成的多孔的硅。

公开(公告)号：US20040099928A1

公开(公告)日：2004-05-27

申请号：US10306639

申请日：2002-11-27

Inventor： Thomas K. Nunan ,  David E. Grosjean ,  Denis M. O'Kane ,  James S. Sellars

IPC: H01L021/76

CPC classification number: B81C1/00595 ,  B81C1/00698 ,  B81C2201/0109 ,  B81C2201/0142 ,  B81C2201/016 ,  B81C2201/019

Abstract: A method of manufacturing MEMS structures and devices that allows the fabrication of dielectric structures with improved etch selectivity and good electrical leakage characteristics. The dielectric structure includes a composite stack of silicon nitride sub-layers with a silicon-rich nitride sub-layer and a stoichiometric silicon nitride sub-layer at opposite ends of the stack. Alternatively, the dielectric structure includes a single silicon nitride layer providing a graded change in silicon content through the dielectric layer, from silicon-rich nitride to stoichiometric silicon nitride.

Abstract translation: 制造MEMS结构和器件的方法，其允许制造具有改进的蚀刻选择性和良好漏电特性的电介质结构。 电介质结构包括在堆叠的相对端处具有富硅氮化物子层和化学计量氮化硅子层的氮化硅子层的复合叠层。 或者，电介质结构包括单个氮化硅层，其通过介电层提供硅含量的梯度变化，从富含硅的氮化物到化学计量的氮化硅。

公开(公告)号：US20040077119A1

公开(公告)日：2004-04-22

申请号：US10468757

申请日：2003-08-25

Inventor： Koichi Ikeda ,  Takashi Kinoshita

IPC: H01L021/00

CPC classification number: B81C1/00611 ,  B81B2201/042 ,  B81B2203/0118 ,  B81C2201/0109 ,  B81C2201/0119 ,  B81C2201/0125

Abstract: The present invention provides manufacturing methods of electrostatic type MEME devices, in which planarizing the surface of a driving side electrode, reducing fluctuations in the shape of a beam, improving the performance and the uniformity are aimed at. A manufacturing method according to the present invention includes the steps of: forming a substrate side electrode on a substrate, forming a fluid film before or after forming a sacrificial layer, further forming a beam having a driving side electrode on a planarized surface of the fluid film, and finally, removing the sacrificial layer.

Abstract translation: 本发明提供了静电型MEME器件的制造方法，其中平面化驱动侧电极的表面，减小了光束形状的波动，提高了性能和均匀性。 根据本发明的制造方法包括以下步骤：在基板上形成基板侧电极，在形成牺牲层之前或之后形成流体膜，在流体的平坦化表面上进一步形成具有驱动侧电极的光束 电影，最后，去除牺牲层。

公开(公告)号：US20030152872A1

公开(公告)日：2003-08-14

申请号：US10074562

申请日：2002-02-12

Inventor： Mark W. Miles

IPC: G03F007/00

CPC classification number: G02B26/001 ,  B81B2201/042 ,  B81B2203/0315 ,  B81C1/00396 ,  B81C2201/0109 ,  B81C2203/0136

Abstract: The invention provides a microfabrication process which may be used to manufacture a MEMS device. The process comprises depositing one or a stack of layers on a base layer, said one layer or an uppermost layer in said stack of layers being a sacrificial layer; patterning said one or a stack of layers to provide at least one aperture therethrough through which said base layer is exposed; depositing a photosensitive layer over said one or a stack of layers; and passing light through said at least one aperture to expose said photosensitive layer.

Abstract translation: 本发明提供了可用于制造MEMS装置的微细加工方法。 该方法包括在基底层上沉积一层或一叠层，所述层中的所述一层或最上层为牺牲层; 图案化所述一层或一叠层以提供穿过其中的所述基层暴露的至少一个孔; 在所述一层或一叠层上沉积感光层; 并使光通过所述至少一个孔以暴露所述感光层。

公开(公告)号：US20030122205A1

公开(公告)日：2003-07-03

申请号：US10320679

申请日：2002-12-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Eun-sung Lee ,  Moon-chul Lee ,  Hyun-ok Kim

IPC: H01L027/14

CPC classification number: B81B3/0078 ,  B81B2203/0307 ,  B81C2201/0109

Abstract: A fabrication method for a MEMS structure, the MEMS structure including a fixing portion fixed to the substrate and a floating portion floating above the substrate. A sacrificial layer deposited on the substrate is patterned to have a groove forming a space surrounding the area corresponding to the area in which the fixing portion is to be formed. If the MEMS structure is deposited on the sacrificial layer, a sidewall is formed inside the space and the fixing portion and the floating portion are formed on the sacrificial layer. If the sacrificial layer is removed using an etchant, the sacrificial layer at the bottom of the fixing portion is protected from the etchant by the sidewall and accordingly, the sacrificial layer except the area surrounded by the sidewall is removed. Therefore, only the sacrificial layer under the floating portion is removed. Because the connecting portion is fabricated to have the same thickness as the fixing portion and the floating portion, a strong/durable MEMS structure is provided. Additionally, the boundary between the fixing portion and the floating portion can be precisely determined, and adjustment of the length of the floating portion can be precisely controlled.

Abstract translation: 一种用于MEMS结构的制造方法，所述MEMS结构包括固定到所述基板的固定部分和浮置在所述基板上方的浮动部分。 沉积在基板上的牺牲层被图案化以具有形成围绕与要形成固定部分的区域相对应的区域的空间的凹槽。 如果MEMS结构沉积在牺牲层上，则在空间内形成侧壁，并且在牺牲层上形成固定部分和浮动部分。 如果使用蚀刻剂去除牺牲层，则固定部分底部的牺牲层被侧壁保护而不受蚀刻剂的影响，因此除去由侧壁包围的区域之外的牺牲层。 因此，只有在浮动部分下面的牺牲层被去除。 由于连接部分被制造成具有与固定部分和浮动部分相同的厚度，所以提供了强/耐久的MEMS结构。 此外，可以精确地确定固定部分和浮动部分之间的边界，并且可以精确地控制浮动部分的长度的调节。

公开(公告)号：US20030006468A1

公开(公告)日：2003-01-09

申请号：US09894334

申请日：2001-06-27

Inventor： Qing Ma ,  Peng Cheng

IPC: H01L021/00 ,  H01L029/82

CPC classification number: B81C1/00126 ,  B81C2201/0109 ,  H03H3/0072

Abstract: A method comprising over an area of a substrate, forming a plurality of three dimensional first structures; following forming the first structures, conformally introducing a sacrificial material over the area of the substrate; introducing a second structural material over the sacrificial material; and removing the sacrificial material. An apparatus comprising a first structure on a substrate; and a second structure on the substrate and separated from the first structure by an unfilled gap defined by the thickness of a removed film.

Abstract translation: 一种方法，包括在衬底的一个区域上，形成多个三维第一结构; 在形成第一结构之后，在衬底的区域上保形地引入牺牲材料; 在牺牲材料上引入第二结构材料; 并去除牺牲材料。 一种装置，包括在基板上的第一结构; 以及第二结构，并且通过由去除膜的厚度限定的未填充间隙与第一结构分离。