公开(公告)号：US20090033334A1

公开(公告)日：2009-02-05

申请号：US11881969

申请日：2007-07-30

Applicant: Che Seong Law ,  Kaneasan Edumban

Inventor： Che Seong Law ,  Kaneasan Edumban

IPC: G01R31/02

CPC classification number: H01R13/04 ,  G01R31/2818 ,  H05K1/0268 ,  H05K1/117 ,  H05K2201/09409 ,  H05K2201/10325

Abstract: An electronic structure (for example a reliability board or a cycling control module) has a body including a body portion insertable into a connector. A plurality of contact structures are provided on a side of the body portion, each contact structure comprising a first contact and a second contact spaced from the first contact, with the first and second contacts of each contact structure being aligned in the direction of insertion of the body portion into the connector. A corresponding second plurality of contact structures is provided on a side of the body portion opposite the first-mentioned side. These contacts connect with respective corresponding contacts of the connector.

Abstract translation: 电子结构（例如可靠性板或循环控制模块）具有主体，该主体包括可插入到连接器中的主体部分。 多个接触结构设置在主体部分的一侧上，每个接触结构包括第一触点和与第一触点间隔开的第二触点，每个触头结构的第一和第二触点沿插入方向对准 主体部分插入连接器。 相应的第二多个接触结构设置在与第一侧相对的主体部分的一侧上。 这些触点与连接器的相应的相应的触点相连。

公开(公告)号：US07402756B2

公开(公告)日：2008-07-22

申请号：US11402000

申请日：2006-04-12

Applicant: Hiroji Hoshino

Inventor： Hiroji Hoshino

IPC: H05K1/02 ,  H05K7/06

CPC classification number: H05K1/118 ,  H05K1/117 ,  H05K2201/09263 ,  H05K2201/09381 ,  H05K2201/09409 ,  H05K2201/09709 ,  H05K2201/09727 ,  H05K2203/1572

Abstract: A double-sided flexible circuit board with enhanced rigidity of terminals by using copper foil on an opposite side of the circuit board is provided. The flexible circuit board having wiring patterns P for connecting terminals on each of a front surface A and a back surface B of its periphery, includes: terminal patterns with linear-planar-shaped traces, the traces of which are equally spaced and disposed on the peripheries of each of the front surface and the back surface of the board; and backing patterns with planar-shaped traces, the traces of which are combined with the terminal patterns and bent so that the central portion of the backing pattern is offset from that of the terminal pattern, wherein the traces of the backing patterns are disposed on the corresponding opposite side of the traces of the terminal patterns on the board so as to be positioned overlapping with the traces of the terminal patterns.

Abstract translation: 提供了一种通过在电路板的相对侧使用铜箔来提高端子刚性的双面柔性电路板。 具有用于连接其周边的前表面A和后表面B的端子上的端子的布线图案P的柔性电路板包括：具有线性平面状迹线的端子图案，其迹线相等间隔设置在 板的前表面和后表面中的每一个的周边; 以及具有平面形轨迹的背衬图案，其轨迹与端子图案组合并弯曲，使得背衬图案的中心部分偏离端子图案的中心部分，其中背衬图案的迹线设置在 在板上的端子图案的迹线的对应的相对侧，以便与端子图案的迹线重叠。

公开(公告)号：US20070265665A1

公开(公告)日：2007-11-15

申请号：US11821328

申请日：2007-06-21

Applicant: Robert Greenberg ,  Neil Talbot ,  Jordan Neysmith ,  James Little ,  Brian Mech

Inventor： Robert Greenberg ,  Neil Talbot ,  Jordan Neysmith ,  James Little ,  Brian Mech

IPC: A61N1/18

CPC classification number: A61N1/0543 ,  A61N1/36046 ,  H05K1/036 ,  H05K1/0393 ,  H05K1/118 ,  H05K3/0014 ,  H05K2201/05 ,  H05K2201/053 ,  H05K2201/09063 ,  H05K2201/09409 ,  Y10T29/49002 ,  Y10T29/49117 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49158 ,  Y10T29/49174 ,  Y10T29/49176

Abstract: The present invention provides a flexible circuit electrode array adapted for neural stimulation, comprising: a polymer base layer; metal traces deposited on said polymer base layer, including electrodes suitable to stimulate neural tissue; a polymer top layer deposited on said polymer base layer and said metal traces at least one tack opening; wherein said polymer base layer, said metal traces and said polymer top layer are thermoformed in a three dimensional shape. The present invention provides further a method of making a flexible circuit electrode array comprising depositing a polymer base layer; depositing metal on said polymer base layer; patterning said metal to form metal traces; depositing a polymer top layer on said polymer base layer and said metal traces; preparing at least one tack opening; and heating said flexible circuit electrode array in a mold to form a three dimensional shape in said flexible circuit electrode array.

Abstract translation: 本发明提供一种适用于神经刺激的柔性电路电极阵列，包括：聚合物基层; 沉积在所述聚合物基层上的金属痕迹，包括适于刺激神经组织的电极; 沉积在所述聚合物基层上的聚合物顶层和所述金属迹线至少一个粘性开口; 其中所述聚合物基层，所述金属迹线和所述聚合物顶层被热成型为三维形状。 本发明还提供一种制造柔性电路电极阵列的方法，包括沉积聚合物基层; 在所述聚合物基层上沉积金属; 图案化所述金属以形成金属痕迹; 在所述聚合物基底层和所述金属迹线上沉积聚合物顶层; 准备至少一个开口; 并将所述柔性电路电极阵列加热到模具中，以在所述柔性电路电极阵列中形成三维形状。

公开(公告)号：US20070091704A1

公开(公告)日：2007-04-26

申请号：US11437846

申请日：2006-05-19

Applicant: Siva RaghuRam ,  Josef Schuster ,  Simon Muff ,  Abdallah Bacha

Inventor： Siva RaghuRam ,  Josef Schuster ,  Simon Muff ,  Abdallah Bacha

IPC: G11C7/00

CPC classification number: H05K1/181 ,  G11C5/04 ,  G11C5/063 ,  H05K2201/09409 ,  H05K2201/09418 ,  Y02P70/611

Abstract: In a first embodiment, the invention provides a memory module having an electronic printed circuit board and a plurality of semiconductor chips of the same type that are mounted on at least one outer face of the printed circuit board. The printed circuit board has a connector strip, which runs at a first edge of the at least one outer face in a first direction and has a multiplicity of electrical contacts that are lined up in the first direction. The printed circuit board extends in the first direction between two opposite second edges. At least nine of the semiconductor chips of the same type are respectively mounted next to one another on the outer face of the printed circuit board between the center of the printed circuit board and the respective second edge of the printed circuit board. The semiconductor chips of the same type respectively have a smaller dimension and, in the direction perpendicular to the smaller dimension, a larger dimension that is larger than the smaller dimension. A respective first group of four of the semiconductor chips of the same type, which are oriented so as to have their shorter dimension parallel to the connector strip, is arranged at the respective second edge of the printed circuit board. A second group of five semiconductor chips of the same type is respectively arranged between the first group of semiconductor chips and the center of the printed circuit board. The first group of semiconductor chips and the second group of semiconductor chips are actuated by two separate line buses whose conductor tracks branch toward all the semiconductor chips in the respective group of semiconductor chips.

Abstract translation: 在第一实施例中，本发明提供一种具有电子印刷电路板和安装在印刷电路板的至少一个外表面上的相同类型的多个半导体芯片的存储模块。 印刷电路板具有一个连接器条，其在第一方向的至少一个外表面的第一边缘处延伸，并且具有在第一方向上排列的多个电触点。 印刷电路板沿第一方向在两个相对的第二边缘之间延伸。 在印刷电路板的中心和印刷电路板的相应第二边缘之间，相同类型的至少九个半导体芯片分别彼此相邻地安装在印刷电路板的外表面上。 相同类型的半导体芯片分别具有较小的尺寸，并且在垂直于较小尺寸的方向上具有大于较小尺寸的较大尺寸。 在印刷电路板的相应第二边缘处布置相同类型的四个半导体芯片的相应的第一组，其被定向成具有与连接器条平行的较短尺寸。 第一组相同类型的五个半导体芯片分别布置在第一组半导体芯片和印刷电路板的中心之间。 第一组半导体芯片和第二组半导体芯片由两条单独的线路总线驱动，其导体轨迹分支到相应的半导体芯片组中的所有半导体芯片。

公开(公告)号：US07207663B2

公开(公告)日：2007-04-24

申请号：US11320128

申请日：2005-12-27

Applicant: Shigeru Suzuki

Inventor： Shigeru Suzuki

IPC: B41J2/045 ,  B41J2/14

CPC classification number: B41J2/14209 ,  B41J2002/14217 ,  B41J2002/14225 ,  B41J2002/14306 ,  B41J2002/14491 ,  H01R12/62 ,  H05K1/0268 ,  H05K1/0393 ,  H05K1/117 ,  H05K3/0052 ,  H05K3/0097 ,  H05K3/3468 ,  H05K3/363 ,  H05K2201/094 ,  H05K2201/09409 ,  H05K2203/044 ,  H05K2203/1545

Abstract: A flexible circuit sheet is electrically connected to an electric device. The electric device has a first row of electric terminals and a second row of electric terminals. Both the first row of electric terminals and the second row of electric terminals extend along a first direction, the second row of electric terminals extends parallel to the first row of electric terminals. The flexible circuit comprises a base sheet, a first row of lands formed on the base sheet to be electrically connected to the first row of electric terminals, and a second row of lands formed on the base sheet to be electrically connected to the second row of electric terminals. A positional relationship between the first row of lands and the second row of lands is equal to a positional relationship between the first row of electric terminals and the second row of electric terminals. A surface area of each land of the first row of lands is greater than a surface area of each land of the second row of lands.

Abstract translation: 柔性电路板与电气装置电连接。 电气装置具有第一排电气端子和第二排电气端子。 第一排电端子和第二排电端子沿着第一方向延伸，第二排电端子平行于第一排电端子延伸。 柔性电路包括基片，形成在基片上以与第一行电端子电连接的第一排平台，以及形成在基片上以与第二列电连接的第二排电线 电气端子。 第一排平台和第二排平台之间的位置关系等于第一排电端子和第二排电端子之间的位置关系。 第一排土地的每个陆地的表面积大于第二排土地的每个土地的表面积。

公开(公告)号：US07188408B2

公开(公告)日：2007-03-13

申请号：US10335285

申请日：2002-12-31

Applicant: Iosif R. Korsunsky ,  Joanne E. Shipe ,  Robert W. Brown

Inventor： Iosif R. Korsunsky ,  Joanne E. Shipe ,  Robert W. Brown

IPC: H05K3/20

CPC classification number: H05K1/117 ,  H01R13/6585 ,  H05K2201/09409 ,  Y10T29/49128 ,  Y10T29/49149 ,  Y10T29/49169 ,  Y10T29/49204 ,  Y10T29/49208 ,  Y10T29/49211 ,  Y10T29/49222

Abstract: A method of making an electrical connector includes the steps of: providing a connector body (2) having an insert (5) defining a recessed area (54a) at one side and a number of channels (54b) at an opposite side; assembling a ground bus (4) to the recessed area of the insert, the ground bus including a carrier strip (46) with a number of fingers (460) extending therefrom; assembling a number of signal contacts (3) to the channels of the insert, each signal contact including a board mounting portion (32); and displacing the carrier strip such that each finger extends into space (320) between the mounting portions of two adjacent signal contacts.

Abstract translation: 制造电连接器的方法包括以下步骤：提供具有插入件（5）的连接器主体（2），所述插入件在一侧限定凹陷区域（54a），在相对侧限定多个通道（54b） 将接地母线（4）组装到所述插入件的凹陷区域，所述接地母线包括具有从其延伸的多个指状物（460）的承载带（46）; 将多个信号触点（3）组装到插入件的通道上，每个信号触点包括板安装部分（32）; 并移动载体条，使得每个指状物延伸到两个相邻信号触头的安装部分之间的空间（320）中。

公开(公告)号：US07125100B2

公开(公告)日：2006-10-24

申请号：US10634428

申请日：2003-08-05

Applicant: Taku Ishizawa ,  Takakazu Fukano ,  Toshihisa Saruta

Inventor： Taku Ishizawa ,  Takakazu Fukano ,  Toshihisa Saruta

IPC: B41J2/14

CPC classification number: B41J2/17546 ,  B41J2/17503 ,  B41J2/17526 ,  B41J2/1753 ,  H05K1/117 ,  H05K2201/09409 ,  H05K2201/09709 ,  H05K2201/10159

Abstract: Circuit board 10 is of substantially rectangular shape, provided in the upper half of the juxtaposed face 13 with a substantially circular test terminal 20. In the lower half are provided a plurality of substantially rectangular terminals 21–27, arrayed in two rows, i.e., an upper and lower row, the upper row containing an I/O terminal 21 for data input/output, a power supply terminal 22 for supplying power, and a chip select terminal 23 for input of a chip select signal CS. The lower row of juxtaposed face 13 contains a ground terminal 24, a read/write terminal 25 for inputting read/write control signals W/R, a clock terminal 26 for inputting a clock signal CLK, and a ground terminal 27.

公开(公告)号：US20060226861A1

公开(公告)日：2006-10-12

申请号：US11402000

申请日：2006-04-12

Applicant: Hiroji Hoshino

Inventor： Hiroji Hoshino

IPC: G01R31/02

CPC classification number: H05K1/118 ,  H05K1/117 ,  H05K2201/09263 ,  H05K2201/09381 ,  H05K2201/09409 ,  H05K2201/09709 ,  H05K2201/09727 ,  H05K2203/1572

Abstract: A double-sided flexible circuit board with enhanced rigidity of terminals by using copper foil on an opposite side of the circuit board is provided. The flexible circuit board having wiring patterns P for connecting terminals on each of a front surface A and a back surface B of its periphery, includes: terminal patterns with linear-planar-shaped traces, the traces of which are equally spaced and disposed on the peripheries of each of the front surface and the back surface of the board; and backing patterns with planar-shaped traces, the traces of which are combined with the terminal patterns and bent so that the central portion of the backing pattern is offset from that of the terminal pattern, wherein the traces of the backing patterns are disposed on the corresponding opposite side of the traces of the terminal patterns on the board so as to be positioned overlapping with the traces of the terminal patterns.

Abstract translation: 提供了一种通过在电路板的相对侧使用铜箔来提高端子刚性的双面柔性电路板。 具有用于连接其周边的前表面A和后表面B的端子上的端子的布线图案P的柔性电路板包括：具有线性平面状迹线的端子图案，其迹线相等间隔设置在 板的前表面和后表面中的每一个的周边; 以及具有平面形轨迹的背衬图案，其轨迹与端子图案组合并弯曲，使得背衬图案的中心部分偏离端子图案的中心部分，其中背衬图案的迹线设置在 在板上的端子图案的迹线的对应的相对侧，以便与端子图案的迹线重叠。

公开(公告)号：US20060049265A1

公开(公告)日：2006-03-09

申请号：US11190230

申请日：2005-07-27

Applicant: Hung Ho ,  Hsiang-An Hsieh ,  Gordon Yu

Inventor： Hung Ho ,  Hsiang-An Hsieh ,  Gordon Yu

IPC: G06K19/06

CPC classification number: H01R13/2442 ,  G06K19/07732 ,  H05K1/117 ,  H05K2201/09381 ,  H05K2201/09409 ,  H05K2201/09709 ,  H05K2201/09727

Abstract: A removable electronic device having an application module for transferring data to or from a host having a plurality of contact terminals, the device comprising a first row of contact pads, each of the contact pads of the first row including a substantially tapered end, and a second row of contact pads, each of the contact pads of the second row including a substantially tapered end that corresponds to the substantially tapered end of at least one of the contact pads of the first row in an interweaving relationship, wherein the first and second rows of contacts pads are configured to receive the plurality of contact terminals.

Abstract translation: 一种可移动电子设备，具有用于向具有多个接触端子的主机传送数据或从具有多个接触端子的主机传送数据的应用模块，该设备包括第一排接触焊盘，第一行的每个接触焊盘包括基本上锥形的端部， 第二排接触焊盘，第二行的每个接触焊盘包括基本上渐缩的端部，其对应于交织关系中的第一行的至少一个接触焊盘的基本上锥形的端部，其中第一和第二行 接触焊盘被配置为接收多个接触端子。

公开(公告)号：US06930900B2

公开(公告)日：2005-08-16

申请号：US10765420

申请日：2004-01-27

Applicant: Jayesh R. Bhakta ,  Robert S. Pauley, Jr.

Inventor： Jayesh R. Bhakta ,  Robert S. Pauley, Jr.

IPC: G11C5/00 ,  H05K1/02 ,  H05K1/18 ,  G11C5/06 ,  G06F12/00 ,  G06F13/00 ,  G11C5/02 ,  G11C19/00

CPC classification number: H05K1/181 ,  H05K1/0266 ,  H05K2201/09409 ,  H05K2201/09709 ,  H05K2201/10689 ,  Y02P70/611

Abstract: Integrated circuits utilizing standard commercial packaging are arranged on a printed circuit board to allow the production of 1-Gigabyte and 2-Gigabyte capacity memory modules. A first row of integrated circuits is oriented in an opposite orientation to a second row of integrated circuits. The integrated circuits in a first half of the first row and in the corresponding half of the second row are connected via a signal trace to a first register. The integrated circuits in a second half of the first row and in the corresponding half of the second row are connected to a second register. Each register processes a non-contiguous subset of the bits in each data word.