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    Circuit board device and mounting method therefor
    141.
    发明申请
    Circuit board device and mounting method therefor 失效
    电路板装置及其安装方法

    公开(公告)号：US20030117784A1

    公开(公告)日：2003-06-26

    申请号：US10308120

    申请日：2002-12-03

    Inventor： Kenji Fukunabe ,  Masanobu Okada ,  Kazuyoshi Nakaya

    IPC: H05K007/02 ,  H05K007/06 ,  H05K007/08 ,  H05K007/10

    CPC classification number: H05K3/3442 ,  H05K3/3452 ,  H05K3/368 ,  H05K2201/09181 ,  H05K2201/09381 ,  H05K2201/09663 ,  H05K2201/099 ,  H05K2201/10984 ,  Y02P70/613 ,  Y10T29/49126 ,  Y10T29/49144 ,  Y10T29/49149

    Abstract: In a circuit board, when lands provided on a rear surface of a substrate are each separated into a mainland and a sub-land, warping or other defects of the substrate can be ignored when soldering, and the substrate can be mounted with a high bonding strength. On the rear surface of a module substrate, partitions are each provided to separate a metal film into the mainland and the sub-land. Accordingly, when the substrate is mounted on a motherboard, solder applied beforehand from each end-surface electrode to the mainland can be largely protruded downward from the mainland, and warping or other defects of the substrate can be ignored by this protruding portion of the solder. In addition, in the state in which the substrate is mounted, since the solder is pushed out from between the mainland and the motherboard and overflows the partition, both the mainland and the sub-land can be soldered to the motherboard side, and hence stable bonding can be obtained at a large bonding area.

    Abstract translation: 在电路板中，当设置在基板的背面上的焊盘分开成大陆和焊盘时，焊接时可以忽略基板翘曲或其他缺陷，并且可以以高粘合力安装基板 强度。 在模块基板的后表面上，分别设置有将金属膜分离成大陆和底板的隔板。 因此，当基板安装在母板上时，预先从每个端面电极到大陆的焊料可以大大地从大陆向下突出，并且焊料的突出部分可以忽略基板的翘曲或其它缺陷 。 此外，在安装基板的状态下，由于焊料从大陆和母板之间被推出并溢出隔板，所以大陆和亚地区都可以焊接到主板侧，因此稳定 可以在大的接合区域获得接合。

    Low electromagnetic interference clock oscillator module
    142.
    发明申请
    Low electromagnetic interference clock oscillator module 审中-公开
    低电磁干扰时钟振荡器模块

    公开(公告)号：US20030112084A1

    公开(公告)日：2003-06-19

    申请号：US10014499

    申请日：2001-12-14

    Inventor： Paul Fei-Ta Chen ,  James John Levante ,  Chuong Dinh Nguyen

    IPC: H03B029/00

    CPC classification number: H03B5/32 ,  H03B1/04 ,  H03B2202/08 ,  H03B2202/086 ,  H05K1/0216 ,  H05K1/0237 ,  H05K1/0243 ,  H05K1/141 ,  H05K2201/093 ,  H05K2201/09663 ,  H05K2201/10325

    Abstract: A low noise clock oscillator in standard surface mount plastic or ceramic form. With the same soldering pads design such devices can be replace with a convention standard surface mount clock oscillator to reduce Electro-magnetic Interference or RFI (Radio Frequency Interference) without redesign of the main board. The oscillator is characterized by using a spectrum spread clock generator and a spread controller on an elevated platform to reduce common mode emission currents.

    Abstract translation: 标准表面贴装塑料或陶瓷形式的低噪声时钟振荡器。 使用相同的焊盘设计，这样的器件可以用常规的标准表面贴装时钟振荡器代替，以减少电磁干扰或RFI（射频干扰），而无需重新设计主板。 振荡器的特征在于在升高的平台上使用频谱扩展时钟发生器和扩展控制器以减少共模发射电流。

    Chip-type electronic component
    143.
    发明授权
    Chip-type electronic component 失效
    片式电子元器件

    公开(公告)号：US06576497B2

    公开(公告)日：2003-06-10

    申请号：US10014856

    申请日：2001-12-14

    Applicant: Taisuke Ahiko ,  Takaya Ishigaki ,  Hiroki Sato ,  Kamiya Takashi ,  Masanori Yamamoto

    Inventor： Taisuke Ahiko ,  Takaya Ishigaki ,  Hiroki Sato ,  Kamiya Takashi ,  Masanori Yamamoto

    IPC: H01L2144

    CPC classification number: H01G4/012 ,  H01G4/232 ,  H05K3/3442 ,  H05K2201/09181 ,  H05K2201/09381 ,  H05K2201/09663 ,  H05K2201/10636 ,  Y02P70/611 ,  Y02P70/613

    Abstract: A ceramic substrate having two side surfaces in a lengthwise direction and two side surfaces in a widthwise direction intersecting each other. The ceramic substrate also includes at least one flat surface in a thicknesswise direction. Internal electrode films are embedded in the ceramic substrate with film surfaces thereof extending roughly parallel to the flat surface of the ceramic substrate. External electrodes are each provided on the flat surface of the ceramic substrate toward one of the two ends of the ceramic substrate in the lengthwise direction, are electrically continuous with the internal electrode films and are formed over distances and from the two side surfaces in the widthwise direction.

    Abstract translation: 陶瓷基板具有长度方向的两个侧面和宽度方向的两个侧面相交。 陶瓷基板还包括沿厚度方向的至少一个平坦表面。 内部电极膜嵌入陶瓷基板中，其膜表面大致平行于陶瓷基板的平坦表面延伸。 外部电极分别设置在陶瓷基板的平坦表面上朝向长度方向的陶瓷基板的两端之一，与内部电极膜电连接，并且形成在距离宽度方向上的两个侧面 方向。

    Three-dimensional technique for improving the EMC characteristics of a printed circuit board
    146.
    发明授权
    Three-dimensional technique for improving the EMC characteristics of a printed circuit board 有权
    用于改善印刷电路板的EMC特性的三维技术

    公开(公告)号：US06507495B1

    公开(公告)日：2003-01-14

    申请号：US09605448

    申请日：2000-06-28

    Applicant: Jeffery C. Hailey ,  Donald L. Brooks

    Inventor： Jeffery C. Hailey ,  Donald L. Brooks

    IPC: H05K702

    CPC classification number: H05K1/0216 ,  H05K1/0239 ,  H05K1/162 ,  H05K2201/09245 ,  H05K2201/093 ,  H05K2201/09663

    Abstract: An apparatus for use with data processing systems. In one embodiment, the apparatus includes but is not limited to at least one conductive member having a first end electrically coupled to a first conductive structure which partially forms a moat and a second end electrically coupled to a second conductive structure which substantially spans the moat, with the second conductive structure having at least a part overhanging a third conductive structure which partially forms the moat. In one embodiment, the apparatus includes but is not limited to a first conductive member having a first end electrically coupled to a first conductive structure which partially forms a moat and a second end electrically coupled to a second conductive structure which substantially spans the moat, with the second conductive structure having at least a part overhanging a third conductive structure which partially forms the moat, and a second conductive member having a first end electrically coupled to the third conductive structure which partially forms the moat and a second end electrically coupled to a fourth conductive structure which substantially spans the moat, with the fourth conductive structure having at least a part overhanging the first conductive structure which partially forms the moat.

    Abstract translation: 一种与数据处理系统一起使用的设备。 在一个实施例中，该装置包括但不限于至少一个导电构件，该导电构件具有电耦合到部分形成护城河的第一导电结构的第一端和与实质上跨越护城河的第二导电结构电耦合的第二端， 其中第二导电结构具有至少部分突出部分形成护城河的第三导电结构的部分。 在一个实施例中，该装置包括但不限于第一导电构件，该第一导电构件具有电耦合到部分形成护城河的第一导电结构的第一端和与基本跨越护城河的第二导电结构电耦合的第二端， 所述第二导电结构具有至少部分突出部分形成所述护城河的第三导电结构的部分，以及第二导电构件，所述第二导电构件具有电耦合到所述第三导电结构的第一端，所述第一导电结构部分地形成所述护城河， 导电结构，其基本上跨越护城河，其中第四导电结构具有至少部分突出部分形成护城河的第一导电结构的部分。

    Bonded structure and electronic circuit board
    148.
    发明申请
    Bonded structure and electronic circuit board 有权
    保税结构和电子电路板

    公开(公告)号：US20020187689A1

    公开(公告)日：2002-12-12

    申请号：US09959482

    申请日：2002-02-04

    Inventor： Kenichiro Suetsugu ,  Masuo Suetsugu ,  Kenichiro Todoroki ,  Shunji Hibino ,  Hiroaki Takano ,  Mikiya Nakata ,  Yukio Maeda

    IPC: H01R004/02

    CPC classification number: H05K3/3447 ,  H05K1/0293 ,  H05K1/115 ,  H05K1/116 ,  H05K3/3452 ,  H05K3/3463 ,  H05K3/4092 ,  H05K2201/0373 ,  H05K2201/0397 ,  H05K2201/09663 ,  H05K2201/0979 ,  H05K2201/099

    Abstract: A connection structure of the present invention has a board with a through hole perforating therethrough, a land formed around the through hole, and a lead extending from an electronic component and disposed in the through hole. The land includes a wall surface land portion formed on a wall surface of the through hole, and front and back surface land portions formed on the front and back surfaces of the board respectively. A fillet connecting the land and the lead includes upper and lower fillet portions respectively contacting with the front and back surface land portions. A profile of the upper fillet portion is smaller than that of the lower fillet portion and is not smaller than that of the through hole. Therefore, occurrence of lift-off is effectively reduced while using a lead-free solder material.

    Abstract translation: 本发明的连接结构具有贯穿孔的通孔，形成在通孔周围的台面，以及从电子部件延伸设置在通孔中的引线。 所述平台包括形成在所述通孔的壁面上的壁面陆部，以及分别形成在所述板的前后表面上的前表面和后表面接合部。 连接陆地和铅的圆角包括分别与前表面和后表面陆部接触的上下圆角部分。 上部圆角部分的轮廓小于下圆角部分的轮廓，并且不小于通孔的轮廓。 因此，使用无铅焊料材料时，有效地减少了剥离的发生。

    High frequency de-coupling via short circuits
    149.
    发明授权
    High frequency de-coupling via short circuits 失效
    通过短路进行高频去耦

    公开(公告)号：US06477057B1

    公开(公告)日：2002-11-05

    申请号：US09640538

    申请日：2000-08-17

    Applicant: Patrick H. Buffet ,  Paul Lee Clouser ,  Danny Marvin Neal

    Inventor： Patrick H. Buffet ,  Paul Lee Clouser ,  Danny Marvin Neal

    IPC: H05K702

    CPC classification number: H05K1/0216 ,  G06F1/189 ,  G06F1/26 ,  H05K1/0231 ,  H05K2201/09345 ,  H05K2201/09663

    Abstract: A method and implementing computer system are provided in which de-coupling capacitors are used at driver and receiver sources, and defined gaps are created separating power and ground areas on a voltage reference plane of a circuit board. Short-circuit via connections are also provided through one or more vias between spatially separated circuit board layers. Each driver or receiver module includes the driver or receiver along with an associated gap, capacitor and via connections to VDD and ground planes, all included within a defined proximity to effectively block switching energy and/or VDD noise from entering the tri-plate ground-to-ground reference system. In a related exemplary construction, signal lines are placed at predetermined positions between ground planes to provide a tri-plate circuit board structure for transmitting logic signals from a driver to one or more receivers.

    Abstract translation: 提供了一种方法和实现的计算机系统，其中在驱动器和接收器源处使用解耦电容器，并且在电路板的电压参考平面上分离电源和接地区域来创建限定的间隙。 通过连接的短路也通过空间分离的电路板层之间的一个或多个通孔提供。 每个驱动器或接收器模块包括驱动器或接收器以及相关联的间隙，电容器和到VDD和接地层的通孔连接，所有这些都包括在限定的接近度内，以有效地阻止开关能量和/或VDD噪声进入三板接地平面， 对地参考系统。 在相关的示例性结构中，信号线被放置在接地平面之间的预定位置处，以提供用于将逻辑信号从驾驶员发送到一个或多个接收器的三板电路板结构。

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