公开(公告)号：US20090238954A1

公开(公告)日：2009-09-24

申请号：US12051931

申请日：2008-03-20

Applicant: SEIGI SUH ,  Esther Kim ,  William Borland ,  Cengiz Ahmet Palanduz

Inventor： SEIGI SUH ,  Esther Kim ,  William Borland ,  Cengiz Ahmet Palanduz

IPC: B05D5/12 ,  H01G7/00 ,  H05K3/30

CPC classification number: H01G4/1227 ,  H01G4/33 ,  H05K1/162 ,  H05K3/1291 ,  H05K2201/0175 ,  H05K2201/0355 ,  H05K2203/1126 ,  Y10T29/43 ,  Y10T29/4913

Abstract: Disclosed are a method of making a dielectric on a metal foil, and a method of making a large area capacitor that includes a dielectric on a metal foil. A dielectric precursor layer and the base metal foil are prefired at a prefiring temperature in the range of 350 to 650° C. in a moist atmosphere that also comprises a reducing gas. The prefired dielectric precursor layer and base metal foil are subsequently fired at a firing temperature in the range of 700 to 1200° C. in an atmosphere having an oxygen partial pressure of less than about 10−6 atmospheres to produce a dielectric. The area of the capacitor made according to the disclosed method may be greater than 10 mm2, and subdivided to create a multiple individual capacitor units that may be embedded in printed wiring boards. The dielectric is typically comprised of crystalline barium titanate or crystalline barium strontium titanate.

Abstract translation: 公开了一种在金属箔上制造电介质的方法，以及制造在金属箔上包括电介质的大面积电容器的方法。 在包含还原气体的潮湿气氛中，在350〜650℃的预热温度下，预烧电介质前体层和基体金属箔。 随后在具有小于约10 -6个大气压的氧气分压的气氛中，在700至1200℃范围内的烧制温度下烧制预烧电介质前体层和基底金属箔，以产生电介质。 根据所公开的方法制造的电容器的面积可以大于10mm 2，并且被细分以产生可以嵌入印刷线路板的多个单独的电容器单元。 电介质通常由结晶钛酸钡或结晶的钛酸钡锶组成。

公开(公告)号：US20090200639A1

公开(公告)日：2009-08-13

申请号：US12401166

申请日：2009-03-10

Applicant: Takashi KARIYA

Inventor： Takashi KARIYA

IPC: H01L29/92 ,  H01L23/52

CPC classification number: H01G4/30 ,  H01G4/232 ,  H01L23/49822 ,  H01L23/50 ,  H01L23/66 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/13099 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/81192 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/01041 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01056 ,  H01L2924/01057 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K1/113 ,  H05K1/162 ,  H05K3/4652 ,  H05K2201/0175 ,  H05K2201/09518 ,  H05K2201/096 ,  H05K2201/09718 ,  H05K2203/0152 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: When a package substrate with a built-in capacitor includes a first thin-film small electrode 41aa and a second thin-film small electrode 42aa that are electrically short-circuited to each other via a pinhole P in a high-dielectric layer 43, a power supply post 61a and a via hole 61b are not formed in the first thin-film small electrode 41aa, and a ground post 62a and a via hole 62b are not formed in the second thin-film small electrode 42aa, either. As a result, the short-circuited small electrodes 41aa and 42aa are electrically connected to neither a power supply line nor a ground line, and become a potential independent from a power supply potential and a ground potential. Therefore, in the thin-film capacitor 40, only the portion where the short-circuited small electrodes 41aa and 42aa sandwich the high dielectric layer 43 loses the capacitor function, and portions where other thin-film small electrodes 41a and 42a sandwich the high dielectric layer 43 maintain the capacitor function.

公开(公告)号：US20090200069A1

公开(公告)日：2009-08-13

申请号：US12419007

申请日：2009-04-06

Applicant: Takashi KARIYA ,  Akira Mochida

Inventor： Takashi KARIYA ,  Akira Mochida

IPC: H05K1/03 ,  H05K1/11 ,  H05K1/16 ,  H05K1/09

CPC classification number: H05K1/162 ,  H05K1/0231 ,  H05K1/0271 ,  H05K1/113 ,  H05K3/4602 ,  H05K2201/0133 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0187 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09718 ,  H05K2201/09763 ,  H05K2201/10522 ,  H05K2201/10734

Abstract: A multilayer printed wiring board 10 includes: a mounting portion 60 on the top surface of which is mounted a semiconductor element that is electrically connected to a wiring pattern 32, etc.; and a capacitor portion 40 having a high dielectric constant layer 43, formed of ceramic and first and second layer electrodes 41 and 42 that sandwich the high dielectric constant layer 43. One of either of the first and second layer electrodes 41 and 42 is connected to a power supply line of the semiconductor element and the other of either of the first and second layer electrodes 41 and 42 is connected to a ground line. In this multilayer printed wiring board 10, high dielectric constant layer 43 included in the layered capacitor portion 40, which is connected between the power supply line and the ground line, is formed of ceramic. With this structure, the static capacitance of the layered capacitor portion 40 can be high, and an adequate decoupling effect is exhibited even under circumstances in which instantaneous potential drops occur readily.

Abstract translation: 多层印刷电路板10包括：安装部分60，其顶表面上安装有电连接到布线图案32的半导体元件; 以及具有由陶瓷形成的高介电常数层43的电容器部分40和夹在高介电常数层43上的第一和第二层电极41和42。第一和第二层电极41和42中的一个连接到 半导体元件的电源线和第一和第二层电极41和42中的另一个连接到接地线。 在这种多层印刷电路板10中，连接在电源线和接地线之间的层状电容器部分40中包括的高介电常数层43由陶瓷形成。 利用这种结构，层状电容器部分40的静态电容可以很高，并且即使在容易发生瞬时电位下降的情况下也可以发挥足够的去耦效应。

公开(公告)号：US07572709B2

公开(公告)日：2009-08-11

申请号：US11427532

申请日：2006-06-29

Applicant: Huankiat Seh ,  Yongki Min

Inventor： Huankiat Seh ,  Yongki Min

IPC: H01L21/20

CPC classification number: H05K1/162 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2924/15313 ,  H05K1/112 ,  H05K3/4644 ,  H05K2201/0175 ,  H05K2203/102 ,  H05K2203/1105

Abstract: Some embodiments of the invention include thin film capacitors formed in a package substrate of an integrated circuit package. At least one of the thin film capacitors includes a first electrode layer, a second electrode layer, and a dielectric layer between the first and second electrode layers. Each of the first and second electrode layers and the dielectric layer is formed individually and directly on the package substrate. Other embodiments are described and claimed.

Abstract translation: 本发明的一些实施例包括形成在集成电路封装的封装衬底中的薄膜电容器。 薄膜电容器中的至少一个包括在第一和第二电极层之间的第一电极层，第二电极层和电介质层。 第一和第二电极层和电介质层中的每一个单独形成并直接形成在封装衬底上。 描述和要求保护其他实施例。

公开(公告)号：US20090152121A1

公开(公告)日：2009-06-18

申请号：US12370818

申请日：2009-02-13

Applicant: Jin Seok MOON ,  Yul Kyo Chung ,  Soo Hyun Lyoo ,  Seung Hyun Sohn

Inventor： Jin Seok MOON ,  Yul Kyo Chung ,  Soo Hyun Lyoo ,  Seung Hyun Sohn

IPC: C25D5/00

CPC classification number: H05K1/162 ,  H05K3/388 ,  H05K2201/0175 ,  H05K2201/0179 ,  Y10T29/417 ,  Y10T29/49124 ,  Y10T29/4913 ,  Y10T29/49155

Abstract: Disclosed herein is a printed circuit board with an embedded thin-film capacitor, and a method of manufacturing the same.Specifically, the present invention relates to a printed circuit board with an embedded thin-film capacitor, comprising a lower electrode formed on an insulating substrate; an amorphous paraelectric film formed on the lower electrode; a metal seed layer formed on the paraelectric film; and an upper electrode formed on the metal seed layer and having a surface roughness (Ra) of more than 300 nm; anda method of manufacturing a printed circuit board with an embedded thin-film capacitor, comprising forming a lower electrode on an insulating substrate; forming an amorphous paraelectric film on the lower electrode, using a low-temperature film formation process; forming a metal seed layer on the paraelectric film; and forming an upper electrode having a surface roughness (Ra) of more than 300 nm on the metal seed layer, using an electroplating method.

Abstract translation: 这里公开了具有嵌入式薄膜电容器的印刷电路板及其制造方法。 具体地说，本发明涉及一种具有嵌入式薄膜电容器的印刷电路板，包括形成在绝缘基板上的下电极; 形成在下电极上的非晶顺电膜; 形成在顺电膜上的金属种子层; 和形成在金属籽晶层上并具有大于300nm的表面粗糙度（Ra）的上电极; 以及制造具有嵌入式薄膜电容器的印刷电路板的方法，包括在绝缘基板上形成下电极; 使用低温成膜法在下电极上形成非晶顺电膜; 在顺电膜上形成金属种子层; 并且使用电镀方法在金属籽晶层上形成表面粗糙度（Ra）大于300nm的上电极。

公开(公告)号：US07540913B2

公开(公告)日：2009-06-02

申请号：US11541673

申请日：2006-10-03

Applicant: Jun Hee Bae ,  Seung Hyun Kim ,  Yul Kyo Chung ,  Won Hoon Song ,  Sung Taek Lim ,  Hyun Ju Jin

Inventor： Jun Hee Bae ,  Seung Hyun Kim ,  Yul Kyo Chung ,  Won Hoon Song ,  Sung Taek Lim ,  Hyun Ju Jin

IPC: C09D185/00

CPC classification number: H01L21/02282 ,  H01G4/1218 ,  H01G4/33 ,  H01L21/02186 ,  H01L21/316 ,  H05K1/162 ,  H05K2201/0175 ,  H05K2201/0179

Abstract: Disclosed herein are a coating solution for the formation of a dielectric thin film and a method for the formation of a dielectric thin film using the coating solution. The coating solution comprises a titanium alkoxide, a β-diketone or its derivative, and a benzoic acid derivative having an electron donating group. The method comprises spin coating the coating solution on a substrate to form a thin film and drying the thin film at a low temperature to crystallize the thin film. The titanium-containing coating solution is highly stable. In addition, the coating solution enables formation of a thin film, regardless of the kind of substrates, and can be used to form dielectric thin films in an in-line mode in the production processes of PCBs.

Abstract translation: 本文公开了用于形成电介质薄膜的涂布溶液和使用该涂布溶液形成电介质薄膜的方法。 涂布溶液包含钛醇盐，β-二酮或其衍生物，以及具有给电子基团的苯甲酸衍生物。 该方法包括将涂布溶液旋涂在基材上以形成薄膜，并在低温下干燥薄膜以使薄膜结晶。 含钛涂层溶液高度稳定。 此外，涂布溶液能够形成薄膜，而不管基板的种类如何，并且可以用于在PCB的生产过程中以在线模式形成电介质薄膜。

公开(公告)号：US20090129039A1

公开(公告)日：2009-05-21

申请号：US11917085

申请日：2006-06-14

Applicant: Takashi Kariya ,  Hironori Tanaka

Inventor： Takashi Kariya ,  Hironori Tanaka

IPC: H05K1/18

CPC classification number: H05K1/18 ,  H01L24/16 ,  H01L2224/16 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01025 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K1/113 ,  H05K1/162 ,  H05K3/4602 ,  H05K3/4652 ,  H05K7/00 ,  H05K2201/0175 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/096 ,  H05K2201/09718 ,  H05K2201/10674 ,  Y10T29/49133 ,  Y10T29/49162 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A multilayer printed wiring board includes a mounting portion supporting a semiconductor device and a layered capacitor portion including first and second layered electrodes and a ceramic high-dielectric layer therebetween. The first layered electrode is connected to a ground line and the second layered electrode is connected to a power supply line. The ratio of number of via holes, each constituting a conducting path part electrically connecting a ground pad to the ground line of a wiring pattern and passing through the second layered electrode in non-contact, to number of ground pads is 0.05 to 0.7. The ratio of number of second rod-shaped conductors, each constituting a conducting path part electrically connecting a power supply pad to the power supply line of the wiring pattern and passing through the first layered electrode in non-contact, to number of power supply pad is 0.05 to 0.7.

Abstract translation: 多层印刷布线板包括支撑半导体器件的安装部分和包括第一和第二层状电极的层状电容器部分和其间的陶瓷高介电层。 第一层状电极连接到地线，第二层状电极连接到电源线。 构成将接地焊盘与布线图案的接地线电连接并且非接触地穿过第二层状电极的导电路径部分的通孔数量的比率与接地焊盘数目的比为0.05〜0.7。 第二棒状导体的数量比构成将电源焊盘与布线图案的电源线电连接并且非接触地穿过第一层状电极的导电路径部分的数量与供电焊盘的数量 为0.05〜0.7。

公开(公告)号：US20080316723A1

公开(公告)日：2008-12-25

申请号：US11765113

申请日：2007-06-19

Applicant: William Borland ,  Daniel Irwin Amey, JR. ,  Karl Hartmann Dietz ,  Cengiz Ahmet Palanduz ,  J. Stan Erickson

Inventor： William Borland ,  Daniel Irwin Amey, JR. ,  Karl Hartmann Dietz ,  Cengiz Ahmet Palanduz ,  J. Stan Erickson

IPC: H05K1/16 ,  H01S4/00

CPC classification number: H05K1/162 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2924/15311 ,  H05K3/1291 ,  H05K3/4602 ,  H05K3/4652 ,  H05K2201/0175 ,  H05K2201/0355 ,  H05K2201/09481 ,  H05K2201/09518 ,  H05K2201/09718 ,  H05K2201/09763 ,  H05K2203/1126 ,  Y10T29/435 ,  Y10T29/49002 ,  Y10T29/49128

Abstract: Provided herein are devices comprising a printed wiring board that comprise, singulated capacitors fabricated from known good, thin-film, fired-on-foil capacitors. Provided are methods of incorporating the singulated capacitors into the build-up layers of a printed wiring board to minimize impedance. The singulated capacitors have a pitch that allows each power and ground terminal of an IC to be directly connected to a power and ground electrode, respectively, of its own singulated capacitor. Using a feedstock of known good, fired-on-foil capacitors allows for improved PWB yield.

Abstract translation: 本文提供了包括印刷线路板的器件，其包括由已知的良好的薄膜，片上电容器电容器制成的单个电容器。 提供了将单个电容器并入印刷线路板的积层中以最小化阻抗的方法。 单片电容器具有允许IC的每个电源和接地端子分别直接连接到其自己的单个电容器的电源和接地电极的间距。 使用已知的良好的烧结箔电容器的原料允许改进的PWB产量。

公开(公告)号：US20080264165A1

公开(公告)日：2008-10-30

申请号：US12018658

申请日：2008-01-23

Applicant: Hiroyuki Abe ,  Shinya Igarashi

Inventor： Hiroyuki Abe ,  Shinya Igarashi

IPC: G01F1/68 ,  H05K7/14

CPC classification number: H05K3/24 ,  H01L24/16 ,  H01L25/165 ,  H01L2224/16 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/0102 ,  H01L2924/01046 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/16195 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/3025 ,  H05K3/244 ,  H05K3/28 ,  H05K3/3463 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2203/1322 ,  H01L2224/0401

Abstract: In an electronic device, which is to be installed in an engine room, that comprises a circuit board, electronic elements, which are carried by the circuit board and function when electricity is applied from the circuit board to them, a case that accommodates the circuit board on which the electronic elements are disposed, and a cover that covers an opening of the case, the entire surface of a conductor pattern formed of a conductive material on the circuit board is covered with a barrier metallic film made of a metal other than the metal of the conductive material having a property of mutual diffusion with a solder material, and the barrier metallic film is further covered with a protective insulating film.

Abstract translation: 在要安装在发动机室中的电子设备中，包括电路板，由电路板承载的电子元件，以及当从电路板向其施加电力时的功能;容纳电路的壳体 电子元件设置在其上的板和覆盖壳体的开口的盖，在电路板上由导电材料形成的导体图案的整个表面被除了由金属制成的金属膜制成的阻挡金属膜覆盖 具有与焊料材料相互扩散性的导电材料的金属，并且阻挡金属膜进一步用保护绝缘膜覆盖。

公开(公告)号：US20080263842A1

公开(公告)日：2008-10-30

申请号：US12168352

申请日：2008-07-07

Applicant: CENGIZ A. PALANDUZ

Inventor： CENGIZ A. PALANDUZ

IPC: H01G7/00

CPC classification number: H05K1/162 ,  H01G4/1209 ,  H01G4/20 ,  H01G4/33 ,  H01L23/49822 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K2201/0175 ,  H05K2201/0195 ,  H05K2201/0326 ,  Y10T29/43 ,  Y10T29/435 ,  Y10T29/49002 ,  Y10T29/49155 ,  H01L2924/00

Abstract: An apparatus including a first electrode; a second electrode; a first and second ceramic material disposed between the first electrode and the second electrode, the second ceramic material having a greater electrical conductivity than the first ceramic material. A method including forming a first ceramic material film and a different second ceramic material film on a first electrode; and forming a second electrode on the second ceramic material film to form a capacitor structure having the first ceramic material film and the second ceramic material film disposed between the first electrode and the second electrode, wherein the first ceramic material has a conductivity selected to dampen undesired oscillations in electrical device operation to which the capacitor structure may be exposed. An apparatus including a first electrode; a second electrode; and a composite dielectric including a plurality of dielectric films including a different Curie temperature.

Abstract translation: 一种装置，包括：第一电极; 第二电极; 设置在所述第一电极和所述第二电极之间的第一和第二陶瓷材料，所述第二陶瓷材料具有比所述第一陶瓷材料更大的导电性。 一种包括在第一电极上形成第一陶瓷材料膜和不同的第二陶瓷材料膜的方法; 以及在所述第二陶瓷材料膜上形成第二电极以形成具有所述第一陶瓷材料膜并且所述第二陶瓷材料膜设置在所述第一电极和所述第二电极之间的电容器结构，其中所述第一陶瓷材料具有选择的电导率， 可能会暴露电容器结构的电气设备操作中的振荡。 一种装置，包括：第一电极; 第二电极; 以及包括具有不同居里温度的多个介电膜的复合电介质。