公开(公告)号：US20030006055A1

公开(公告)日：2003-01-09

申请号：US09898053

申请日：2001-07-05

Applicant: Walsin Advanced Electronics LTD

Inventor： Lai Chien-Hung ,  Lin Chien-Tsun ,  Chang Chao-Chia

IPC: H02G003/08

CPC classification number: H01L23/49548 ,  H01L23/3107 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/181 ,  H05K3/341 ,  H05K2201/0373 ,  H05K2201/10689 ,  H05K2201/10969 ,  Y02P70/613 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A semiconductor package for fixed surface mounting is disclosed, such as QFN, SON. The package includes a die, an encapsulant body sealing the die, a die pad supporting the die, and a plurality of leads electrically connecting with the die. The surface of die pad exposing outside the encapsulant body has grooves formed for improving the surface mounting to a printed circuit board.

Abstract translation: 公开了用于固定表面安装的半导体封装，例如QFN，SON。 封装包括管芯，密封管芯的密封体，支撑管芯的管芯焊盘以及与管芯电连接的多个引线。 暴露在密封体外部的管芯焊盘的表面具有形成用于改善对印刷电路板的表面安装的凹槽。

公开(公告)号：US20030001783A1

公开(公告)日：2003-01-02

申请号：US09893286

申请日：2001-06-28

Inventor： Ching-Chiang Yu ,  Yen-Liang Kuan

IPC: H01Q001/24

CPC classification number: H01Q1/38 ,  G06F3/0231 ,  H05K1/095 ,  H05K1/11 ,  H05K2201/0373 ,  H05K2201/09681

Abstract: This invention relates to an antenna base, comprising a printed circuit board. A base is designed in a region at an appropriate location on the printed circuit board. The base is printed with silver glue on the printed circuit board. This base serves as the antenna base, or this base along with the printed circuits on the printed circuit boards form the antenna base, so that the antenna can effectively transmit signals when the keyboard, mouse or other computer peripheral equipment is connected with the antenna.

Abstract translation: 本发明涉及一种包括印刷电路板的天线基底。 基座设计在印刷电路板上适当位置的区域中。 底座上印有印刷电路板上的银胶。 该基座用作天线基座，或者该基座与印刷电路板上的印刷电路形成天线基底，使得当键盘，鼠标或其他计算机外围设备与天线连接时，天线可以有效地传输信号。

公开(公告)号：US06462414B1

公开(公告)日：2002-10-08

申请号：US09517799

申请日：2000-03-02

Applicant: Sidney Larry Anderson

Inventor： Sidney Larry Anderson

IPC: H01L2348

CPC classification number: H01L24/32 ,  H01L21/4853 ,  H01L23/16 ,  H01L23/3128 ,  H01L23/3171 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/29 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L2224/0401 ,  H01L2224/05556 ,  H01L2224/05557 ,  H01L2224/05559 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/05599 ,  H01L2224/13005 ,  H01L2224/13006 ,  H01L2224/13023 ,  H01L2224/16237 ,  H01L2224/274 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2224/8385 ,  H01L2224/8547 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/3511 ,  H05K1/112 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/0373 ,  H05K2201/0394 ,  H05K2201/09472 ,  H05K2201/09745 ,  H05K2201/10734 ,  H05K2203/041 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49149 ,  Y10T29/49156 ,  Y10T29/49165 ,  Y10T29/49204 ,  H01L2924/00012 ,  H01L2924/207 ,  H01L2924/0133 ,  H01L2924/01049 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/13111 ,  H01L2224/05552 ,  H01L2224/45015 ,  H01L2224/45099

Abstract: An integrated circuit package is provided with a ball landing area having a conductive structure for interlocking a conductive ball to the ball pad. The conductive structure improves the attachment strength between an integrated circuit package and an printed circuit board. In an exemplary embodiment, the locking structure is a conductive material added to the surface of the ball pad to provide a nonplanar interface, such as a dome or a step, which interlocks the conductive ball to the ball pad. The improved package construction increases the area of contact, moves the shear plane to a higher and larger portion on the conductive ball, and/or prevents a crack from propagating along a flat plane across the ball joint. This package construction maintains the small size of the ball land areas and the package, increases the life of the integrated circuit package, while offsetting the problem of package warpage.

Abstract translation: 集成电路封装设置有具有用于将导电球与球垫互锁的导电结构的球着陆区域。 导电结构提高了集成电路封装和印刷电路板之间的附着强度。 在示例性实施例中，锁定结构是添加到球垫表面的导电材料，以提供将导电球与球垫互锁的非平面界面，例如圆顶或台阶。 改进的包装结构增加了接触面积，将剪切平面移动到导电球上的更大和更大的部分，和/或防止裂缝沿着穿过球窝接头的平面传播。 该封装结构保持了球形区域和封装的小尺寸，增加了集成电路封装的使用寿命，同时抵消了封装翘曲的问题。

公开(公告)号：US20020134577A1

公开(公告)日：2002-09-26

申请号：US10101758

申请日：2002-03-21

Applicant: KABUSHIKI KAISHA TOSHIBA

Inventor： Nagahisa Watanabe

IPC: H05K003/34

CPC classification number: H05K3/3442 ,  H05K1/111 ,  H05K3/3421 ,  H05K3/3452 ,  H05K2201/0373 ,  H05K2201/09663 ,  H05K2201/09709 ,  H05K2201/099 ,  H05K2201/10636 ,  H05K2201/10689 ,  H05K2203/048 ,  Y02P70/611 ,  Y02P70/613 ,  Y10T29/49144

Abstract: A printed circuit board includes a substrate having a mounting surface on which a surface mount device having at least one terminal is to be mounted. On the mounting surface, at least one footprint is arranged and positioned to align with the terminal. The footprint comprises a plurality of patterned parts and a plurality of solder layers formed on the patterned parts, respectively. Each patterned part is so shaped to limit a region in which molten solder flows when the solder layer is melted.

Abstract translation: 印刷电路板包括具有安装表面的基板，具有至少一个端子的表面安装装置将安装在该安装表面上。 在安装表面上，布置和定位至少一个覆盖区以与终端对准。 覆盖区分别包括多个图案化部分和分别形成在图案部分上的多个焊料层。 当焊料层熔化时，每个图案化部分被成形为限制熔融焊料流动的区域。

公开(公告)号：US06380513B1

公开(公告)日：2002-04-30

申请号：US09554685

申请日：2000-10-13

Applicant: Christian Remy De Graffenried

Inventor： Christian Remy De Graffenried

IPC: B23K2620

CPC classification number: B23K1/0056 ,  B23K2101/40 ,  G02B6/4238 ,  G02B7/00 ,  H05K3/341 ,  H05K3/3494 ,  H05K2201/0373 ,  H05K2201/10772 ,  H05K2201/10969 ,  H05K2203/101 ,  Y02P70/613 ,  Y10T29/4913

Abstract: A process for fastening a miniaturized component (2), in particular assembled in a modular manner, on a baseplate (1) by a solder joint is described. A side (4) of the component (2) is coated with a layer (5) of solder material, and the baseplate (1) is at least partly coated with a layer of metal (6, 6′, 6″). The component (2) is arranged above the baseplate (1), the metal layer and the layer (5) of solder material being a vertical distance apart and not in contact with one another. Heat energy is then supplied from the side of the baseplate (1) for melting solder material of the layer (5) of solder material on the side (4) of the component (2) until a drop forms, with the result that the drop (5′) of solder material fills the space between the component (2) and the baseplate (1) for mutual fastening.

Abstract translation: 描述了通过焊接接头将小型化部件（2）紧固在基板（1）上的模块化方式的方法。 组件（2）的一侧（4）涂覆有焊料材料层（5），底板（1）至少部分地涂有一层金属（6,6'，6“）。 组件（2）布置在基板（1）的上方，金属层和焊料层的层（5）彼此垂直距离并且不彼此接触。 然后从基板（1）的侧面提供热能，以熔化组件（2）侧面（4）上的焊料材料层（5）的焊料材料，直到形成液滴，结果是下降 （5'）填充组件（2）和基板（1）之间的空间，用于相互紧固。

公开(公告)号：US20020045366A1

公开(公告)日：2002-04-18

申请号：US09975114

申请日：2001-10-11

Inventor： Tomonari Ohtsuki ,  Yasue Yamazaki

IPC: H05K001/00 ,  H01R012/00

CPC classification number: H05K3/4007 ,  H01R4/02 ,  H05K3/326 ,  H05K2201/0373 ,  H05K2201/09909

Abstract: An electrical connector for connecting oppositely arranged first and second mating electrical devices includes a support member, a first circuit having a plurality of electric contact elements arranged on one surface of the support member to contact electric contacts of the first mating electrical device, a second circuit having a plurality of electric contact elements arranged on the other surface of the support member to contact electric contacts of the second mating electrical device, and conductors connecting the first and second circuits. The electric contact elements of the first and second circuits are formed in the most suitable manner to meet the shapes of the mating electric contacts, respectively. The support member is formed through its thickness with slits closely around the electric contact elements, respectively. As a result, when the electric contacts of the first mating electrical device urge the electric contact elements arranged on the support member to deform the support member, the electric contacts slide on the electric contact elements, thereby removing solders adhered on the electric contact elements. The slits are arranged at random to be directed substantially in different directions so that horizontal forces caused by the urging forces of the electric contacts of the first mating electrical device are canceled out each other, thereby maintaining the axial alignment of the first mating electrical device with the electrical connector.

Abstract translation: 用于连接相对布置的第一和第二匹配电气装置的电连接器包括支撑构件，第一电路具有布置在支撑构件的一个表面上的多个电接触元件，以接触第一配合电气装置的电触点，第二电路 具有布置在所述支撑构件的另一表面上的多个电接触元件以接触所述第二配合电气设备的电触点，以及连接所述第一和第二电路的导体。 第一和第二电路的电接触元件分别以适合的方式形成以满足配合电触头的形状。 支撑构件通过其厚度分别形成有紧密地围绕电接触元件的狭缝。 结果，当第一配合电气装置的电触点促使布置在支撑构件上的电接触元件使支撑构件变形时，电触点在电接触元件上滑动，从而去除附着在电接触元件上的焊料。 狭缝被布置成随机地被引导以基本上在不同的方向上被引导，使得由第一配合电气装置的电接触件的作用力引起的水平力彼此抵消，从而保持第一配合电气装置的轴向对准 电连接器。

公开(公告)号：US20020039847A1

公开(公告)日：2002-04-04

申请号：US09912111

申请日：2001-07-23

Inventor： Gary A. Clayton

IPC: H05K001/00 ,  H01R012/00

CPC classification number: H01R13/2414 ,  G01R1/0466 ,  H01L23/49827 ,  H01L2924/0002 ,  H05K1/115 ,  H05K3/027 ,  H05K3/4007 ,  H05K3/423 ,  H05K3/427 ,  H05K2201/0347 ,  H05K2201/0367 ,  H05K2201/0373 ,  H05K2201/09481 ,  H05K2201/09563 ,  H05K2201/0979 ,  H05K2201/10378 ,  H05K2203/0369 ,  H05K2203/0554 ,  H05K2203/1572 ,  H01L2924/00

Abstract: A grid interposer for testing electrical circuits and a method of making a grid interposer. The grid interposer includes upper and lower conductive surfaces sandwiched on either side of an insulating later, connected to each other by a plurality of vias filled with conductive material. The conductive surfaces are flat topped, and incised with a grid of flat topped peaks which are small enough to cut through oxidation of electrical contacts, and ensure good electrical contact with a variety of electrode shapes.

Abstract translation: 用于测试电路的栅格插入器和制作栅格插入器的方法。 栅格插入件包括夹在绝缘层之后的任一侧的上下导电表面，通过填充有导电材料的多个通孔彼此连接。 导电表面是平坦的，并且具有平坦的顶部峰的栅格，该栅格足够小以切割电触点的氧化，并且确保与各种电极形状的良好的电接触。

公开(公告)号：US20010054771A1

公开(公告)日：2001-12-27

申请号：US09935494

申请日：2001-08-23

Inventor： James M. Wark ,  Salman Akram

IPC: H01L023/48 ,  H01L023/52

CPC classification number: H01L24/10 ,  G01R1/06738 ,  H01L22/34 ,  H01L23/49811 ,  H01L23/49816 ,  H01L24/12 ,  H01L24/13 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05551 ,  H01L2224/05552 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/16 ,  H01L2224/1601 ,  H01L2224/81191 ,  H01L2224/81385 ,  H01L2224/81801 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15787 ,  H05K3/325 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/0373 ,  H05K2201/10734 ,  Y10T29/49147 ,  Y10T29/49155 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A bumped semiconductor device contact structure is disclosed including at least one non-planar contact pad having a plurality of projections extending therefrom for contacting at least one solder ball of a bumped integrated circuit (IC) device, such as a bumped die and a bumped packaged IC device. The projections are arranged to make electrical contact with the solder balls of a bumped IC device without substantially deforming the solder ball. Accordingly, reflow of solder balls to reform the solder balls is not necessary with the contact pad of the present invention. Such a contact pad may be provided on various testing equipment such as probes and the like and may be used for both temporary and permanent connections. Also disclosed is an improved method of forming the contact pads by etching and deposition.

Abstract translation: 公开了凸起的半导体器件接触结构，其包括至少一个非平面接触焊盘，其具有从其延伸的多个突起，用于接触凸起的集成电路（IC）器件的至少一个焊球，例如凸起的裸片和凸起的封装 IC设备。 突起被布置成与凸起的IC器件的焊球电接触，而不会使焊球基本上变形。 因此，本发明的接触焊盘不需要焊球的回流以重新形成焊球。 这样的接触垫可以设置在诸如探针等的各种测试设备上，并且可以用于临时和永久连接。 还公开了通过蚀刻和沉积形成接触焊盘的改进方法。

公开(公告)号：US06307446B1

公开(公告)日：2001-10-23

申请号：US09395472

申请日：1999-09-14

Applicant: David J. Drapeau ,  Christopher A. Moye

Inventor： David J. Drapeau ,  Christopher A. Moye

IPC: H01P104

CPC classification number: H01P1/047 ,  H05K1/0237 ,  H05K1/142 ,  H05K3/0061 ,  H05K3/3405 ,  H05K2201/0373 ,  H05K2201/10287

Abstract: A technique for providing an elastic RF interconnection between first and second planar conductors, which provides stress relief against mechanical and environment stresses. A length of a compressible wire bundle having first and second end portions is used as the elastic conductor. The first end portion is attached to an end of the first conductor. The second end portion is attached to an end of the second conductor. In a typical application, the first and second conductors are disposed on separate substrates, in turn mounted to a package surface.

Abstract translation: 一种用于在第一和第二平面导体之间提供弹性RF互连的技术，其提供针对机械和环境应力的应力消除。 使用具有第一和第二端部的可压缩线束的长度作为弹性导体。 第一端部附接到第一导体的端部。 第二端部附接到第二导体的端部。 在典型的应用中，第一和第二导体设置在分开的基板上，然后安装到封装表面。

公开(公告)号：US20010030550A1

公开(公告)日：2001-10-18

申请号：US09878949

申请日：2001-06-11

Inventor： Warren M. Farnworth ,  Malcolm Grief ,  Gurtej S. Sandhu

IPC: G01R031/02

CPC classification number: G01R1/07314 ,  H01L2924/00013 ,  H05K1/0306 ,  H05K3/325 ,  H05K2201/0367 ,  H05K2201/0373 ,  H05K2201/09045 ,  Y10S438/978 ,  Y10T29/49117 ,  Y10T29/49204 ,  H01L2224/29099

Abstract: A method of engaging electrically conductive test pads on a semiconductor substrate having integrated circuitry for operability testing thereof includes: a) providing an engagement probe having an outer surface comprising a grouping of a plurality of electrically conductive projecting apexes positioned in proximity to one another to engage a single test pad on a semiconductor substrate; b) engaging the grouping of apexes with the single test pad on the semiconductor substrate; and c) sending an electric signal between the grouping of apexes and test pad to evaluate operability of integrated circuitry on the semiconductor substrate. Constructions and methods are disclosed for forming testing apparatus comprising an engagement probe having an outer surface comprising a grouping of a plurality of electrically conductive projecting apexes positioned in proximity to one another to engage a single test pad on a semiconductor substrate.

Abstract translation: 一种在具有用于其可操作性测试的集成电路的半导体衬底上接合导电测试焊盘的方法包括：a）提供具有外表面的接合探针，该外表面包括彼此靠近定位的多个导电突出顶点的组， 半导体衬底上的单个测试焊盘; b）使顶点的分组与半导体衬底上的单个测试焊盘接合; 以及c）在顶点组和测试垫之间发送电信号，以评估半导体衬底上的集成电路的可操作性。 公开了用于形成测试装置的结构和方法，所述测试装置包括具有外表面的接合探针，所述外表面包括彼此靠近地定位的多个导电突出顶点的组，以接合半导体衬底上的单个测试焊盘。