公开(公告)号：US20160276257A1

公开(公告)日：2016-09-22

申请号：US15159323

申请日：2016-05-19

Applicant: DAI NIPPON PRINTING CO., LTD.

Inventor： Satoru KURAMOCHI ,  Sumio KOIWA ,  Hidenori YOSHIOKA

IPC: H01L23/498

CPC classification number: H01L23/49827 ,  H01L23/13 ,  H01L23/15 ,  H01L23/481 ,  H01L23/49894 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/065 ,  H01L25/18 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/13109 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16165 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73257 ,  H01L2224/81805 ,  H01L2224/8385 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2924/14 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/1461 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2924/381 ,  H05K1/115 ,  H05K3/28 ,  H05K3/445 ,  H05K2201/09154 ,  H05K2201/09563 ,  H05K2201/09581 ,  H05K2201/0959 ,  H05K2201/09854 ,  H05K2203/0594 ,  H01L2924/00014 ,  H01L2924/05432 ,  H01L2924/0665 ,  H01L2924/07025

Abstract: A through-hole electrode substrate includes a substrate including a through-hole extending from a first aperture of a first surface to a second aperture of a second surface, an area of the second aperture being larger than that of the first aperture, the through-hole having a minimum aperture part between the first aperture and the second aperture, wherein an area of the minimum aperture part in a planer view is smallest among a plurality of areas of the through-hole in a planer view, a filler arranged within the through-hole, and at least one gas discharge member contacting the filler exposed to one of the first surface and the second surface.

Abstract translation: 通孔电极基板包括基板，该基板包括从第一表面的第一孔到第二表面的第二孔延伸的通孔，第二孔的面积大于第一孔的面积， 所述孔在所述第一孔和所述第二孔之间具有最小孔径部分，其中在平面视图中，所述通孔中的所述最小孔径部分的面积在所述通孔的多个区域中最小， 并且与暴露于第一表面和第二表面之一的填料接触的至少一个气体排出构件。

公开(公告)号：US09406587B2

公开(公告)日：2016-08-02

申请号：US13533655

申请日：2012-06-26

Applicant: Harold Ryan Chase ,  Mihir K. Roy ,  Mathew J. Manusharow ,  Mark Hlad

Inventor： Harold Ryan Chase ,  Mihir K. Roy ,  Mathew J. Manusharow ,  Mark Hlad

IPC: H01L23/48 ,  H01L21/768 ,  H05K1/02 ,  H01L23/00 ,  H01L23/498 ,  H01L23/552 ,  H05K3/46 ,  H01L23/36

CPC classification number: H01L21/76879 ,  H01L21/288 ,  H01L21/76838 ,  H01L23/00 ,  H01L23/36 ,  H01L23/481 ,  H01L23/49827 ,  H01L23/552 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32245 ,  H01L2224/73253 ,  H05K1/0219 ,  H05K1/0222 ,  H05K3/4602 ,  H05K2201/09581 ,  H01L2924/014

Abstract: Embodiments of substrates, semiconductor devices and methods are shown that include elongated structures to improve conduction. Elongated structures and methods are also shown that provide electromagnetic isolation to reduce noise in adjacent components.

Abstract translation: 示出了基板，半导体器件和方法的实施例，其包括用于改善传导的细长结构。 还示出了延伸的结构和方法，其提供电磁隔离以减少相邻部件中的噪声。

公开(公告)号：US09253873B2

公开(公告)日：2016-02-02

申请号：US13827248

申请日：2013-03-14

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Seung Wook Park ,  Dong Hwan Lee ,  Jin Gu Kim ,  Chang Bae Lee ,  Christian Romero

IPC: H05K1/02 ,  H05K3/46

CPC classification number: H05K1/0216 ,  H05K3/4602 ,  H05K3/4673 ,  H05K2201/0281 ,  H05K2201/0323 ,  H05K2201/0723 ,  H05K2201/09581 ,  Y10T29/49165

Abstract: Disclosed herein are a printed circuit board and a method of manufacturing the same. The printed circuit board includes: a core layer having a first circuit wiring layer formed on one surface or both surfaces thereof; an insulating layer laminated, as at least one layer, on one surface or both surfaces of the core layer; and a second circuit wiring layer formed on one surface of the insulating layer, wherein a conductive core is included in upper and lower insulating layers contacting the second circuit wiring layer requiring an electromagnetic wave shielding, or the conductive core is included in the insulating layer or the core layer contacting the first circuit wiring layer requiring the electromagnetic wave shielding.

Abstract translation: 这里公开了一种印刷电路板及其制造方法。 印刷电路板包括：具有形成在其一个表面或两个表面上的第一电路布线层的芯层; 在芯层的一个表面或两个表面上层压作为至少一个层的绝缘层; 以及形成在所述绝缘层的一个表面上的第二电路布线层，其中在与需要电磁波屏蔽的第二电路布线层接触的上绝缘层和下绝缘层中包括导电芯，或者导电芯包括在绝缘层中或 芯层与需要电磁波屏蔽的第一电路布线层接触。

公开(公告)号：US20150342063A1

公开(公告)日：2015-11-26

申请号：US14287075

申请日：2014-05-26

Applicant: Rohm and Haas Electronic Materials LLC

Inventor： Julia KOZHUKH ,  Zuhra I. NIAZIMBETOVA ,  Kristen M. MILUM

IPC: H05K3/42 ,  H05K1/03 ,  C09D183/14 ,  H05K3/18

CPC classification number: C23C18/31 ,  C08G77/388 ,  C08L83/08 ,  C09D183/08 ,  C09D183/14 ,  C23C18/18 ,  G03F7/0751 ,  H05K1/03 ,  H05K3/181 ,  H05K3/422 ,  H05K3/427 ,  H05K2201/09581

Abstract: Copolymers of diglycidyl ether terminated polysiloxane compounds and non-aromatic polyamines are used in the preparation of dielectric materials for electroless metal plating. The copolymers may be used in the manufacture of printed circuit boards such as in cleaning and conditioning through-holes prior to electroless metallization.

Abstract translation: 二缩水甘油醚封端的聚硅氧烷化合物和非芳族多胺的共聚物用于无电镀金属电介质材料的制备。 共聚物可用于制造印刷电路板，例如在无电镀金属化之前的清洁和调节通孔中。

公开(公告)号：US20140124258A1

公开(公告)日：2014-05-08

申请号：US13827248

申请日：2013-03-14

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Seung Wook PARK ,  Dong Hwan Lee ,  Jin Gu Kim ,  Chang Bae Lee ,  Christian Romero

IPC: H05K1/02 ,  H05K3/40

CPC classification number: H05K1/0216 ,  H05K3/4602 ,  H05K3/4673 ,  H05K2201/0281 ,  H05K2201/0323 ,  H05K2201/0723 ,  H05K2201/09581 ,  Y10T29/49165

Abstract: Disclosed herein are a printed circuit board and a method of manufacturing the same. The printed circuit board includes: a core layer having a first circuit wiring layer formed on one surface or both surfaces thereof; an insulating layer laminated, as at least one layer, on one surface or both surfaces of the core layer; and a second circuit wiring layer formed on one surface of the insulating layer, wherein a conductive core is included in upper and lower insulating layers contacting the second circuit wiring layer requiring an electromagnetic wave shielding, or the conductive core is included in the insulating layer or the core layer contacting the first circuit wiring layer requiring the electromagnetic wave shielding.

Abstract translation: 这里公开了一种印刷电路板及其制造方法。 印刷电路板包括：具有形成在其一个表面或两个表面上的第一电路布线层的芯层; 在芯层的一个表面或两个表面上层压作为至少一个层的绝缘层; 以及形成在所述绝缘层的一个表面上的第二电路布线层，其中在与需要电磁波屏蔽的第二电路布线层接触的上绝缘层和下绝缘层中包括导电芯，或者导电芯包括在绝缘层中或 芯层与需要电磁波屏蔽的第一电路布线层接触。

公开(公告)号：US20130269986A1

公开(公告)日：2013-10-17

申请号：US13539505

申请日：2012-07-02

Applicant: Shih-Hao Sun

Inventor： Shih-Hao Sun

IPC: H05K7/20 ,  H05K3/30

CPC classification number: H01L23/3677 ,  H01L23/3121 ,  H01L23/5383 ,  H01L23/5389 ,  H01L25/16 ,  H01L25/167 ,  H01L33/64 ,  H01L2224/48091 ,  H01L2224/48228 ,  H01L2924/181 ,  H05K1/0204 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/09581 ,  H05K2201/10416 ,  H05K2203/1469 ,  Y10T29/49139 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: In a manufacturing method of a package carrier, a substrate having an upper surface, a lower surface, and an opening communicating the two surfaces is provided. An electronic device is disposed inside the opening. A first insulation layer and a superimposed first metal layer are laminated on the upper surface; a second insulation layer and a superimposed second metal layer are laminated on the lower surface. The opening is filled with the first and second insulation layers. First blind holes, second blind holes, and a heat-dissipation channel are formed. A third metal layer is formed on the first and second blind holes and an inner wall of the heat-dissipation channel. A heat-conducting device is disposed inside the heat-dissipation channel and fixed into the heat-dissipation channel via an insulation material. The first and second metal layers are patterned to form a first patterned metal layer and a second patterned metal layer.

Abstract translation: 在包装载体的制造方法中，提供具有上表面，下表面和连通两个表面的开口的基板。 电子设备设置在开口内。 第一绝缘层和叠置的第一金属层层叠在上表面上; 第二绝缘层和叠加的第二金属层层叠在下表面上。 开口填充有第一和第二绝缘层。 形成第一盲孔，第二盲孔和散热通道。 在第一和第二盲孔和散热通道的内壁上形成第三金属层。 导热装置设置在散热通道的内部并通过绝缘材料固定到散热通道中。 图案化第一和第二金属层以形成第一图案化金属层和第二图案化金属层。

公开(公告)号：US08310838B2

公开(公告)日：2012-11-13

申请号：US12591037

申请日：2009-11-05

Applicant: Helmut Kellermann

Inventor： Helmut Kellermann

IPC: H01R9/00

CPC classification number: H05K3/284 ,  H05K3/28 ,  H05K3/308 ,  H05K2201/0179 ,  H05K2201/09581 ,  H05K2201/1059 ,  Y10T29/49139

Abstract: An electric drive (1) with a circuit board (2), having conductor tracks (3) and contact openings (4) with plated through-holes (5) and equipped with electronic components (6), the circuit board (2) being coated with a protective layer (7) of insulating material, and press-fit contacts (8) are inserted into the contact openings (4) and in electrical contact areas (9) within the contact openings (4) electrical contact exists between a press-fit contact (8) and the plated through-hole (5) of the contact opening (4). The task of the invention is to reliably protect circuit boards of electric drives exposed to moisture and other chemical environmental effects and contact them economically. This task is solved according to the invention in that the protective layer (7) is a parylene coating, which covers the circuit board (2), the electronic components (6) and the surface areas of the contact openings (4) and circuit board (2) directly connected to the contact areas (9) between at least one press-fit contact (8) and at least one contact opening (4).

Abstract translation: 一种具有电路板（2）的电驱动器（1），具有导体轨道（3）和具有电镀通孔（5）并具有电子部件（6）的接触开口（4），所述电路板（2） 涂覆有绝缘材料的保护层（7），并且压配合触点（8）被插入到接触开口（4）和接触开口（4）内的电接触区域（9）中，电接触存在于压机 （8）和接触开口（4）的电镀通孔（5）。 本发明的任务是可靠地保护暴露于水分和其他化学环境影响的电驱动电路板，并经济地接触它们。 根据本发明解决的这个任务是保护层（7）是聚对二甲苯涂层，其覆盖电路板（2），电子部件（6）和接触开口（4）的表面积和电路板 （2）直接连接在至少一个压配合触头（8）和至少一个触点开口（4）之间的接触区域（9）上。

公开(公告)号：US20120261801A1

公开(公告)日：2012-10-18

申请号：US13448992

申请日：2012-04-17

Applicant: Akihito TAKANO ,  Masahiro SUNOHARA ,  Hideaki SAKAGUCHI ,  Mitsutoshi HIGASHI ,  Kenichi OTA ,  Yuichi SASAJIMA

Inventor： Akihito TAKANO ,  Masahiro SUNOHARA ,  Hideaki SAKAGUCHI ,  Mitsutoshi HIGASHI ,  Kenichi OTA ,  Yuichi SASAJIMA

IPC: H01L23/48 ,  C25D5/02 ,  C25D7/00 ,  H05K1/00 ,  H05K3/46

CPC classification number: C25D17/001 ,  C25D1/003 ,  C25D5/02 ,  C25D7/123 ,  H01L23/147 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/92125 ,  H01L2924/00011 ,  H01L2924/01006 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01044 ,  H01L2924/01047 ,  H01L2924/01056 ,  H01L2924/01073 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1531 ,  H01L2924/157 ,  H05K1/0306 ,  H05K1/162 ,  H05K2201/09581 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/81805

Abstract: A wiring board includes a silicon substrate with a through hole communicating with first and second substrate surfaces. A capacitor includes a capacitor part mounted on an insulating film covering the substrate first surface and including a first electrode on the insulating film, a first dielectric layer on the first electrode, and a second electrode on the first dielectric layer. A multilayer structure arranged on a wall surface defining the through hole includes the insulating film on the through hole wall surface, a first metal layer on the insulating film formed from the same material as the first electrode, a second dielectric layer on the first metal layer formed from the same material as the first dielectric layer, and a second metal layer on the second dielectric layer formed from the same material as the second electrode. The multilayer structure covers a penetration electrode in the through hole.

Abstract translation: 布线板包括具有与第一和第二基板表面连通的通孔的硅基板。 电容器包括安装在覆盖基板第一表面的绝缘膜上并包括绝缘膜上的第一电极，第一电极上的第一电介质层和第一电介质层上的第二电极的电容器部分。 布置在限定通孔的壁表面上的多层结构包括在通孔壁表面上的绝缘膜，由与第一电极相同的材料形成的绝缘膜上的第一金属层，第一金属层上的第二介电层 由与第一电介质层相同的材料形成，以及由与第二电极相同的材料形成的第二介电层上的第二金属层。 多层结构覆盖通孔中的穿透电极。

公开(公告)号：US20120180312A1

公开(公告)日：2012-07-19

申请号：US13430233

申请日：2012-03-26

Applicant: Zhichao Zhang ,  Kemal Aygun ,  Guizhen Zheng

Inventor： Zhichao Zhang ,  Kemal Aygun ,  Guizhen Zheng

IPC: H05K3/10

CPC classification number: H05K1/024 ,  H05K1/0251 ,  H05K1/115 ,  H05K3/4038 ,  H05K3/4602 ,  H05K2201/0187 ,  H05K2201/09581 ,  Y10T29/49155

Abstract: In integrated circuit packages, core vias are created to provide electrical connections between circuitry on one face of the core substrate material with circuitry on an opposing face of the core substrate material. Provided are methods for forming a via in a packaging substrate and packaging substrates having core vias formed in the core substrate material. Methods for forma a core via in a packaging substrate in which a first hole is created through the core substrate and filled with a low permittivity filler material. A second co-axially aligned hole is then created in the low permittivity filler material wherein the second hole is smaller in diameter than the first hole. The second hole is then filled with conducting material to provide a conducting via through the core substrate material.

Abstract translation: 在集成电路封装中，形成核心通孔以在芯基板材料的一个面上的电路与芯基板材料的相对面上的电路之间提供电连接。 提供了在封装基板中形成通孔的方法以及在芯基板材料中形成有芯通孔的封装基板。 在包装基材中形成芯通孔的方法，其中通过芯基板产生第一孔并填充低介电常数的填充材料。 然后在低介电常数填充材料中产生第二同轴对准的孔，其中第二孔的直径小于第一孔。 然后用导电材料填充第二孔，以通过芯基板材料提供导电通孔。

公开(公告)号：US08151456B2

公开(公告)日：2012-04-10

申请号：US12175732

申请日：2008-07-18

Applicant: Yasutomo Maehara ,  Kenji Iida ,  Tomoyuki Abe ,  Shin Hirano ,  Takashi Nakagawa ,  Hideaki Yoshimura ,  Seigo Yamawaki ,  Norikazu Ozaki

Inventor： Yasutomo Maehara ,  Kenji Iida ,  Tomoyuki Abe ,  Shin Hirano ,  Takashi Nakagawa ,  Hideaki Yoshimura ,  Seigo Yamawaki ,  Norikazu Ozaki

IPC: H05K3/02 ,  H05K3/40 ,  H05K3/42

CPC classification number: H05K3/427 ,  H05K1/115 ,  H05K1/116 ,  H05K3/0094 ,  H05K3/061 ,  H05K3/429 ,  H05K3/4602 ,  H05K3/4611 ,  H05K3/4691 ,  H05K2201/0347 ,  H05K2201/09581 ,  H05K2201/0959 ,  H05K2201/0969 ,  H05K2201/09809 ,  H05K2203/1178 ,  H05K2203/135 ,  H05K2203/1476 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

Abstract: The method of producing a substrate comprises the steps of: forming a through-hole in a base member; plating the base member so as to coat an inner face of the through-hole with a plated layer; applying photo resist on the base member; optically exposing and developing the photo resist so as to form a resist pattern, which coats at least a planar area of the through-hole; and etching an electrically conductive layer formed on the surface of the base member. The resist pattern is formed so as to separate an area of exposing the conductive layer a prescribed distance away from an edge of the through-hole, and the prescribed length is longer than a distance of etching a side face of the conductive layer in the etching step.

Abstract translation: 制造基板的方法包括以下步骤：在基底构件中形成通孔; 电镀所述基底构件以便用镀层涂覆所述通孔的内表面; 在基底上施加光刻胶; 对光致抗蚀剂进行光学曝光和显影，以形成至少覆盖通孔的平面区域的抗蚀剂图案; 以及蚀刻形成在所述基底构件的表面上的导电层。 形成抗蚀剂图形，以将导电层暴露出距通孔边缘规定距离的区域，并且规定的长度比蚀刻导电层的侧面的距离长 步。