公开(公告)号：US07172436B2

公开(公告)日：2007-02-06

申请号：US10800677

申请日：2004-03-16

Applicant: Koichi Uezono

Inventor： Koichi Uezono

IPC: H01R12/00

CPC classification number: B60R16/0238 ,  H05K1/0263 ,  H05K3/103 ,  H05K7/026 ,  H05K2201/0391 ,  H05K2201/09845 ,  H05K2201/09972 ,  H05K2201/10272 ,  H05K2201/10287

Abstract: A first board, on which electric wires are wired, includes a first part having a first thickness and a second part continued from the first part and having a second thickness smaller than the first thickness. A second board, on which bus bars are arranged, is disposed on the second part of the first board. The second board has a third thickness which is determined such that an additional thickness of the second thickness and the third thickness is not greater than the first thickness.

Abstract translation: 电线布线在其上的第一板包括具有第一厚度的第一部分和从第一部分延续的第二部分，并且具有小于第一厚度的第二厚度。 布置有母线的第二板被布置在第一板的第二部分上。 第二板具有第三厚度，其被确定为使得第二厚度和第三厚度的附加厚度不大于第一厚度。

公开(公告)号：US20070007558A1

公开(公告)日：2007-01-11

申请号：US11475292

申请日：2006-06-27

Applicant: Joseph Mazzochette

Inventor： Joseph Mazzochette

IPC: H01L29/768

CPC classification number: H05K1/021 ,  H01L25/0753 ,  H01L33/486 ,  H01L33/641 ,  H01L2224/48137 ,  H01L2224/48227 ,  H05K1/141 ,  H05K1/182 ,  H05K3/0061 ,  H05K3/3442 ,  H05K3/403 ,  H05K2201/09127 ,  H05K2201/09181 ,  H05K2201/09845 ,  H05K2201/10106 ,  H05K2203/063 ,  Y02P70/613 ,  Y10T29/49126 ,  Y10T29/49139 ,  Y10T29/49155 ,  Y10T156/13

Abstract: A light emitting diode (LED) package for high temperature operation which includes a printed wire board and a heat sink. The LED package may include a formed heat sink layer, which may be thermally coupled to an external heat sink. The printed wire board may include apertures that correspond to the heat sink such that the heat sink is integrated with the printed wire board layer. The LED package may include castellations for mounting the package on a secondary component such as a printed wire board. The LED package may further comprise an isolator disposed between a base metal layer and one or more LED die. Optionally, the LED die may be mounted directly on a base metal layer. The LED package may include a PWB assembly having a stepped cavity, in which one or more LED die are disposed. The LED package is advantageously laminated together using a pre-punched pre-preg material or a pressure sensitive adhesive.

Abstract translation: 一种用于高温操作的发光二极管（LED）封装，其包括印刷线路板和散热器。 LED封装可以包括形成的散热层，其可以热耦合到外部散热器。 印刷线路板可以包括对应于散热器的孔，使得散热器与印刷的线路板层集成。 LED封装可以包括用于将封装安装在次级部件（例如印刷线路板）上的城堡。 LED封装还可以包括设置在基底金属层和一个或多个LED管芯之间的隔离器。 可选地，LED管芯可以直接安装在基底金属层上。 LED封装可以包括具有阶梯腔的PWB组件，其中设置有一个或多个LED管芯。 使用预先冲压的预浸材料或压敏粘合剂将LED封装有利地层压在一起。

公开(公告)号：US20060278429A1

公开(公告)日：2006-12-14

申请号：US11506725

申请日：2006-08-18

Applicant: Joseph Tourne ,  Patrick Lebens

Inventor： Joseph Tourne ,  Patrick Lebens

IPC: H05K1/11

CPC classification number: H05K3/0047 ,  H05K1/0237 ,  H05K1/0268 ,  H05K3/429 ,  H05K2201/09845 ,  H05K2203/0207 ,  H05K2203/0242 ,  H05K2203/175 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49165 ,  Y10T29/49718 ,  Y10T29/49726 ,  Y10T408/03 ,  Y10T408/173 ,  Y10T408/175

Abstract: A multilayer circuit board is provided with at least one signal layer, at least one feedback layer, and at least one dielectric layer positioned between the signal layer and the feedback layer. The signal layer is connected to at least one plated hole. The feedback layer has a contact pad, which is positioned adjacent to the plated hole, but is electrically isolated from the plated hole. The contact pad is connected to a measurement unit. The dielectric layer is positioned between the signal layer and the contact pad of the feedback layer. A portion of the plated hole forms a stub portion, which extends a distance away from the signal layer and typically extends a distance away from the contact pad of the feedback layer. To remove the stub portion, a hole is bored or routed into the multilayer circuit board until electrical feedback is received by the measurement unit upon contact of a portion of the boring device with the contact pad. Upon receipt of the electrical feedback by the measurement unit, the boring device is retracted from the hole, and the hole formed by the boring device is filled with an epoxy, or other filler material.

公开(公告)号：US07126211B2

公开(公告)日：2006-10-24

申请号：US10838433

申请日：2004-05-03

Applicant: Chih-An Yang

Inventor： Chih-An Yang

IPC: H01L21/44 ,  H01L23/48

CPC classification number: H01L24/81 ,  H01L23/49816 ,  H01L2224/0401 ,  H01L2224/05572 ,  H01L2224/81801 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/19043 ,  H05K3/3436 ,  H05K3/3452 ,  H05K3/3484 ,  H05K2201/09845 ,  H05K2201/099 ,  H05K2201/10992 ,  H05K2203/0594 ,  Y02P70/613 ,  H01L2924/00014 ,  H01L2224/05552

Abstract: The present invention provides a circuit carrier for connecting to at least a bump. The circuit carrier comprises a substrate, at least a contact pad on a surface of the substrate and a solder mask layer covering the substrate. The solder mask has at least a stepped opening that exposes a portion of the contact pad. The stepped opening includes at least a first opening and a second opening and the size of the first opening is larger than that of the second opening. The stepped opening of the solder mask layer can contain more pre-solder paste, thus increasing the bonding strength between the bump and the contact pad.

Abstract translation: 本发明提供一种用于连接至少一个凸块的电路载体。 电路载体包括衬底，至少衬底表面上的接触焊盘和覆盖衬底的焊接掩模层。 焊接掩模具有暴露接触焊盘的一部分的至少一个阶梯式开口。 阶梯式开口至少包括第一开口和第二开口，并且第一开口的尺寸大于第二开口的大小。 焊接掩模层的阶梯式开口可以包含更多的预焊膏，从而增加凸块和接触垫之间的结合强度。

公开(公告)号：US20060183316A1

公开(公告)日：2006-08-17

申请号：US11397713

申请日：2006-04-05

Applicant: James Larnerd ,  John Lauffer ,  Voya Markovich ,  Kostas Papathomas

Inventor： James Larnerd ,  John Lauffer ,  Voya Markovich ,  Kostas Papathomas

IPC: H01L21/4763 ,  H01L21/44

CPC classification number: H05K3/429 ,  H01L2224/13 ,  H05K1/113 ,  H05K1/115 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/421 ,  H05K2201/0347 ,  H05K2201/09454 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/09563 ,  H05K2201/0959 ,  H05K2201/0969 ,  H05K2201/09845

Abstract: A method of making a printed circuit board in which conductive thru-holes are formed within two dielectric layers of the board's structure so as to connect designated conductive layers. One hole connects two adjacent layers and the other connects two adjacent layers, including one of the conductive layers connected by the other hole. It is also possible to connect all three conductive layers using one or more holes. The resulting holes may be filled, e.g., with metal plating, or conductive or non-conductive paste. In the case of the latter, it is also possible to provide a top covering conductive layer over the paste, e.g., to serve as a pad or the like on the board's external surface.

Abstract translation: 一种制造印刷电路板的方法，其中导电通孔形成在板结构的两个电介质层内，以便连接指定的导电层。 一个孔连接两个相邻的层，另一个连接两个相邻的层，包括通过另一个孔连接的一个导电层。 也可以使用一个或多个孔连接所有三个导电层。 所得到的孔可以例如用金属电镀或导电或不导电的糊料填充。 在后者的情况下，也可以在浆料上方设置顶部覆盖导电层，例如在板的外表面上用作衬垫等。

公开(公告)号：US20060175085A1

公开(公告)日：2006-08-10

申请号：US11163477

申请日：2005-10-20

Applicant: Yung-Jen Lin

Inventor： Yung-Jen Lin

IPC: H05K1/11

CPC classification number: H05K3/0094 ,  H05K3/42 ,  H05K2201/0959 ,  H05K2201/09845 ,  H05K2201/099 ,  H05K2201/10666 ,  Y10T29/4913

Abstract: A printed circuit board and a forming method for forming the printed circuit board are disclosed. The printed circuit board includes a substrate and a conductive layer. The substrate includes a through hole, wherein one side of the through hole of the substrate corresponds to a first diameter, and the other side of the through hole of the substrate corresponds to a second diameter. The second diameter is greater than the first diameter. The conductive layer is placed on the inner surface of the through hole for electrically connecting the two sides of the substrate.

Abstract translation: 公开了一种用于形成印刷电路板的印刷电路板和形成方法。 印刷电路板包括基板和导电层。 基板包括通孔，其中基板的通孔的一侧对应于第一直径，并且基板的通孔的另一侧对应于第二直径。 第二直径大于第一直径。 导电层被放置在通孔的内表面上，用于电连接衬底的两侧。

公开(公告)号：US20060152329A1

公开(公告)日：2006-07-13

申请号：US11146890

申请日：2005-06-06

Applicant: Sten Bjorsell

Inventor： Sten Bjorsell

IPC: H01C7/13

CPC classification number: H01C7/027 ,  H01C1/1406 ,  H01C1/148 ,  H01C7/02 ,  H01C17/28 ,  H05K1/0206 ,  H05K1/056 ,  H05K3/0052 ,  H05K3/403 ,  H05K3/429 ,  H05K3/44 ,  H05K3/445 ,  H05K2201/09181 ,  H05K2201/09554 ,  H05K2201/09845

Abstract: An electronic device is manufactured using printed circuit board manufacturing processes. In particular, a laminar device comprises a first metal layer (12), a second metal layer (14), at least one layer of device material sandwiched between the first and second metal layers. A first layer of insulating material (40) substantially covers the first metal layer (12). A third metal layer (48) is provided on the first layer of insulating material (40). This third metal layer (48) is divided to provide a first terminal (90) and a second terminal (92). The first terminal (90) is electrically connected to the first metal layer (12) by a conductive interconnect (84) formed through said first layer of insulating material (40), and the second terminal (92) is electrically connected to said second metal layer (14) by a conductive path (68) comprising an insulated conductive channel which passes through and is insulated from said first metal layer (12) and said at least one layer of device material (16). The use of an insulated channel provides a cost effective method of manufacture and maximizes the effective area of device material used. A PTC component is built through this method.

Abstract translation: 使用印刷电路板制造工艺制造电子设备。 特别地，层状器件包括第一金属层（12），第二金属层（14），夹在第一和第二金属层之间的至少一层器件材料。 第一层绝缘材料（40）基本上覆盖第一金属层（12）。 第三金属层（48）设置在第一绝缘材料层（40）上。 该第三金属层（48）被分割以提供第一端子（90）和第二端子（92）。 第一端子（90）通过通过所述第一绝缘材料层（40）形成的导电互连（84）与第一金属层（12）电连接，并且第二端子（92）电连接到所述第二金属 层（14）由包括绝缘导电通道的导电路径（68）穿过并与所述第一金属层（12）和所述至少一层装置材料（16）绝缘。 使用绝缘通道提供了一种成本有效的制造方法，并使所使用的器件材料的有效面积最大化。 通过此方法构建PTC组件。

公开(公告)号：US07062845B2

公开(公告)日：2006-06-20

申请号：US10389544

申请日：2003-03-14

Applicant: Larry W. Burgess

Inventor： Larry W. Burgess

IPC: B23P19/00

CPC classification number: B23K26/0626 ,  B23K26/066 ,  B23K26/082 ,  B23K26/0853 ,  B23K26/0876 ,  B23K26/282 ,  B23K26/389 ,  B23K26/40 ,  B23K2101/40 ,  B23K2103/50 ,  H05K1/0269 ,  H05K1/112 ,  H05K1/167 ,  H05K3/0008 ,  H05K3/0026 ,  H05K3/0035 ,  H05K3/4638 ,  H05K3/4652 ,  H05K3/4679 ,  H05K2201/09518 ,  H05K2201/09845 ,  H05K2201/09918 ,  H05K2203/0165 ,  H05K2203/0554 ,  H05K2203/056 ,  H05K2203/081 ,  H05K2203/082 ,  H05K2203/1509 ,  H05K2203/1545 ,  H05K2203/1563 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165 ,  Y10T29/532 ,  Y10T29/53261

Abstract: A laser drilling system for drilling blind vias in printed circuit board panels, multichip modules and chipscale packages with top and bottom surfaces and which include multiple dielectric polymer and metal layers. The system includes a first laser module comprising a laser able to form at least one via per pulse through one or more polymer layers. The vias are circular or non-circular in shape. An articulated arm is adapted to move at a speed of about 200 inches per second and at an acceleration of about 5 g's or more. A beam delivery unit is attached to the articulated arm and a conveyor adapted to move panels at a constant speed. The first laser module positioned on a separate track from the conveyor moves at a faster rate than the conveyor to drill the top surface. A second laser module is positioned to move on another separate track from the conveyor movable at a faster rate so as to drill the bottom surface.

Abstract translation: 一种用于在印刷电路板面板，多芯片模块和具有顶表面和底表面的芯片尺寸封装中钻孔盲孔的激光钻孔系统，并且包括多个介电聚合物和金属层。 该系统包括第一激光器模块，其包括能够通过一个或多个聚合物层在每个脉冲上形成至少一个通孔的激光器。 通孔为圆形或非圆形。 铰接臂适于以每秒约200英寸的速度和约5g或更大的加速度移动。 梁传送单元附接到铰接臂和适于以恒定速度移动面板的传送器。 位于与输送机分离的轨道上的第一激光模块以比输送机更快的速度移动以钻顶表面。 第二激光模块被定位成在另一独立的轨道上移动，该输送机能够以更快的速度运动，以便钻下底面。

公开(公告)号：US20060127652A1

公开(公告)日：2006-06-15

申请号：US11297358

申请日：2005-12-09

Applicant: Yasuhiko Kanaya ,  Akira Irie ,  Katsuhiro Nagasawa ,  Toru Yuki

Inventor： Yasuhiko Kanaya ,  Akira Irie ,  Katsuhiro Nagasawa ,  Toru Yuki

IPC: B32B3/10 ,  B32B3/00 ,  B32B18/00 ,  C04B35/64

CPC classification number: H05K3/429 ,  H05K1/0268 ,  H05K3/0047 ,  H05K2201/092 ,  H05K2201/09718 ,  H05K2201/09845 ,  H05K2203/0207 ,  H05K2203/0242 ,  H05K2203/163 ,  H05K2203/175 ,  Y10T428/24322 ,  Y10T428/24917 ,  Y10T428/24926

Abstract: There is provided a multi-layered circuit board and a manufacturing method of the multi-layered circuit board that allows electronic parts to be mounted adequately and that will not hamper performance of the electronic parts. A power terminal (pin) of an electronic part to be mounted on a surface of the multi-layered circuit board is inserted into a plated through hole to connect with a first conductive layer. A detecting section having a detecting hole which is formed coaxially with the through hole and whose diameter is larger than the through hole is provided on a second conductive layer on the back of the first conductive layer. A hole having a large diameter is formed by a tool along the through hole from the back while applying voltage between the second conductive layer and the tool. A depth of the hole is set based on that the tool electrically conducts with the detecting hole. Unnecessary plate of the through hole may be removed by the large hole.

Abstract translation: 提供了一种多层电路板和多层电路板的制造方法，其允许电子部件被适当地安装，并且不会妨碍电子部件的性能。 要安装在多层电路板的表面上的电子部件的电源端子（销）插入到电镀通孔中以与第一导电层连接。 在第一导电层的背面的第二导电层上设置有具有与通孔同轴并且其直径大于通孔的检测孔的检测部。 在第二导电层和工具之间施加电压时，具有大直径的孔由工具沿着通孔从背面形成。 基于工具与检测孔电导通，设定孔的深度。 通孔的不必要的板可以被大孔除去。

公开(公告)号：US20060051954A1

公开(公告)日：2006-03-09

申请号：US11026919

申请日：2004-12-29

Applicant: Ying-Ren Lin ,  Chien-Ping Huang ,  Ho-Yi Tsai ,  Cheng-Hsu Hsiao

Inventor： Ying-Ren Lin ,  Chien-Ping Huang ,  Ho-Yi Tsai ,  Cheng-Hsu Hsiao

IPC: H01L21/44

CPC classification number: H01L24/12 ,  H01L21/4853 ,  H01L23/49816 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05023 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05568 ,  H01L2224/05611 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/11902 ,  H01L2224/13018 ,  H01L2224/13023 ,  H01L2224/1308 ,  H01L2224/13084 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13118 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00013 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/09845 ,  H05K2203/0723 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/013

Abstract: A bump structure of a semiconductor package and a method for fabricating the same are provided. The bump structure is used to connect a semiconductor element to a carrier of the semiconductor package. The fabrication method primarily employs an electroplating process to form the bump structure including an under bump metallurgy (UBM) layer, at least one I-shaped conductive pillar, and a solder material. This allows fine-pitch electrical connection pads to be arranged in the semiconductor package, and also provides an enhanced support structure and a sufficient height between the semiconductor element and the carrier.

Abstract translation: 提供半导体封装的凸块结构及其制造方法。 凸块结构用于将半导体元件连接到半导体封装的载体。 该制造方法主要采用电镀工艺来形成凸块结构，其包括凸块下金属（UBM）层，至少一个I形导电柱和焊料材料。 这允许在半导体封装中布置细间距电连接焊盘，并且还提供增强的支撑结构和在半导体元件和载体之间的足够的高度。