Conductive metal oxide structures in non-volatile re-writable memory devices

    公开(公告)号:US10311950B2

    公开(公告)日:2019-06-04

    申请号:US15706356

    申请日:2017-09-15

    Abstract: A memory cell including a memory element comprising an electrolytic insulator in contact with a conductive metal oxide (CMO) is disclosed. The CMO includes a crystalline structure and can comprise a pyrochlore oxide, a conductive binary oxide, a multiple B-site perovskite, and a Ruddlesden-Popper structure. The CMO includes mobile ions that can be transported to/from the electrolytic insulator in response to an electric field of appropriate magnitude and direction generated by a write voltage applied across the electrolytic insulator and CMO. The memory cell can include a non-ohmic device (NOD) that is electrically in series with the memory element. The memory cell can be positioned between a cross-point of conductive array lines in a two-terminal cross-point memory array in a single layer of memory or multiple vertically stacked layers of memory that are fabricated over a substrate that includes active circuitry for data operations on the array layer(s).

    Global bit line pre-charge circuit that compensates for process, operating voltage, and temperature variations

    公开(公告)号:US10229739B2

    公开(公告)日:2019-03-12

    申请号:US15868234

    申请日:2018-01-11

    Abstract: A memory array includes wordlines, local bitlines, two-terminal memory elements, global bitlines, and local-to-global bitline pass gates and gain stages. The memory elements are formed between the wordlines and local bitlines. Each local bitline is selectively coupled to an associated global bitline, by way of an associated local-to-global bitline pass gate. During a read operation when a memory element of a local bitline is selected to be read, a local-to-global gain stage is configured to amplify a signal on or passing through the local bitline to an amplified signal on or along an associated global bitline. The amplified signal, which in one embodiment is dependent on the resistive state of the selected memory element, is used to rapidly determine the memory state stored by the selected memory element. The global bit line and/or the selected local bit line can be biased to compensate for the Process Voltage Temperature (PVT) variation.

    DEVICE AND METHOD FOR MEASURING HEIGHT IN THE PRESENCE OF THIN LAYERS

    公开(公告)号:US20180364028A1

    公开(公告)日:2018-12-20

    申请号:US16061268

    申请日:2016-12-07

    Abstract: A device for measuring heights and/or thicknesses on a measurement object, includes (i) a first low-coherence interferometer for combining, in one spectrometer, a reference optical beam and a measurement optical beam originating from reflections of the light on interfaces of the measurement object, to produce a grooved spectrum signal with spectral modulation frequencies, (ii) apparatus for measuring an item of position information representative of the relative optical length, (iii) electronic and calculating apparatus arranged for determining at least one spectral modulation frequency representative of an optical path difference between the measurement optical beam and the reference optical beam, and for determining, by exploiting the item of information and the spectral modulation frequency, at least one height and/or thickness on the measurement object, and (iv) second optical apparatus for measuring distance and/or thickness with a second measurement beam incident on the measurement object on a second face opposite the measurement beam.

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