公开(公告)号：US20080096323A1

公开(公告)日：2008-04-24

申请号：US11957029

申请日：2007-12-14

Applicant: Gilroy Vandentop ,  Hamid Azimi

Inventor： Gilroy Vandentop ,  Hamid Azimi

IPC: H01L21/58

CPC classification number: H01L24/10 ,  H01L21/4857 ,  H01L21/6835 ,  H01L23/49811 ,  H01L23/562 ,  H01L24/13 ,  H01L2221/68345 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2924/01005 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15312 ,  H01L2924/30105 ,  H05K3/326 ,  H05K3/386 ,  H05K3/4007 ,  H05K2201/0133 ,  H05K2201/0355 ,  H05K2201/0367 ,  H05K2201/0382 ,  H05K2201/09909 ,  H05K2201/10674 ,  H01L2924/00

Abstract: A system may include a plurality of pliant conductive elements, a first end of one of the plurality of pliant conductive elements to be electrically coupled to a first electrical contact of an integrated circuit substrate and a second end of the one of the plurality of pliant conductive elements to be electrically coupled to a second electrical contact of an integrated circuit die.

Abstract translation: 系统可以包括多个柔性导电元件，多个柔性导电元件中的一个导电元件的第一端被电耦合到集成电路基板的第一电接触件和多个柔性导电元件中的一个的第二端 元件被电耦合到集成电路管芯的第二电接触件。

公开(公告)号：US20080093114A1

公开(公告)日：2008-04-24

申请号：US11958191

申请日：2007-12-17

Applicant: Yu-Tuan Lee

Inventor： Yu-Tuan Lee

IPC: H05K1/18

CPC classification number: H05K3/4007 ,  H05K1/0306 ,  H05K1/111 ,  H05K3/1241 ,  H05K3/386 ,  H05K3/388 ,  H05K3/4667 ,  H05K2201/0133 ,  H05K2201/0175 ,  H05K2201/0187 ,  H05K2201/0367 ,  H05K2201/09909 ,  H05K2201/10674

Abstract: A circuit board according to the invention includes a glass substrate, an insulating layer, a plurality of protrusions and a first circuit layer. The insulating layer is disposed on the substrate and has a plurality of protrusion-positioning regions. The protrusion-positioning region is an opening or a concave. Each of the protrusions includes a polymer or a resin material and is disposed in the protrusion-positioning region and surrounded by the insulating layer. The first circuit layer is disposed on the insulating layer and has at least one trace line extending directly onto the protrusion.

Abstract translation: 根据本发明的电路板包括玻璃基板，绝缘层，多个突起和第一电路层。 绝缘层设置在基板上并且具有多个突起定位区域。 突出定位区域是开口或凹入。 每个突起包括聚合物或树脂材料，并且设置在突出定位区域中并被绝缘层包围。 第一电路层设置在绝缘层上并且具有直接延伸到突起上的至少一条迹线。

公开(公告)号：US07361026B2

公开(公告)日：2008-04-22

申请号：US11865440

申请日：2007-10-01

Applicant: Gareth G. Hougham ,  Brian S. Beaman ,  Evan G. Colgan ,  Paul W. Coteus ,  Stefano S. Oggioni ,  Enrique Vargas

Inventor： Gareth G. Hougham ,  Brian S. Beaman ,  Evan G. Colgan ,  Paul W. Coteus ,  Stefano S. Oggioni ,  Enrique Vargas

IPC: H01R12/00

CPC classification number: H01R12/714 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01R12/52 ,  H05K3/326 ,  H05K3/4007 ,  H05K7/1061 ,  H05K2201/0133 ,  H05K2201/0367 ,  H05K2201/09481 ,  H05K2201/09745 ,  H05K2201/10378 ,  H05K2201/10734 ,  Y10T29/49002 ,  Y10T29/49121 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49151 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/49165 ,  Y10T29/49204 ,  Y10T29/49208 ,  Y10T29/49213 ,  Y10T29/49218 ,  Y10T29/49222 ,  H01L2924/00

Abstract: A land grid array (LGA) interposer structure, including an electrically insulating carrier plane, and at least one interposer mounted on a first surface of said carrier plane. The interposer possesses a hemi-toroidal configuration in transverse cross-section and is constituted of a dielectric elastomeric material. A plurality of electrically-conductive elements are arranged about the surface of the at least one hemi-toroidal interposer and extend radically inwardly and downwardly from an uppermost end thereof into electrical contact with at least one component located on an opposite side of the electrically insulating carrier plane. Provided is also a method of producing the land grid array interposer structure.

公开(公告)号：US20080064234A1

公开(公告)日：2008-03-13

申请号：US11517842

申请日：2006-09-08

Applicant: Brett Robert Herdendorf ,  Ronald Eldon Anderson ,  Michael Jon Roe

Inventor： Brett Robert Herdendorf ,  Ronald Eldon Anderson ,  Michael Jon Roe

IPC: H01R12/00

CPC classification number: H01R12/62 ,  G01R1/0735 ,  G11B5/4853 ,  H01R12/79 ,  H01R13/03 ,  H01R13/22 ,  H01R2201/20 ,  H05K1/118 ,  H05K3/365 ,  H05K2201/0367 ,  H05K2201/09172 ,  H05K2201/2009

Abstract: An assembly comprises a flex circuit including a first set of electrical contacts on a first side of the flex circuit and a compliant support backing adjacent a second side of the flex circuit and opposite the set of electrical contacts. The first set of electrical contacts is configured to connect to a second set of electrical contacts on an electronic component. The compliant support backing includes a set of support elements that individually support the first set of electrical contacts to increase the contact pressure between the first set of electrical contacts and the second set of electrical contacts when the flex circuit is connected to the electronic component. Embodiments may provide robust electrical contracts which provide a reliable connection useful for testing electronic components, such as head gimbal assemblies.

公开(公告)号：US07330357B2

公开(公告)日：2008-02-12

申请号：US10667694

申请日：2003-09-22

Applicant: Gilroy J. Vandentop ,  Hamid R. Azimi

Inventor： Gilroy J. Vandentop ,  Hamid R. Azimi

IPC: H05K7/10 ,  H05K7/12

CPC classification number: H01L24/10 ,  H01L21/4857 ,  H01L21/6835 ,  H01L23/49811 ,  H01L23/562 ,  H01L24/13 ,  H01L2221/68345 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2924/01005 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15312 ,  H01L2924/30105 ,  H05K3/326 ,  H05K3/386 ,  H05K3/4007 ,  H05K2201/0133 ,  H05K2201/0355 ,  H05K2201/0367 ,  H05K2201/0382 ,  H05K2201/09909 ,  H05K2201/10674 ,  H01L2924/00

Abstract: A system may include a plurality of pliant conductive elements, a first end of one of the plurality of pliant conductive elements to be electrically coupled to a first electrical contact of an integrated circuit substrate and a second end of the one of the plurality of pliant conductive elements to be electrically coupled to a second electrical contact of an integrated circuit die.

Abstract translation: 系统可以包括多个柔性导电元件，多个柔性导电元件中的一个导电元件的第一端被电耦合到集成电路基板的第一电接触件和多个柔性导电元件中的一个的第二端 元件被电耦合到集成电路管芯的第二电接触件。

公开(公告)号：US20080026607A1

公开(公告)日：2008-01-31

申请号：US11865440

申请日：2007-10-01

Applicant: Gareth Hougham ,  Brian Beaman ,  Evan Colgan ,  Paul Coteus ,  Stefano Oggioni ,  Enrique Vargas

Inventor： Gareth Hougham ,  Brian Beaman ,  Evan Colgan ,  Paul Coteus ,  Stefano Oggioni ,  Enrique Vargas

IPC: H01R12/14

CPC classification number: H01R12/714 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01R12/52 ,  H05K3/326 ,  H05K3/4007 ,  H05K7/1061 ,  H05K2201/0133 ,  H05K2201/0367 ,  H05K2201/09481 ,  H05K2201/09745 ,  H05K2201/10378 ,  H05K2201/10734 ,  Y10T29/49002 ,  Y10T29/49121 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49151 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/49165 ,  Y10T29/49204 ,  Y10T29/49208 ,  Y10T29/49213 ,  Y10T29/49218 ,  Y10T29/49222 ,  H01L2924/00

Abstract: A land grid array (LGA) interposer structure, including an electrically insulating carrier plane, and at least one interposer mounted on a first surface of said carrier plane. The interposer possesses a hemi-toroidal configuration in transverse cross-section and is constituted of a dielectric elastomeric material. A plurality of electrically-conductive elements are arranged about the surface of the at least one hemi-toroidal interposer and extend radically inwardly and downwardly from an uppermost end thereof into electrical contact with at least one component located on an opposite side of the electrically insulating carrier plane. Provided is also a method of producing the land grid array interposer structure.

公开(公告)号：US20080026606A1

公开(公告)日：2008-01-31

申请号：US11865353

申请日：2007-10-01

Applicant: Gareth Hougham ,  Brian Beaman ,  Evan Colgan ,  Paul Coteus ,  Stefano Oggioni ,  Enrique Vargas

Inventor： Gareth Hougham ,  Brian Beaman ,  Evan Colgan ,  Paul Coteus ,  Stefano Oggioni ,  Enrique Vargas

IPC: H01R12/14

CPC classification number: H01R12/714 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01R12/52 ,  H05K3/326 ,  H05K3/4007 ,  H05K7/1061 ,  H05K2201/0133 ,  H05K2201/0367 ,  H05K2201/09481 ,  H05K2201/09745 ,  H05K2201/10378 ,  H05K2201/10734 ,  Y10T29/49002 ,  Y10T29/49121 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49151 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/49165 ,  Y10T29/49204 ,  Y10T29/49208 ,  Y10T29/49213 ,  Y10T29/49218 ,  Y10T29/49222 ,  H01L2924/00

Abstract: A land grid array (LGA) interposer structure, including an electrically insulating carrier plane, and at least one interposer mounted on a first surface of said carrier plane. The interposer possesses a hemi-toroidal configuration in transverse cross-section and is constituted of a dielectric elastomeric material. A plurality of electrically-conductive elements are arranged about the surface of the at least one hemi-toroidal interposer and extend radically inwardly and downwardly from an uppermost end thereof into electrical contact with at least one component located on an opposite side of the electrically insulating carrier plane. Provided is also a method of producing the land grid array interposer structure.

公开(公告)号：US20080023834A1

公开(公告)日：2008-01-31

申请号：US11867527

申请日：2007-10-04

Applicant: Tz-Cheng Chiu ,  Manjula Variyam

Inventor： Tz-Cheng Chiu ,  Manjula Variyam

IPC: H01L23/488

CPC classification number: H05K3/4007 ,  H01L2224/05557 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/10253 ,  H01L2924/15311 ,  H05K1/111 ,  H05K3/3452 ,  H05K3/3457 ,  H05K2201/0367 ,  H05K2201/099 ,  H05K2201/09909 ,  H01L2924/00

Abstract: A raised solder-mask-defined (SMD) pad configured for receiving a solder ball on a laminate electronic circuit board and a method of creating the raised SMD pad on a laminate electronic circuit board. The method may comprise forming a base bump, covering the base bump with a conductive bump layer and layering a surrounding material over an extended edge of the conductive bump layer. The surrounding material is patterned to expose a pad face and of a portion of the sides of the conductive bump layer, such that the pad face is disposed above the surface of the surrounding material. The surrounding material may be patterned by a photolithography operation or alternatively, a laser-drill operation.

Abstract translation: 一种凸起的焊接掩模限定（SMD）焊盘，其被配置为在叠层电子电路板上接收焊球，以及在叠层电子电路板上形成升高的SMD焊盘的方法。 该方法可以包括形成基底凸起，用导电凸起层覆盖基底凸起并且在导电凸块层的延伸边缘上层叠围绕材料。 将周围材料图案化以暴露出导电凸块层的焊盘面和侧面的一部分，使得焊盘面设置在周围材料的表面上方。 周围的材料可以通过光刻操作或者激光钻孔操作来构图。

公开(公告)号：US20080023832A1

公开(公告)日：2008-01-31

申请号：US11762729

申请日：2007-06-13

Applicant: Shyh-Ming Chang

Inventor： Shyh-Ming Chang

IPC: H01L23/48 ,  H01L21/44

CPC classification number: H05K3/4007 ,  H01L22/32 ,  H01L24/13 ,  H01L2224/034 ,  H01L2224/0361 ,  H01L2224/0391 ,  H01L2224/0392 ,  H01L2224/0401 ,  H01L2224/05552 ,  H01L2224/05567 ,  H01L2224/056 ,  H01L2224/11515 ,  H01L2224/13007 ,  H01L2224/13012 ,  H01L2224/13016 ,  H01L2224/13017 ,  H01L2224/13019 ,  H01L2224/13021 ,  H01L2224/13099 ,  H01L2224/1319 ,  H01L2224/13552 ,  H01L2224/13553 ,  H01L2224/13562 ,  H01L2224/1357 ,  H01L2224/2919 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/0665 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/15788 ,  H05K2201/0367 ,  H05K2201/0373 ,  H05K2201/09909 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/05099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/29099 ,  H01L2224/29599

Abstract: A contact structure including a contact pad, a polymer bump and a conductive layer is provided in the present invention. The contact pad is disposed on a substrate. The polymer bump is disposed on the contact pad. The conductive layer covers the polymer bump and extends to the outside of the polymer bump. The portion of the conductive layer extending to the outside of the polymer bump serves as a test pad. The invention further discloses a manufacturing method of a contact structure. First, a substrate is provided having a contact pad already formed thereon. Then, a polymer bump is formed on the contact pad and a conductive layer is formed on the polymer bump. The conductive layer covers the polymer bump and extends to the outside of the polymer bump. The portion of the conductive layer extending to the outside of the polymer bump serves as a test pad.

Abstract translation: 在本发明中提供了包括接触垫，聚合物凸块和导电层的接触结构。 接触垫设置在基板上。 聚合物凸块设置在接触垫上。 导电层覆盖聚合物凸块并延伸到聚合物凸块的外部。 延伸到聚合物凸块外部的导电层的部分用作测试垫。 本发明还公开了一种接触结构的制造方法。 首先，提供具有已在其上形成的接触垫的基板。 然后，在接触焊盘上形成聚合物凸块，并且在聚合物凸块上形成导电层。 导电层覆盖聚合物凸块并延伸到聚合物凸块的外部。 延伸到聚合物凸块外部的导电层的部分用作测试垫。

公开(公告)号：US20080020597A1

公开(公告)日：2008-01-24

申请号：US11865423

申请日：2007-10-01

Applicant: Gareth Hougham ,  Brian Beaman ,  Evan Colgan ,  Paul Coteus ,  Stefano Oggioni ,  Enrique Vargas

Inventor： Gareth Hougham ,  Brian Beaman ,  Evan Colgan ,  Paul Coteus ,  Stefano Oggioni ,  Enrique Vargas

IPC: H01R12/00

CPC classification number: H01R12/714 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01R12/52 ,  H05K3/326 ,  H05K3/4007 ,  H05K7/1061 ,  H05K2201/0133 ,  H05K2201/0367 ,  H05K2201/09481 ,  H05K2201/09745 ,  H05K2201/10378 ,  H05K2201/10734 ,  Y10T29/49002 ,  Y10T29/49121 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49151 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/49165 ,  Y10T29/49204 ,  Y10T29/49208 ,  Y10T29/49213 ,  Y10T29/49218 ,  Y10T29/49222 ,  H01L2924/00

Abstract: A land grid array (LGA) interposer structure, including an electrically insulating carrier plane, and at least one interposer mounted on a first surface of said carrier plane. The interposer possesses a hemi-toroidal configuration in transverse cross-section and is constituted of a dielectric elastomeric material. A plurality of electrically-conductive elements are arranged about the surface of the at least one hemi-toroidal interposer and extend radically inwardly and downwardly from an uppermost end thereof into electrical contact with at least one component located on an opposite side of the electrically insulating carrier plane. Provided is also a method of producing the land grid array interposer structure.