公开(公告)号：US07890822B2

公开(公告)日：2011-02-15

申请号：US11731392

申请日：2007-03-30

Applicant: Arash Behziz ,  Grady Borders

Inventor： Arash Behziz ,  Grady Borders

IPC: G11C29/00 ,  G01R31/28 ,  G01R31/26

CPC classification number: G01R31/31922 ,  G01R31/3191 ,  G01R31/31919 ,  G01R31/31937

Abstract: In one implementation, a method of testing multiple DUTs using a single tester channel is provided which includes providing an input signal with the single tester channel simultaneously to each of the DUTs. The method further includes providing a clock signal to each of the DUTs. The clock signal provided to each of the DUTs may be successively delayed clock signals, which are provided to successive DUTs. The method includes using the clock signal to cause a next DUTs to provide an output transition before an output of a prior DUT is returned to a pre-transition state. The method further includes detecting with the single tester channel the output transition of each of the DUTs in response to the input signal and the clock signal.

Abstract translation: 在一个实现中，提供了使用单个测试器通道来测试多个DUT的方法，其包括向每个DUT同时提供具有单个测试器通道的输入信号。 该方法还包括向每个DUT提供时钟信号。 提供给每个DUT的时钟信号可以是连续延迟的时钟信号，其提供给连续的DUT。 该方法包括使用时钟信号使得下一个DUT在先前DUT的输出返回到转换前状态之前提供输出转换。 该方法还包括响应于输入信号和时钟信号，用单个测试器通道检测每个DUT的输出转换。

公开(公告)号：US07649375B2

公开(公告)日：2010-01-19

申请号：US11474921

申请日：2006-06-26

Applicant: Arash Behziz ,  Roya Yaghmai

Inventor： Arash Behziz ,  Roya Yaghmai

IPC: G01R31/26 ,  G01R31/28

CPC classification number: H05K1/115 ,  G01R31/2889 ,  H05K3/3421 ,  H05K3/4602 ,  H05K2201/049 ,  H05K2201/09472 ,  H05K2201/09481 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/09627 ,  H05K2201/10189 ,  Y10T29/49165

Abstract: In one embodiment, a laminated printed circuit board translator is provided. In some embodiments, the translator includes a receiving board adapted to receive a pin, the receiving board includes a plated via extending through the receiving board and has a hole for receiving a pin. An interface board laminated with the receiving board has a controlled depth via extending through it to contact a conductive trace. The conductive trace extends between the receiving board and the interface board to connect the plated via of the receiving board with the controlled depth via of the interface board. The controlled depth via is configured so that it is capable of being plated through a single sided drilled opening in the interface board. Some embodiments have a pad on the interface board connected to the controlled depth via.

Abstract translation: 在一个实施例中，提供了层压印刷电路板转换器。 在一些实施例中，翻译器包括适于接收销的接收板，接收板包括延伸穿过接收板的电镀通孔，并具有用于接收销的孔。 与接收板层压的接口板具有通过其延伸的受控深度以接触导电迹线。 导电迹线在接收板和接口板之间延伸，以将接收板的电镀通孔与接口板的受控深度通孔连接。 受控深度通孔被配置成能够通过接口板中的单面钻孔而进行电镀。 一些实施例在接口板上具有连接到受控深度通孔的垫。

公开(公告)号：US20070096756A1

公开(公告)日：2007-05-03

申请号：US11262001

申请日：2005-10-28

Applicant: Frank Parrish ,  Arash Behziz

Inventor： Frank Parrish ,  Arash Behziz

IPC: G01R31/02

CPC classification number: G01R31/2889 ,  G01R1/07378

Abstract: A device for interfacing a test head and a prober is disclosed using wires or cables to provide the connection from a probe card interface boards to the probe card. The use of wires or cables, in place of the traditional pogo pin arrangement allows for more reliable and efficient testing, as well as additional high performance tests to be run. Optionally, a probe interface contains a stiffening member with multiple sidewalks and individual, configuration-specific probe card interface strips are connected to a probe card through zero insertion force clamps. The probe card interface attaches to the test head using standard probe interface board (“PIB”) docking mechanics. The assembly is then connected to a probe to carry out the testing procedures.

Abstract translation: 使用电线或电缆公开了用于连接测试头和探测器的装置，以提供从探针卡接口板到探针卡的连接。 使用电线或电缆代替传统的pogo引脚布置，可以进行更可靠和高效的测试，以及进行额外的高性能测试。 可选地，探针接口包含具有多个人行道的加强构件，并且单独的配置专用探针卡接口条通过零插入力夹具连接到探针卡。 探头卡接口使用标准探头接口板（“PIB”）对接机构连接到测试头。 然后将组件连接到探头以执行测试程序。

公开(公告)号：US06515499B1

公开(公告)日：2003-02-04

申请号：US09676041

申请日：2000-09-28

Applicant: Frank Parrish ,  Arash Behziz ,  Arthur E. LeColst ,  Derek Castellano ,  Donald Eric Thompson ,  Jonathan M. Becker

Inventor： Frank Parrish ,  Arash Behziz ,  Arthur E. LeColst ,  Derek Castellano ,  Donald Eric Thompson ,  Jonathan M. Becker

IPC: G01R3102

CPC classification number: G01R1/07378

Abstract: A tester interface assembly is disclosed for coupling a plurality of tester electronic channels to a device-interface-board. The tester interface assembly includes at least one harness assembly having a plurality of coaxial cables, each cable including a body having a center conductor and a shield. The shield is formed coaxially around the center conductor and separated therefrom by a layer of dielectric. Each cable further includes a distal tip formed substantially similar to the body and including respective formed conductive pads disposed on the distal extremities of the center conductor and the shield. The harness employs a housing formed with an internal cavity for receiving and securing the cable distal ends in close-spaced relationship such that the distal tips form an interface engagement plane. A compliant interconnect is interposed between the harness assembly and the device-interface-board, and includes a plurality of conductors formed to engage the cable distal ends along the engagement plane.

Abstract translation: 公开了用于将多个测试仪电子通道耦合到设备接口板的测试器接口组件。 测试器接口组件包括至少一个具有多个同轴电缆的线束组件，每个电缆包括具有中心导体和屏蔽的主体。 屏蔽层同轴地形成在中心导体周围并与电介质层分离。 每个电缆还包括形成为基本上类似于主体并且包括设置在中心导体和屏蔽件的远端上的各自形成的导电焊盘的远端。 线束采用形成有内腔的壳体，用于以紧密隔开的关系接收和固定电缆远端，使得远端尖端形成界面接合平面。 柔性互连被插入在线束组件和器件接口板之间，并且包括多个导体，其形成为沿着接合平面接合电缆远端。

公开(公告)号：US08696378B2

公开(公告)日：2014-04-15

申请号：US13404862

申请日：2012-02-24

Applicant: Arash Behziz ,  Dustin Grant Rowe

Inventor： Arash Behziz ,  Dustin Grant Rowe

IPC: H01R12/24

CPC classification number: H01R12/53 ,  H01R9/034 ,  H05K1/0218 ,  H05K1/117 ,  H05K3/325 ,  H05K2201/09618 ,  H05K2201/09845 ,  H05K2201/10356

Abstract: An electrical connector assembly including a printed circuit board that has base and cover layers of dielectric material and first and second ground planes of conductive material. The base and cover layers are stacked relative to each other and located between the first and second ground planes. The base layer has a conductor-receiving portion that extends beyond the cover layer. The circuit board also includes signal traces that are exposed to an open space that exists above the conductor-receiving portion. The connector assembly also includes a compression component that is configured to be positioned in the open space to press wire-terminating ends of signal conductors onto the signal traces at the conductor-receiving portion.

Abstract translation: 一种电连接器组件，包括具有介电材料的基底和覆盖层以及导电材料的第一和第二接地平面的印刷电路板。 底层和覆盖层相对于彼此堆叠并位于第一和第二接地平面之间。 基层具有延伸超过覆盖层的导体接收部分。 电路板还包括暴露于存在于导体接收部分之上的开放空间的信号迹线。 连接器组件还包括被配置为定位在开放空间中的压缩部件，以将信号导体的线端部按压到导体接收部分处的信号迹线上。

公开(公告)号：US08308491B2

公开(公告)日：2012-11-13

申请号：US13081000

申请日：2011-04-06

Applicant: Robert Paul Nichols ,  Brian Patrick Costello ,  Keith McQuilkin Murr ,  Arash Behziz ,  Scott D. Spicer ,  Richard Elof Hamner ,  Jason M'Cheyne Reisinger

Inventor： Robert Paul Nichols ,  Brian Patrick Costello ,  Keith McQuilkin Murr ,  Arash Behziz ,  Scott D. Spicer ,  Richard Elof Hamner ,  Jason M'Cheyne Reisinger

IPC: H01R12/00

CPC classification number: H01R12/73 ,  H01R24/40

Abstract: A connector assembly includes a connector housing configured to be coupled to a primary circuit board. A connector is held within the connector housing. The connector has a connector circuit board having a mating surface and a cable surface. The mating surface has mating contacts configured to be mated to corresponding mating contacts of a secondary circuit board. The cable surface has cable contacts. Cables extend between a first end and a second end. The first end of each cable is coupled to corresponding cable contacts of the connector circuit board. The second end of each cable is configured to be coupled to a cable contact on the primary circuit board or a second connector assembly on the primary circuit board.

Abstract translation: 连接器组件包括被配置为耦合到主电路板的连接器壳体。 连接器被保持在连接器壳体内。 连接器具有具有配合表面和电缆表面的连接器电路板。 配合表面具有被配置为与第二电路板的对应配合触点配合的配合触头。 电缆表面有电缆接触。 电缆在第一端和第二端之间延伸。 每个电缆的第一端连接到连接器电路板的相应电缆触头。 每个电缆的第二端被配置为耦合到主电路板上的电缆触点或主电路板上的第二连接器组件。

公开(公告)号：US20120258612A1

公开(公告)日：2012-10-11

申请号：US13081000

申请日：2011-04-06

Applicant: ROBERT PAUL NICHOLS ,  BRIAN PATRICK COSTELLO ,  KEITH MCQUILKIN MURR ,  ARASH BEHZIZ ,  SCOTT D. SPICER ,  RICHARD ELOF HAMNER ,  JASON M'CHEYNE REISINGER

Inventor： ROBERT PAUL NICHOLS ,  BRIAN PATRICK COSTELLO ,  KEITH MCQUILKIN MURR ,  ARASH BEHZIZ ,  SCOTT D. SPICER ,  RICHARD ELOF HAMNER ,  JASON M'CHEYNE REISINGER

IPC: H01R12/70

CPC classification number: H01R12/73 ,  H01R24/40

Abstract: A connector assembly includes a connector housing configured to be coupled to a primary circuit board. A connector is held within the connector housing. The connector has a connector circuit board having a mating surface and a cable surface. The mating surface has mating contacts configured to be mated to corresponding mating contacts of a secondary circuit board. The cable surface has cable contacts. Cables extend between a first end and a second end. The first end of each cable is coupled to corresponding cable contacts of the connector circuit board. The second end of each cable is configured to be coupled to a cable contact on the primary circuit board or a second connector assembly on the primary circuit board.

Abstract translation: 连接器组件包括被配置为耦合到主电路板的连接器壳体。 连接器被保持在连接器壳体内。 连接器具有具有配合表面和电缆表面的连接器电路板。 配合表面具有被配置为与第二电路板的对应配合触点配合的配合触头。 电缆表面有电缆接触。 电缆在第一端和第二端之间延伸。 每个电缆的第一端连接到连接器电路板的相应电缆触头。 每个电缆的第二端被配置为耦合到主电路板上的电缆触点或主电路板上的第二连接器组件。

公开(公告)号：US20090225526A1

公开(公告)日：2009-09-10

申请号：US12195928

申请日：2008-08-21

Applicant: Arash BEHZIZ

Inventor： Arash BEHZIZ

IPC: H05K7/06 ,  H05K3/30 ,  H05K3/34

CPC classification number: H05K1/0243 ,  H01R9/0515 ,  H01R43/0221 ,  H01R43/205 ,  H05K3/301 ,  H05K3/328 ,  H05K3/3421 ,  H05K2201/09809 ,  H05K2201/1031 ,  H05K2201/10356 ,  Y02P70/611 ,  Y10T29/4913 ,  Y10T29/49144

Abstract: Methods and apparatus are provided for securely and cost effectively attaching one or more shielded cables to a planar substrate. A cable assembly includes a printed circuit board (PCB) coupled to a distal end of the one or more shielded cables. Perpendicular alignment of the distal cable ends promotes a dense array that is achieved using angular mounting brackets for coupling cable shields to electrical contacts on an engagement surface of the PCB. Mounting brackets are attached between the cable shield and shield contacts using electrically conductive attachment techniques including soldering and laser welding. The PCB also includes one or more signal contacts for each cable. Distal ends of the internal conductors are each bent about 90 degrees from the vertical cable axis to align with the horizontal engagement surface. Internal conductors are surface mounted to their respective signal contact using one or more of soldering and laser welding.

Abstract translation: 提供了方法和装置，用于将一个或多个屏蔽电缆安全且成本有效地连接到平面基板。 电缆组件包括耦合到一个或多个屏蔽电缆的远端的印刷电路板（PCB）。 远端电缆端部的垂直对准促进了使用角度安装支架实现的密集阵列，用于将电缆屏蔽件耦合到PCB接合表面上的电触点。 使用导电附件技术（包括焊接和激光焊接）将安装支架连接在电缆屏蔽和屏蔽触点之间。 PCB还包括每个电缆的一个或多个信号触点。 内部导体的末端各自从垂直电缆轴线弯曲约90度，以与水平接合表面对准。 使用焊接和激光焊接中的一个或多个将内部导体表面安装到它们各自的信号触点。

公开(公告)号：US07504822B2

公开(公告)日：2009-03-17

申请号：US11262001

申请日：2005-10-28

Applicant: Frank B. Parrish ,  Arash Behziz

Inventor： Frank B. Parrish ,  Arash Behziz

IPC: G01R31/02

CPC classification number: G01R31/2889 ,  G01R1/07378

Abstract: A device for interfacing a test head and a prober is disclosed using wires or cables to provide the connection from a probe card interface boards to the probe card. The use of wires or cables, in place of the traditional pogo pin arrangement allows for more reliable and efficient testing, as well as additional high performance tests to be run. Optionally, a probe interface contains a stiffening member with multiple sidewalks and individual, configuration-specific probe card interface strips are connected to a probe card through zero insertion force clamps. The probe card interface attaches to the test head using standard probe interface board (“PIB”) docking mechanics. The assembly is then connected to a probe to carry out the testing procedures.

Abstract translation: 使用电线或电缆公开了用于连接测试头和探测器的装置，以提供从探针卡接口板到探针卡的连接。 使用电线或电缆代替传统的pogo引脚布置，可以进行更可靠和高效的测试，以及进行额外的高性能测试。 可选地，探针接口包含具有多个人行道的加强构件，并且单独的配置专用探针卡接口条通过零插入力夹具连接到探针卡。 探头卡接口使用标准探头接口板（“PIB”）对接机构连接到测试头。 然后将组件连接到探头以执行测试程序。

公开(公告)号：US07180321B2

公开(公告)日：2007-02-20

申请号：US11235951

申请日：2005-09-27

Applicant: Arash Behziz ,  Keith Breinlinger ,  David Evans ,  Frank Parrish

Inventor： Arash Behziz ,  Keith Breinlinger ,  David Evans ,  Frank Parrish

IPC: G01R31/26

CPC classification number: H05K1/0243 ,  G01R31/2889 ,  H05K3/3447 ,  H05K3/368 ,  H05K2201/09809 ,  H05K2201/10356 ,  H05K2201/10666

Abstract: In one embodiment, a tester interface module for connecting a plurality of signal paths from at least one electronic assembly to at least one other electronic assembly is provided. The interface module includes a capture board having center conductor vias with center conductor holes extending through the capture board. Axial cables secured to the capture board have center conductors extending at least part way through a corresponding center conductor hole of the center conductor via. An interface component is adjacent to the capture board, the conductor paths being conductively bonded to the conductor vias of the capture board so as to electrically connect center conductors to corresponding conductor paths. The conductor paths of the interface component are arranged to allow connection with an electronic assembly.

Abstract translation: 在一个实施例中，提供了用于将多个信号路径从至少一个电子组件连接到至少一个其它电子组件的测试器接口模块。 接口模块包括具有中心导体通孔的捕获板，中心导体孔延伸穿过捕获板。 固定到捕获板的轴向电缆具有至少部分地延伸穿过中心导体通孔的相应中心导体孔的中心导体。 接口部件与捕获板相邻，导体路径导电地接合到捕获板的导体通孔，以将中心导体电连接到相应的导体路径。 接口部件的导体路径被布置成允许与电子组件的连接。