Abstract:
A backside illuminated image sensor includes an isolation structure passing through a substrate, a sensor element formed overlying the front surface of the substrate, and a color filter formed overlying the back surface of the substrate.
Abstract:
A system and a method for promoting multi-layer forwarding messages are provided. An embodiment of the method for use in an advertisement server system includes the following steps. At least one feedback message is received, wherein each of the at least one feedback message includes a forwarding user identifier and a user identifier of a corresponding first receiving device, and the advertisement server system interprets the at least one feedback message as a first-layer forwarding of an advertisement message associated with the forwarding user identifier. The forwarding number of the first-layer forwarding of the advertisement message is stored according to at least one feedback message of the first-layer forwarding of the advertisement message. An encouraging message is sent to a forwarding mobile device of the forwarding user identifier, wherein the encouraging message includes information based on a forwarding weight is determined according to at least the forwarding number.
Abstract:
The present invention discloses an automatic ultrasonic and computer-vision navigation device and a method using the same. In the method of the present invention, the user guides an automatic navigation device to learn and plan a navigation path; next, the automatic navigation device navigates independently and uses ultrasonic signals and computer vision to detect the environment; then, the automatic navigation device compares the detected environment data with the navigation path to amend the physical movement track. The present invention enables ordinary persons to interact with the automatic navigation device without operating the computer. As the present invention adopts computer vision and ultrasonic signals to realize the functions thereof, the manufacturers can save the hardware cost.
Abstract:
A method for depositing a polysilazane on a semiconductor wafer is provided. The method includes steps of disposing a silazane onto the semiconductor wafer, and heating the silazane to form the polysilazane on the semiconductor wafer. An apparatus for preparing a polysilazane on a semiconductor wafer is also provided.
Abstract:
A method for depositing a polysilazane on a semiconductor wafer is provided. The method includes steps of disposing a silazane onto the semiconductor wafer, and heating the silazane to form the polysilazane on the semiconductor wafer. An apparatus for preparing a polysilazane on a semiconductor wafer is also provided.
Abstract:
One of the broader forms of the present disclosure involves a method of enhanced defect inspection. The method includes providing a substrate having defect particles and providing a fluid over the substrate and the defect particles, the fluid having a refractive index greater than air. The method further includes exposing the substrate and the defect particles to incident radiation through the fluid, and detecting, through the fluid, radiation reflected or scattered by the defect particles.
Abstract:
One of the broader forms of the present disclosure involves a method of enhanced defect inspection. The method includes providing a substrate having defect particles and providing a fluid over the substrate and the defect particles, the fluid having a refractive index greater than air. The method further includes exposing the substrate and the defect particles to incident radiation through the fluid, and detecting, through the fluid, radiation reflected or scattered by the defect particles.
Abstract:
A method for fabricating a integrated circuit with improved performance is disclosed. The method comprises providing a substrate; performing a plurality of processes to form a gate stack over the substrate, wherein the gate stack comprises a gate layer; measuring a grain size of the gate layer after at least one of the plurality of processes; determining whether the measured grain size is within a target range; and modifying a recipe of at least one of the plurality of processes if the measured grain size of the gate layer is not within the target range.
Abstract:
Provided is a method of fabricating a backside illuminated image sensor that includes providing a device substrate having a frontside and a backside, where pixels are formed at the frontside and an interconnect structure is formed over pixels, forming a re-distribution layer (RDL) over the interconnect structure, bonding a first glass substrate to the RDL, thinning and processing the device substrate from the backside, bonding a second glass substrate to the backside, removing the first glass substrate, and reusing the first glass substrate for fabricating another backside-illuminated image sensor.
Abstract:
A method for performing a CMOS Image Sensor (CIS) silicide process is provided to reduce pixel contact resistance. In one embodiment, the method comprises forming a Resist Protect Oxide (RPO) layer on the CIS, forming a Contact Etch Stop Layer (CESL), forming an Inter-Layer Dielectric (ILD) layer, performing contact lithography/etching, performing Physical Vapor Deposition (PVD) at a pixel contact hole area, annealing for silicide formation at pixel contact hole area, performing contact filling, and defining the first metal layer. The Resist Protect Oxide (RPO) layer can be formed without using a photo mask of Cell Resist Protect Oxide (CIRPO) photolithography for pixel array and/or without silicide process at pixel array. The method can include implanting N+ or P+ for pixel contact plugs at the pixel contact hole area. The contact filling can comprise depositing contact glue plugs and performing Chemical Mechanical Polishing (CMP).