公开(公告)号：US12136552B2

公开(公告)日：2024-11-05

申请号：US17457764

申请日：2021-12-06

Applicant: ASM IP HOLDING B.V.

Inventor： Andrea Illiberi ,  Varun Sharma ,  Michael Givens ,  Marko Tuominen ,  Shaoren Deng

IPC: H01L21/311 ,  C23C16/04 ,  C23C16/455 ,  C23C16/46 ,  C23C16/56 ,  H01L21/02

Abstract: The current disclosure generally relates to the manufacture of semiconductor devices. Specifically, the disclosure relates to methods of depositing a layer on a substrate comprising a recess. The method comprises providing the substrate comprising a recess in a reaction chamber, depositing inhibition material on the substrate to fill the recess with inhibition material, removing the inhibition material from the substrate for exposing a deposition area and depositing a layer on the deposition area by a vapor deposition process. A vapor deposition assembly for performing the method is also disclosed.

公开(公告)号：US20220181163A1

公开(公告)日：2022-06-09

申请号：US17457764

申请日：2021-12-06

Applicant: ASM IP HOLDING B.V.

Inventor： Andrea Illiberi ,  Varun Sharma ,  Michael Givens ,  Marko Tuominen ,  Shaoren Deng

IPC: H01L21/311 ,  H01L21/02 ,  C23C16/04 ,  C23C16/455 ,  C23C16/46 ,  C23C16/56

Abstract: The current disclosure generally relates to the manufacture of semiconductor devices. Specifically, the disclosure relates to methods of depositing a layer on a substrate comprising a recess. The method comprises providing the substrate comprising a recess in a reaction chamber, depositing inhibition material on the substrate to fill the recess with inhibition material, removing the inhibition material from the substrate for exposing a deposition area and depositing a layer on the deposition area by a vapor deposition process. A vapor deposition assembly for performing the method is also disclosed.

公开(公告)号：US09711350B2

公开(公告)日：2017-07-18

申请号：US14729510

申请日：2015-06-03

Applicant: ASM IP Holding B.V.

Inventor： Qi Xie ,  Fu Tang ,  Michael Givens ,  Petri Raisanen ,  Jan Willem Maes

IPC: H01L21/31 ,  H01L21/469 ,  H01L21/02 ,  H01L29/16 ,  H01L29/20 ,  H01L29/10 ,  H01L21/28 ,  H01L29/51

CPC classification number: H01L21/02247 ,  H01L21/02112 ,  H01L21/02205 ,  H01L21/02249 ,  H01L21/02255 ,  H01L21/0228 ,  H01L21/02301 ,  H01L21/2807 ,  H01L29/1033 ,  H01L29/16 ,  H01L29/20 ,  H01L29/518

Abstract: In some embodiments, a semiconductor surface having a high mobility semiconductor may be effectively passivated by nitridation, preferably using hydrazine, a hydrazine derivative, or a combination thereof. The surface may be the semiconductor surface of a transistor channel region. In some embodiments, a semiconductor surface oxide layer is formed at the semiconductor surface and the passivation is accomplished by forming a semiconductor oxynitride layer at the surface, with the nitridation contributing nitrogen to the surface oxide to form the oxynitride layer. The semiconductor oxide layer may be deposited by atomic layer deposition (ALD) and the nitridation may also be conducted as part of the ALD.

公开(公告)号：US20160358835A1

公开(公告)日：2016-12-08

申请号：US15169430

申请日：2016-05-31

Applicant: ASM IP Holding B.V.

Inventor： Qi Xie ,  Fu Tang ,  Michael Givens ,  Petri Raisanen ,  Jan Willem Maes ,  Xiaoqiang Jiang

IPC: H01L23/31 ,  H01L29/161 ,  H01L29/51 ,  C23C16/52 ,  H01L21/02 ,  C23C16/40 ,  C23C16/30 ,  C23C16/455 ,  H01L29/10 ,  H01L21/28

CPC classification number: H01L23/3171 ,  C23C16/0218 ,  C23C16/403 ,  C23C16/405 ,  H01L21/02112 ,  H01L21/0228 ,  H01L21/02299 ,  H01L21/02304 ,  H01L21/28255 ,  H01L21/306 ,  H01L21/3105 ,  H01L29/1054 ,  H01L29/16 ,  H01L29/161 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518

Abstract: In some embodiments, a semiconductor surface may be effectively passivated by nitridation, preferably using hydrazine, a hydrazine derivative, or a combination thereof. The surface may be the semiconductor surface of a transistor channel region. In some embodiments, native oxide is removed from the semiconductor surface and the surface is subsequently nitrided. In some other embodiments, a semiconductor surface oxide layer is formed at the semiconductor surface and the passivation is accomplished by forming a semiconductor oxynitride layer at the surface, with the nitridation contributing nitrogen to the surface oxide to form the oxynitride layer. The semiconductor oxide layer may be deposited by atomic layer deposition (ALD) and the nitridation may also be conducted as part of the ALD.

Abstract translation: 在一些实施方案中，可以通过氮化，优选使用肼，肼衍生物或其组合来有效地钝化半导体表面。 该表面可以是晶体管沟道区的半导体表面。 在一些实施方案中，将天然氧化物从半导体表面上除去，随后将表面氮化。 在一些其它实施例中，在半导体表面形成半导体表面氧化物层，并且通过在表面形成半导体氮氧化物层来实现钝化，其中氮化对表面氧化物产生氮以形成氧氮化物层。 半导体氧化物层可以通过原子层沉积（ALD）沉积，并且氮化也可以作为ALD的一部分进行。

公开(公告)号：US09461134B1

公开(公告)日：2016-10-04

申请号：US14717553

申请日：2015-05-20

Applicant: ASM IP Holding B.V.

Inventor： Qi Xie ,  Fu Tang ,  Petri Raisanen ,  Jacob Woodruff ,  Jan Willem Maes ,  Michael Givens

IPC: H01L21/44 ,  H01L29/45 ,  H01L21/02 ,  H01L21/285 ,  H01L29/16 ,  H01L29/08 ,  H01L29/66 ,  H01L23/31 ,  H01L23/29

CPC classification number: H01L29/45 ,  H01L21/02186 ,  H01L21/0228 ,  H01L21/285 ,  H01L21/76831 ,  H01L23/291 ,  H01L23/485 ,  H01L29/0847 ,  H01L29/0895 ,  H01L29/16 ,  H01L29/66477 ,  H01L29/66568 ,  H01L29/78

Abstract: In some embodiments, an MIS-type contact structure is formed by passivating the semiconductor surface of a source/drain region with a chalcogen, and subsequently depositing an tunnel layer by first exposing the chalcogen-passivated surface to a metal-organic precursor. Subsequently, deposition of the tunnel layer continues to a desired thickness. Preferably, the metal-organic precursor is part of a first set of ALD precursors and a second set of ALD precursors, which include one or more metal or semimetal precursors, are subsequently used to continue the deposition. For example, the metal-organic precursor may be used to deposit a first portion of the tunnel layer, and an inorganic metal or inorganic semimetal precursor or a different organic metal or organic semimetal precursor may be used to deposit a second portion of the tunnel layer. A metal is subsequently deposited on the tunnel layer, e.g., to form a metal electrode or electrical contact.

Abstract translation: 在一些实施例中，通过用硫族元素钝化源极/漏极区域的半导体表面并随后通过首先将硫属软化钝化表面暴露于金属 - 有机前体而沉积隧道层来形成MIS型接触结构。 随后，隧道层的沉积继续到期望的厚度。 优选地，金属 - 有机前体是第一组ALD前体的一部分，并且随后使用包括一种或多种金属或半金属前体的第二组ALD前体来继续沉积。 例如，金属有机前体可以用于沉积隧道层的第一部分，并且可以使用无机金属或无机半金属前体或不同的有机金属或有机半金属前体来沉积隧道层的第二部分 。 随后在隧道层上沉积金属，例如形成金属电极或电接触。

公开(公告)号：US09385164B2

公开(公告)日：2016-07-05

申请号：US14256728

申请日：2014-04-18

Applicant: ASM IP Holding B.V.

Inventor： Qi Xie ,  Vladimir Machkaoutsan ,  Jan Willem Maes ,  Michael Givens ,  Petri Raisanen

IPC: H01L21/8242 ,  H01L27/24 ,  H01L45/00 ,  G11C13/00

CPC classification number: H01L27/2481 ,  G11C13/0007 ,  G11C2213/71 ,  H01L45/08 ,  H01L45/085 ,  H01L45/146 ,  H01L45/16 ,  H01L45/1616 ,  H01L45/1641

Abstract: A method for forming a resistive random access memory (RRAM) device is disclosed. The method comprises forming a first electrode, forming a resistive switching oxide layer comprising a metal oxide by thermal atomic layer deposition (ALD), doping the resistive switching oxide layer with a metal dopant different from metal forming the metal oxide, and forming a second electrode by thermal atomic layer deposition (ALD), where the resistive switching layer is interposed between the first electrode and the second electrode. In some embodiments, forming the resistive switching oxide may be performed without exposing a surface of the switching oxide layer to a surface-modifying plasma treatment after depositing the metal oxide.

Abstract translation: 公开了一种形成电阻随机存取存储器（RRAM）装置的方法。 该方法包括：形成第一电极，通过热原子层沉积（ALD）形成包含金属氧化物的电阻式开关氧化物层，用与形成金属氧化物的金属不同的金属掺杂剂掺杂电阻式开关氧化物层，以及形成第二电极 通过热原子层沉积（ALD），其中电阻式开关层介于第一电极和第二电极之间。 在一些实施例中，在沉积金属氧化物之后，可以进行形成电阻式开关氧化物而不使开关氧化物层的表面暴露于表面改性等离子体处理。

公开(公告)号：US20160118261A1

公开(公告)日：2016-04-28

申请号：US14919180

申请日：2015-10-21

Applicant: ASM IP Holding B.V.

Inventor： Suvi Haukka ,  Michael Givens ,  Eric Shero ,  Jerry Winkler ,  Petri Räisänen ,  Timo Asikainen ,  Chiyu Zhu ,  Jaakko Anttila

IPC: H01L21/285 ,  H01L29/49

CPC classification number: H01L29/4966 ,  C23C16/06 ,  C23C16/34 ,  C23C16/45523 ,  C23C16/45525 ,  C23C16/45531 ,  H01L21/28562 ,  H01L21/32051 ,  H01L29/517

Abstract: A process for depositing titanium aluminum or tantalum aluminum thin films comprising nitrogen on a substrate in a reaction space can include at least one deposition cycle. The deposition cycle can include alternately and sequentially contacting the substrate with a vapor phase Ti or Ta precursor and a vapor phase Al precursor. At least one of the vapor phase Ti or Ta precursor and the vapor phase Al precursor may contact the substrate in the presence of a vapor phase nitrogen precursor.

Abstract translation: 在反应空间中在基板上沉积包含氮的钛铝或钽铝薄膜的方法可以包括至少一个沉积循环。 沉积循环可以包括交替地和顺序地接触基底与气相Ti或Ta前体和气相Al前体。 气相Ti或Ta前体和气相Al前体中的至少一种可以在气相氮前体存在下与基底接触。

公开(公告)号：US20140159170A1

公开(公告)日：2014-06-12

申请号：US14183187

申请日：2014-02-18

Applicant: ASM IP Holding B.V.

Inventor： Petri Raisanen ,  Michael Givens ,  Mohith Verghese

IPC: H01L29/51 ,  H01L21/02

CPC classification number: H01L21/02233 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/02172 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/02183 ,  H01L21/02186 ,  H01L21/02189 ,  H01L21/02192 ,  H01L21/02197 ,  H01L21/022 ,  H01L21/0223 ,  H01L21/02236 ,  H01L21/02238 ,  H01L21/02247 ,  H01L21/02249 ,  H01L21/02252 ,  H01L21/0228 ,  H01L21/02304 ,  H01L21/02315 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/28211 ,  H01L22/12 ,  H01L22/20 ,  H01L29/511 ,  H01L29/512 ,  H01L29/513 ,  H01L29/517

Abstract: Embodiments related to methods for forming a film stack on a substrate are provided. One example method comprises exposing the substrate to an activated oxygen species and converting an exposed surface of the substrate into a continuous monolayer of a first dielectric material. The example method also includes forming a second dielectric material on the continuous monolayer of the first dielectric material without exposing the substrate to an air break.

Abstract translation: 提供了与在衬底上形成膜堆叠的方法相关的实施例。 一个示例性方法包括将基底暴露于活化氧物质并将基底的暴露表面转化为第一介电材料的连续单层。 该示例性方法还包括在第一介电材料的连续单层上形成第二介电材料，而不将基板暴露于空气断裂。

公开(公告)号：US20250105012A1

公开(公告)日：2025-03-27

申请号：US18896482

申请日：2024-09-25

Applicant: ASM IP Holding B.V.

Inventor： Charles Dezelah ,  Giueseppe Alessio Verni ,  Petro Deminskyi ,  Balaji Kannan ,  Eric Jen cheng Liu ,  Fu Tang ,  Michael Givens ,  Eric James Shero

IPC: H01L21/28

Abstract: Aspects of the disclosure relate to the field of semiconductor devices, including methods and systems for manufacturing semiconductor devices. More particularly, semiconductor structures comprise a dipole layer, which can be formed from a metal and carbon containing layer. Further described are related methods, deposition systems, and devices.

公开(公告)号：US12227835B2

公开(公告)日：2025-02-18

申请号：US18050114

申请日：2022-10-27

Applicant: ASM IP Holding, B.V.

Inventor： Viraj Madhiwala ,  Daniele Chiappe ,  Eva Tois ,  Marko Tuominen ,  Charles Dezelah ,  Shaoren Deng ,  Anirudhan Chandrasekaran ,  YongGyu Han ,  Michael Givens ,  Andrea Illiberi ,  Vincent Vandalon

IPC: C23C16/00 ,  C23C16/40 ,  C23C16/455 ,  H01J37/32

Abstract: Methods and vapor deposition assemblies of selectively depositing material comprising silicon and oxygen on a first surface of a substrate relative to a second surface of the substrate by a cyclic deposition process are disclosed. The methods comprise providing a substrate into a reaction chamber, providing a metal or metalloid catalyst into the reaction chamber in a vapor phase, providing a silicon precursor comprising an alkoxy silane compound into the reaction chamber in a vapor phase and providing a plasma into the reaction chamber to form a reactive species for forming a material comprising silicon and oxygen on the first surface. The methods may comprise subcycles for, for example, adjusting the proportions of material components.