公开(公告)号：US20170113922A1

公开(公告)日：2017-04-27

申请号：US14923602

申请日：2015-10-27

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Ching-Han HUANG ,  Hsun-Wei CHAN ,  Yu-Hsuan TSAI

IPC: B81B7/00 ,  B81C1/00

CPC classification number: B81B7/0067 ,  B81B2201/0292 ,  B81C1/00317 ,  B81C2203/0109 ,  H01L31/0203 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2924/16151 ,  H01L2924/16195 ,  H01L2924/00014

Abstract: A semiconductor device package includes a carrier, a sensor element disposed on or within the carrier, a cover and a filter. The cover includes a base substrate and a periphery barrier. The base substrate includes an inner sidewall. The inner sidewall of the base substrate defines a penetrating hole extending from a top surface of the base substrate to a bottom surface of the base substrate; at least a portion of the inner sidewall of the base substrate is tilted. The periphery barrier is coupled to the bottom surface of the base substrate and contacts a top surface of the carrier. The filter is disposed on the top surface of the base substrate and covers the penetrating hole.

公开(公告)号：US20250115473A1

公开(公告)日：2025-04-10

申请号：US18984988

申请日：2024-12-17

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsu-Liang HSIAO ,  Lu-Ming LAI ,  Ching-Han HUANG ,  Chia-Hung SHEN

IPC: H01L23/13 ,  H01L23/00 ,  H01L23/498 ,  H01L23/538 ,  H01L25/18

Abstract: At least some embodiments of the present disclosure relate to a semiconductor device package. The semiconductor device package includes a substrate with a first groove and a semiconductor device. The first groove has a first portion, a second portion, and a third portion, and the second portion is between the first portion and the third portion. The semiconductor device includes a membrane and is disposed on the second portion of the first groove. The semiconductor device has a first surface adjacent to the substrate and opposite to the membrane. The membrane is exposed by the first surface.

公开(公告)号：US20220068868A1

公开(公告)日：2022-03-03

申请号：US17521786

申请日：2021-11-08

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： An-Nong WEN ,  Ching-Han HUANG ,  Ching-Ho CHANG

IPC: H01L23/00 ,  B81B7/00 ,  B81C3/00

Abstract: A semiconductor package includes a first die having a first surface, a first conductive bump over the first surface and having first height and a first width, a second conductive bump over the first surface and having a second height and a second width. The first width is greater than the second width and the first height is substantially identical to the second height. A method for manufacturing the semiconductor package is also provided.

公开(公告)号：US20210202780A1

公开(公告)日：2021-07-01

申请号：US16732161

申请日：2019-12-31

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chi Sheng TSENG ,  Hui-Chung LIU ,  Ching-Han HUANG

IPC: H01L31/12 ,  H01L31/153 ,  H01L31/18

Abstract: An optical package structure includes a substrate, an emitter, a first detector and a light-absorption material. The substrate has a first surface and a second surface opposite to the first surface, the substrate includes a via defining a third surface extending from the first surface to the second surface. The emitter is disposed on the first surface of the substrate. The first detector is disposed on the first surface and aligned with the via of the substrate. The light-absorption material is disposed on the third surface of the substrate.

公开(公告)号：US20180334380A1

公开(公告)日：2018-11-22

申请号：US15599377

申请日：2017-05-18

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsu-Liang HSIAO ,  Lu-Ming LAI ,  Ching-Han HUANG ,  Chia-Hung SHEN

IPC: B81B3/00 ,  B81C3/00

CPC classification number: B81B3/0072 ,  B81B2203/0127 ,  B81B2203/0315 ,  B81B2203/033 ,  B81B2207/07 ,  B81C3/001 ,  B81C2201/013

Abstract: At least some embodiments of the present disclosure relate to a semiconductor device package. The semiconductor device package includes a substrate with a first groove and a semiconductor device. The first groove has a first portion, a second portion, and a third portion, and the second portion is between the first portion and the third portion. The semiconductor device includes a membrane and is disposed on the second portion of the first groove. The semiconductor device has a first surface adjacent to the substrate and opposite to the membrane. The membrane is exposed by the first surface.

公开(公告)号：US20180072563A1

公开(公告)日：2018-03-15

申请号：US15815432

申请日：2017-11-16

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Ching-Han HUANG ,  Hsun-Wei CHAN ,  Yu-Hsuan TSAI

IPC: B81B7/00 ,  H01L31/0203 ,  B81C1/00

Abstract: A semiconductor device package includes: (1) a carrier; (2) a sensor element disposed on or within the carrier; and (3) a cover including a top surface, a bottom surface and an inner sidewall, the inner sidewall defining a penetrating hole extending from the top surface to the bottom surface, and the penetrating hole exposing the sensor element. The semiconductor device package is characterized such that (i) the inner sidewall is divided into an upper portion and a lower portion, the upper portion is substantially perpendicular to the top surface, and the lower portion is tilted; or (ii) the entire inner sidewall is tilted. The lower portion of the inner sidewall or the entire inner sidewall is tilted at an angle of between about 10° to less than about 90°, relative to the top surface.

公开(公告)号：US20150091108A1

公开(公告)日：2015-04-02

申请号：US14500629

申请日：2014-09-29

Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, INC.

Inventor： Ching-Han HUANG ,  Lu-Ming LAI

IPC: B81B7/00 ,  B81C1/00

CPC classification number: B81B7/0061 ,  B81B7/0058 ,  B81B2201/0257 ,  B81B2207/012 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/49109 ,  H01L2924/00014

Abstract: The present disclosure provides a package structure and a manufacturing method. The package structure includes a substrate, a cover, a conductive pattern, and a sensing component. The cover is disposed on the substrate. The cover and the substrate define an accommodation space. The conductive pattern includes a conductive line. The conductive line is disposed on an internal surface of the cover exposed by the accommodation space, and is electrically connected to the substrate. The sensing component is disposed on the internal surface of the cover, and is electrically connected to the conductive line.

Abstract translation: 本公开提供了一种封装结构和制造方法。 封装结构包括基板，盖，导电图案和感测部件。 盖子设置在基板上。 盖和基板限定了容纳空间。 导电图案包括导线。 导电线设置在由容纳空间暴露的盖的内表面上，并且电连接到基板。 感测部件设置在盖的内表面上，并且电连接到导电线。