PROTECTIVE ELEMENT AND SUPPORT STRUCTURE
    16.
    发明申请
    PROTECTIVE ELEMENT AND SUPPORT STRUCTURE 审中-公开
    保护性元素和支持结构

    公开(公告)号:US20120024733A1

    公开(公告)日:2012-02-02

    申请号:US12845571

    申请日:2010-07-28

    Abstract: A protective apparatus is disclosed. The apparatus includes a protective element for positioning over at least a portion of a device to protect the device in a first configuration. A support structure integral with the protective element also forms part of the apparatus. The support structure is configured to support the device in a second configuration. In one arrangement, the protective element includes a first surface and a second surface in which the first surface is configured to be at least partially positioned over and to face the device in the first configuration. The second surface is positioned opposite to the first surface and is configured to be exposed to the environment external to the device in the first configuration. In another arrangement, the support structure includes a slot that runs along the second surface in which the slot is configured to receive the device in the second configuration.

    Abstract translation: 公开了一种保护装置。 该设备包括用于在设备的至少一部分上定位以保护设备处于第一配置的保护元件。 与保护元件成一体的支撑结构也构成装置的一部分。 支撑结构被配置为在第二配置中支撑设备。 在一种布置中,保护元件包括第一表面和第二表面,其中第一表面被构造成至少部分地位于第一构造中并面向设备。 第二表面与第一表面相对定位并且被配置为在第一配置中暴露于设备外部的环境。 在另一种布置中,支撑结构包括沿着第二表面延伸的槽,在该槽中槽被配置成在第二配置中接收装置。

    Timing signal generator providing synchronized timing signals at non-integer clock multiples adjustable by more than one period
    17.
    发明授权
    Timing signal generator providing synchronized timing signals at non-integer clock multiples adjustable by more than one period 有权
    定时信号发生器提供以不止一个周期调整的非整数时钟倍数的同步定时信号

    公开(公告)号:US07804349B2

    公开(公告)日:2010-09-28

    申请号:US12337999

    申请日:2008-12-18

    CPC classification number: G06F1/08 G01R31/31726

    Abstract: A system for providing a plurality of synchronous timing signals having period values that are not even multiples of the clock period including a plurality of local edge generators receiving the clock signals, each local generator including local programmable means to record an absolute time at which to generate a timing signal in the current or future period and the means to generate that timing signal at a synchronous even sub-division of the clock period resolution. A separate time value is maintained allowing generated timing signals to be delayed by more than one period. An output delay circuit generates the timing signal responsive to a future time value and a phase offset. The phase offset can be provided using a clock multiplier and serial parallel converter to simplify hardware realizations.

    Abstract translation: 一种用于提供多个同步定时信号的系统,其具有不包括接收时钟信号的多个本地边沿发生器的时钟周期的偶数倍的周期值,每个本地生成器包括本地可编程装置,以记录产生的绝对时间 当前或未来周期中的定时信号以及在时钟周期分辨率的同步偶分割时产生该定时信号的装置。 保持单独的时间值,允许产生的定时信号延迟多于一个周期。 输出延迟电路响应于未来时间值和相位偏移产生定时信号。 可以使用时钟乘法器和串行并行转换器来提供相位偏移,以简化硬件实现。

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