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    PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME
    11.
    发明申请
    PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME 有权
    印刷线路板及其制造方法

    公开(公告)号：US20140090878A1

    公开(公告)日：2014-04-03

    申请号：US14041858

    申请日：2013-09-30

    Applicant: Ibiden Co., Ltd.

    Inventor： Takema ADACHI

    IPC: H05K1/03 ,  H05K3/42 ,  H05K3/46

    CPC classification number: H05K1/036 ,  H05K3/427 ,  H05K3/429 ,  H05K3/4602 ,  H05K3/465 ,  H05K3/4676 ,  H05K2201/09854 ,  Y10T29/49165

    Abstract: A printed circuit board has a core substrate, a first conductive pattern on first surface of the substrate, a second conductive pattern on second surface of the substrate, and a through-hole conductor formed of plated material through the substrate such that the conductor is connecting the first and second patterns. The plated material is filling a through hole in the substrate, the substrate includes an insulation layer including inorganic fiber and resin, a first resin layer on one surface of the insulation layer and having the first surface of the substrate, and a second resin layer on the opposite surface of the insulation layer and having the second surface of the substrate, the first and second resin layers do not contain inorganic fiber material, and the sum of thicknesses of the first and second resin layers is set in the range of 20% or less of thickness of the substrate.

    Abstract translation: 印刷电路板具有芯基板，在基板的第一表面上的第一导电图案，在基板的第二表面上的第二导电图案，以及由电镀材料穿过基板形成的通孔导体，使得导体连接 第一和第二种模式。 电镀材料填充基板中的通孔，基板包括绝缘层，其包括无机纤维和树脂，在绝缘层的一个表面上具有第一树脂层并且具有基板的第一表面，以及第二树脂层， 绝缘层的相对表面并具有基板的第二表面，第一和第二树脂层不含有无机纤维材料，第一和第二树脂层的厚度之和设定在20％的范围内 衬底厚度较小。

    WIRING SUBSTRATE AND METHOD FOR MANUFACTURING WIRING SUBSTRATE
    12.
    发明申请
    WIRING SUBSTRATE AND METHOD FOR MANUFACTURING WIRING SUBSTRATE 有权

    公开(公告)号：US20220248531A1

    公开(公告)日：2022-08-04

    申请号：US17588414

    申请日：2022-01-31

    Applicant: IBIDEN CO., LTD.

    Inventor： Takema ADACHI ,  Daisuke MINOURA

    IPC: H05K1/11 ,  H05K3/38 ,  H05K1/09

    Abstract: A wiring substrate includes a first insulating layer, a first conductor layer, a second insulating layer, a second conductor layer, a connection conductor, and a coating film. The first conductor layer includes a conductor pad and a wiring pattern such that the conductor pad is formed in contact with the connection conductor and that the wiring pattern is covered by the coating film, the conductor pad has a surface facing the second insulating layer and having first surface roughness higher than surface roughness of a surface of the wiring pattern, and the coating film has opening exposing a portion of the surface of the conductor pad from the coating film and having area larger than area of interface between the conductor pad and the connection conductor and that the connection conductor is formed on the portion of the surface of the conductor pad and is separated from the coating film.

    WIRING SUBSTRATE AND METHOD FOR MANUFACTURING WIRING SUBSTRATE
    18.
    发明申请
    WIRING SUBSTRATE AND METHOD FOR MANUFACTURING WIRING SUBSTRATE 有权

    公开(公告)号：US20220077046A1

    公开(公告)日：2022-03-10

    申请号：US17446186

    申请日：2021-08-27

    Applicant: IBIDEN CO., LTD.

    Inventor： Takema ADACHI ,  Daisuke MINOURA

    IPC: H01L23/498 ,  H01L21/48

    Abstract: A wiring substrate includes a first conductor layer, an insulating layer on the first layer such that the insulating layer is covering the first layer, a second conductor layer on the insulating layer such that the insulating layer is formed between the first and second layers, the connection conductors penetrating through the insulating layer and connecting the first and second layers, and a coating film formed at least partially on surface of the first layer such that the film improves adhesion between the first layer and insulating layer. The first layer includes pads and wiring patterns such that the pads are in contact with the connection conductors and that the patterns have surfaces facing the insulating layer and covered by the film, and the pads have roughened surfaces facing the insulating layer and having first surface roughness that is higher than second surface roughness of the surfaces of the patterns.

    PRINTED WIRING BOARD
    19.
    发明申请
    PRINTED WIRING BOARD 审中-公开

    公开(公告)号：US20190215959A1

    公开(公告)日：2019-07-11

    申请号：US16245396

    申请日：2019-01-11

    Applicant: IBIDEN CO., LTD.

    Inventor： Takema ADACHI ,  Toshihide MAKINO ,  Hidetoshi NOGUCHI

    IPC: H05K1/11 ,  H05K3/46 ,  H05K3/40

    CPC classification number: H05K1/116 ,  H05K1/113 ,  H05K3/4015 ,  H05K3/4655 ,  H05K3/4688

    Abstract: A printed wiring board includes a core substrate, a first build-up layer, and a second build-up layer. The core substrate includes a core layer, through-hole conductors and through-hole lands. Metal foils of the through-hole lands in the core substrate have mat surfaces at interfaces of the core layer in the core substrate, metal foils of via lands in the build-up layers have inner mat surfaces at interfaces of insulating layers, and metal foils of outermost conductor layers in the build-up layers have outermost mat surfaces at interfaces of outermost insulating layers. Ten-point average roughness (RzI1) of the inner first mat surface is smaller than each of ten-point average roughness (Rz1, Rz2) of the mat surfaces and ten-point average roughness (RzO1, RzO2) of the outermost mat surfaces. Ten-point average roughness (RzI2) of the inner second mat surface is smaller than each of the ten-point average roughness (Rz1, Rz2, RzO1, RzO2).

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