公开(公告)号：US20180261571A1

公开(公告)日：2018-09-13

申请号：US15911868

申请日：2018-03-05

Applicant: Invensas Corporation

Inventor： Belgacem Haba ,  Kyong-Mo Bang

IPC: H01L25/065 ,  B81C1/00 ,  H01L25/10 ,  H01L23/00

CPC classification number: H01L25/0655 ,  B81C1/00301 ,  H01L23/13 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/367 ,  H01L24/13 ,  H01L24/16 ,  H01L24/20 ,  H01L24/48 ,  H01L24/49 ,  H01L24/96 ,  H01L25/0652 ,  H01L25/105 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/221 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48228 ,  H01L2224/4824 ,  H01L2224/49109 ,  H01L2224/4911 ,  H01L2224/96 ,  H01L2225/0651 ,  H01L2225/0652 ,  H01L2225/06524 ,  H01L2225/06548 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/18161 ,  H01L2924/18165 ,  H01L2924/19107 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: A microelectronic assembly includes a first microelectronic package having a substrate with first and second opposed surfaces and substrate contacts thereon. The first package further includes first and second microelectronic elements, each having element contacts electrically connected with the substrate contacts and being spaced apart from one another on the first surface so as to provide an interconnect area of the first surface between the first and second microelectronic elements. A plurality of package terminals at the second surface are electrically interconnected with the substrate contacts for connecting the package with a component external thereto. A plurality of stack terminals are exposed at the first surface in the interconnect area for connecting the package with a component overlying the first surface of the substrate. The assembly further includes a second microelectronic package overlying the first microelectronic package and having terminals joined to the stack terminals of the first microelectronic package.

公开(公告)号：US09502372B1

公开(公告)日：2016-11-22

申请号：US14701049

申请日：2015-04-30

Applicant: Invensas Corporation

Inventor： Rajesh Katkar ,  Tu Tam Vu ,  Bongsub Lee ,  Kyong-Mo Bang ,  Xuan Li ,  Long Huynh ,  Gabriel Z. Guevara ,  Akash Agrawal ,  Willmar Subido ,  Laura Wills Mirkarimi

IPC: H01L23/00 ,  H01L23/31 ,  H01L25/065 ,  H01L21/56 ,  H01L21/78

CPC classification number: H01L24/49 ,  H01L21/486 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L24/48 ,  H01L24/85 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/33181 ,  H01L2224/4801 ,  H01L2224/48235 ,  H01L2224/484 ,  H01L2224/4845 ,  H01L2224/49171 ,  H01L2224/49173 ,  H01L2224/49177 ,  H01L2224/73217 ,  H01L2224/73267 ,  H01L2224/85005 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/2064 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/85399

Abstract: An apparatus relates generally to a microelectronic package. In such an apparatus, a microelectronic die has a first surface, a second surface opposite the first surface, and a sidewall surface between the first and second surfaces. A plurality of wire bond wires with proximal ends thereof are coupled to either the first surface or the second surface of the microelectronic die with distal ends of the plurality of wire bond wires extending away from either the first surface or the second surface, respectively, of the microelectronic die. A portion of the plurality of wire bond wires extends outside a perimeter of the microelectronic die into a fan-out (“FO”) region. A molding material covers the first surface, the sidewall surface, and portions of the plurality of the wire bond wires from the first surface of the microelectronic die to an outer surface of the molding material.

Abstract translation: 一种装置一般涉及微电子封装。 在这种装置中，微电子管芯具有第一表面，与第一表面相对的第二表面和第一表面和第二表面之间的侧壁表面。 多个具有近端的引线接合线被耦合到微电子管芯的第一表面或第二表面，多个引线接合线的远端分别远离第一表面或第二表面 微电子模具。 多个引线接合线的一部分在微电子管芯的周边外延伸到扇出（“FO”）区域中。 成型材料覆盖第一表面，侧壁表面以及多个引线接合线从微电子管芯的第一表面到模制材料的外表面的部分。

公开(公告)号：US20160093563A1

公开(公告)日：2016-03-31

申请号：US14497825

申请日：2014-09-26

Applicant: INVENSAS CORPORATION

Inventor： Yong Chen ,  Zhuowen Sun ,  Kyong-Mo Bang

IPC: H01L23/498 ,  H05K1/02

CPC classification number: H01L23/49816 ,  H01L23/49822 ,  H01L23/50 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73257 ,  H01L2924/0002 ,  H01L2924/15192 ,  H01L2924/181 ,  H05K1/0262 ,  H05K2201/093 ,  H05K2201/09309 ,  H05K2201/09336 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A microelectronic package can include a substrate and a microelectronic element. The substrate can include terminals comprising at least first power terminals and other terminals in an area array at a surface of the substrate. The substrate can also include a power plane element electrically coupled to the first power terminals. The area array can have a peripheral edge and a continuous gap between the terminals extending inwardly from the peripheral edge in a direction parallel to the surface. The terminals on opposite sides of the gap can be spaced from one another by at least 1.5 times a minimum pitch of the terminals. The power plane element can extend within the gap from at least the peripheral edge at least to the first power terminals. Each first power terminal can be separated from the peripheral edge by two or more of the other terminals.

Abstract translation: 微电子封装可以包括衬底和微电子元件。 衬底可以包括在衬底的表面处的区域阵列中至少包括第一电源端子和其他端子的端子。 基板还可以包括电耦合到第一电源端子的功率平面元件。 区域阵列可以具有周边边缘和在平行于表面的方向上从周边边缘向内延伸的端子之间的连续间隙。 间隙的相对侧上的端子可以彼此间隔开至少1.5倍的端子的最小间距。 功率平面元件可以在间隙内从至少外围边缘至少延伸到第一电源端子。 每个第一电源端子可以通过两个或更多其它端子与外围边缘分离。

公开(公告)号：US09281296B2

公开(公告)日：2016-03-08

申请号：US14448040

申请日：2014-07-31

Applicant: Invensas Corporation

Inventor： Zhuowen Sun ,  Yong Chen ,  Kyong-Mo Bang

IPC: H01L25/00 ,  H01L25/065 ,  H01L23/498 ,  H01L23/00

CPC classification number: H01L25/0657 ,  H01L23/49816 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/32014 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/481 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/43 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099 ,  H01L2924/00015

Abstract: A microelectronic package can include a substrate comprising a dielectric element having first and second opposite surfaces, and a microelectronic element having a face extending parallel to the first surface. The substrate can also include a plurality of peripheral edges extending between the first and second surfaces defining a generally rectangular or square periphery of the substrate. The substrate can further include a plurality of contacts and terminals, the contacts being at the first surface, the terminals being at at least one of the first or second surfaces. The microelectronic elements can have a plurality of edges bounding the face, and a plurality of element contacts at the face electrically coupled with the terminals through the contacts of the substrate. Each edge of the microelectronic element can be oriented at an oblique angle with respect to the peripheral edges of the substrate.

Abstract translation: 微电子封装可以包括包括具有第一和第二相对表面的电介质元件的基板和具有平行于第一表面延伸的面的微电子元件。 衬底还可以包括在第一和第二表面之间延伸的多个外围边缘，其限定基底的大致矩形或正方形的周边。 所述基板还可包括多个触点和端子，所述触点位于所述第一表面处，所述端子处于所述第一或第二表面中的至少一个。 微电子元件可以具有限定该面的多个边缘，并且在该表面处的多个元件触点通过基板的触点与端子电耦合。 微电子元件的每个边缘可以相对于衬底的周边边缘倾斜地定向。

公开(公告)号：US09911717B2

公开(公告)日：2018-03-06

申请号：US14658763

申请日：2015-03-16

Applicant: Invensas Corporation

Inventor： Belgacem Haba ,  Kyong-Mo Bang

IPC: H01L25/065 ,  B81C1/00 ,  H01L23/31 ,  H01L23/00 ,  H01L25/10 ,  H01L23/13 ,  H01L23/367

CPC classification number: H01L25/0655 ,  B81C1/00301 ,  H01L23/13 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/367 ,  H01L24/13 ,  H01L24/16 ,  H01L24/20 ,  H01L24/48 ,  H01L24/49 ,  H01L24/96 ,  H01L25/0652 ,  H01L25/105 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/221 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48228 ,  H01L2224/4824 ,  H01L2224/49109 ,  H01L2224/4911 ,  H01L2224/96 ,  H01L2225/0651 ,  H01L2225/0652 ,  H01L2225/06524 ,  H01L2225/06548 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/18161 ,  H01L2924/18165 ,  H01L2924/19107 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

Abstract: A microelectronic assembly includes a first microelectronic package having a substrate with first and second opposed surfaces and substrate contacts thereon. The first package further includes first and second microelectronic elements, each having element contacts electrically connected with the substrate contacts and being spaced apart from one another on the first surface so as to provide an interconnect area of the first surface between the first and second microelectronic elements. A plurality of package terminals at the second surface are electrically interconnected with the substrate contacts for connecting the package with a component external thereto. A plurality of stack terminals are exposed at the first surface in the interconnect area for connecting the package with a component overlying the first surface of the substrate. The assembly further includes a second microelectronic package overlying the first microelectronic package and having terminals joined to the stack terminals of the first microelectronic package.

公开(公告)号：US20170133081A1

公开(公告)日：2017-05-11

申请号：US15337323

申请日：2016-10-28

Applicant: Invensas Corporation

Inventor： Zhuowen Sun ,  Yong Chen ,  Kyong-Mo Bang

IPC: G11C11/408 ,  H01L25/18 ,  G11C11/409 ,  H01L23/64 ,  G11C5/06 ,  H01L25/065 ,  H01L23/02

CPC classification number: G11C11/4087 ,  G11C5/063 ,  G11C8/18 ,  G11C11/409 ,  H01L23/02 ,  H01L23/3128 ,  H01L23/64 ,  H01L25/0652 ,  H01L25/18 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05548 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2924/15311 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A microelectronic assembly can include an address bus comprising a plurality of signal conductors each passing sequentially through first, second, third, and fourth connection regions, and first and second microelectronic packages. The first microelectronic package can include first and second microelectronic elements, and the second microelectronic package can include third and fourth microelectronic elements. Each microelectronic element can be electrically coupled to the address bus via the respective connection region. An electrical characteristic between the first and second connection regions can be within a same tolerance of the electrical characteristic between the second and third connection regions.

公开(公告)号：US09646946B2

公开(公告)日：2017-05-09

申请号：US14877205

申请日：2015-10-07

Applicant: Invensas Corporation

Inventor： Xuan Li ,  Rajesh Katkar ,  Long Huynh ,  Laura Wills Mirkarimi ,  Bongsub Lee ,  Gabriel Z. Guevara ,  Tu Tam Vu ,  Kyong-Mo Bang ,  Akash Agrawal

IPC: H01L23/48 ,  H01L29/40 ,  H01L21/84 ,  H01L23/00 ,  H01L21/02 ,  H01L21/683 ,  H01L21/768 ,  H01L21/56 ,  H01L21/304 ,  H01L23/538 ,  H01L23/29

CPC classification number: H01L21/568 ,  H01L21/02118 ,  H01L21/304 ,  H01L21/4846 ,  H01L21/561 ,  H01L21/565 ,  H01L21/6835 ,  H01L21/76838 ,  H01L21/76892 ,  H01L23/293 ,  H01L23/3135 ,  H01L23/4985 ,  H01L23/5384 ,  H01L24/09 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/19 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/13006 ,  H01L2224/131 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2224/16111 ,  H01L2224/16237 ,  H01L2224/27436 ,  H01L2224/29011 ,  H01L2224/2919 ,  H01L2224/73203 ,  H01L2224/73267 ,  H01L2224/81005 ,  H01L2224/8114 ,  H01L2224/81191 ,  H01L2224/8185 ,  H01L2224/81903 ,  H01L2224/81904 ,  H01L2224/8192 ,  H01L2224/83192 ,  H01L2224/83856 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2924/15311 ,  H01L2224/81 ,  H01L2924/0665 ,  H01L2924/00014 ,  H01L2924/014

Abstract: Fan-out wafer-level packaging (WLP) using metal foil lamination is provided. An example wafer-level package incorporates a metal foil, such as copper (Cu), to relocate bonding pads in lieu of a conventional deposited or plated RDL. A polymer such as an epoxy layer adheres the metal foil to the package creating conductive contacts between the metal foil and metal pillars of a die. The metal foil may be patterned at different stages of a fabrication process. An example wafer-level package with metal foil provides relatively inexpensive electroplating-free traces that replace expensive RDL processes. Example techniques can reduce interfacial stress at fan-out areas to enhance package reliability, and enable smaller chips to be used. The metal foil provides improved fidelity of high frequency signals. The metal foil can be bonded to metallic pillar bumps before molding, resulting in less impact on the mold material.

公开(公告)号：US20160035703A1

公开(公告)日：2016-02-04

申请号：US14448040

申请日：2014-07-31

Applicant: Invensas Corporation

Inventor： Zhuowen Sun ,  Yong Chen ,  Kyong-Mo Bang

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/498

CPC classification number: H01L25/0657 ,  H01L23/49816 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/32014 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/481 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/43 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099 ,  H01L2924/00015

Abstract: A microelectronic package can include a substrate comprising a dielectric element having first and second opposite surfaces, and a microelectronic element having a face extending parallel to the first surface. The substrate can also include a plurality of peripheral edges extending between the first and second surfaces defining a generally rectangular or square periphery of the substrate. The substrate can further include a plurality of contacts and terminals, the contacts being at the first surface, the terminals being at at least one of the first or second surfaces. The microelectronic elements can have a plurality of edges bounding the face, and a plurality of element contacts at the face electrically coupled with the terminals through the contacts of the substrate. Each edge of the microelectronic element can be oriented at an oblique angle with respect to the peripheral edges of the substrate.

Abstract translation: 微电子封装可以包括包括具有第一和第二相对表面的电介质元件的基板和具有平行于第一表面延伸的面的微电子元件。 衬底还可以包括在第一和第二表面之间延伸的多个外围边缘，其限定基底的大致矩形或正方形的周边。 所述基板还可包括多个触点和端子，所述触点位于所述第一表面处，所述端子处于所述第一或第二表面中的至少一个。 微电子元件可以具有限定该面的多个边缘，并且在该表面处的多个元件触点通过基板的触点与端子电耦合。 微电子元件的每个边缘可以相对于衬底的周边边缘倾斜地定向。

公开(公告)号：US20150187730A1

公开(公告)日：2015-07-02

申请号：US14658763

申请日：2015-03-16

Applicant: Invensas Corporation

Inventor： Belgacem Haba ,  Kyong-Mo Bang

IPC: H01L25/065

CPC classification number: H01L25/0655 ,  B81C1/00301 ,  H01L23/13 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/367 ,  H01L24/13 ,  H01L24/16 ,  H01L24/20 ,  H01L24/48 ,  H01L24/49 ,  H01L24/96 ,  H01L25/0652 ,  H01L25/105 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/221 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48228 ,  H01L2224/4824 ,  H01L2224/49109 ,  H01L2224/4911 ,  H01L2224/96 ,  H01L2225/0651 ,  H01L2225/0652 ,  H01L2225/06524 ,  H01L2225/06548 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/18161 ,  H01L2924/18165 ,  H01L2924/19107 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

Abstract: A microelectronic assembly includes a first microelectronic package having a substrate with first and second opposed surfaces and substrate contacts thereon. The first package further includes first and second microelectronic elements, each having element contacts electrically connected with the substrate contacts and being spaced apart from one another on the first surface so as to provide an interconnect area of the first surface between the first and second microelectronic elements. A plurality of package terminals at the second surface are electrically interconnected with the substrate contacts for connecting the package with a component external thereto. A plurality of stack terminals are exposed at the first surface in the interconnect area for connecting the package with a component overlying the first surface of the substrate. The assembly further includes a second microelectronic package overlying the first microelectronic package and having terminals joined to the stack terminals of the first microelectronic package.

Abstract translation: 微电子组件包括具有其上具有第一和第二相对表面的衬底的衬底接触件的第一微电子封装。 第一封装进一步包括第一和第二微电子元件，每个微电子元件具有与基板触点电连接并且在第一表面上彼此间隔开的元件触点，以便提供第一和第二微电子元件之间的第一表面的互连区域 。 在第二表面处的多个封装端子与衬底触头电连接，用于将封装与外部的部件连接。 多个堆叠端子在互连区域中的第一表面处露出，用于将封装件与覆盖在基板的第一表面上的部件连接。 组件还包括覆盖第一微电子封装并具有连接到第一微电子封装的堆叠端子的端子的第二微电子封装。

公开(公告)号：US20140199811A1

公开(公告)日：2014-07-17

申请号：US14217820

申请日：2014-03-18

Applicant: Invensas Corporation

Inventor： Belgacem Haba ,  Kyong-Mo Bang

IPC: B81C1/00

CPC classification number: H01L25/0655 ,  B81C1/00301 ,  H01L23/13 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/367 ,  H01L24/13 ,  H01L24/16 ,  H01L24/20 ,  H01L24/48 ,  H01L24/49 ,  H01L24/96 ,  H01L25/0652 ,  H01L25/105 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/221 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48228 ,  H01L2224/4824 ,  H01L2224/49109 ,  H01L2224/4911 ,  H01L2224/96 ,  H01L2225/0651 ,  H01L2225/0652 ,  H01L2225/06524 ,  H01L2225/06548 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/18161 ,  H01L2924/18165 ,  H01L2924/19107 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

Abstract: A microelectronic assembly includes a first microelectronic package having a substrate with first and second opposed surfaces and substrate contacts thereon. The first package further includes first and second microelectronic elements, each having element contacts electrically connected with the substrate contacts and being spaced apart from one another on the first surface so as to provide an interconnect area of the first surface between the first and second microelectronic elements. A plurality of package terminals at the second surface are electrically interconnected with the substrate contacts for connecting the package with a component external thereto. A plurality of stack terminals are exposed at the first surface in the interconnect area for connecting the package with a component overlying the first surface of the substrate. The assembly further includes a second microelectronic package overlying the first microelectronic package and having terminals joined to the stack terminals of the first microelectronic package.

Abstract translation: 微电子组件包括具有其上具有第一和第二相对表面的衬底的衬底接触件的第一微电子封装。 第一封装进一步包括第一和第二微电子元件，每个微电子元件具有与基板触点电连接并且在第一表面上彼此间隔开的元件触点，以便提供第一和第二微电子元件之间的第一表面的互连区域 。 在第二表面处的多个封装端子与衬底触头电连接，用于将封装与外部的部件连接。 多个堆叠端子在互连区域中的第一表面处露出，用于将封装件与覆盖在基板的第一表面上的部件连接。 组件还包括覆盖第一微电子封装并具有连接到第一微电子封装的堆叠端子的端子的第二微电子封装。