公开(公告)号：US10957686B2

公开(公告)日：2021-03-23

申请号：US16744693

申请日：2020-01-16

Applicant: Infineon Technologies AG

Inventor： Dirk Ahlers ,  Markus Zundel ,  Peter Brandl ,  Kurt Matoy ,  Thomas Ostermann

IPC: H01L27/02 ,  H01L29/78 ,  H01L29/06 ,  H01L29/786 ,  H01L29/40 ,  H01L49/02 ,  H01L29/739 ,  H01L29/808

Abstract: A semiconductor device of an embodiment includes a transistor device in a semiconductor die including a semiconductor body. The transistor device includes transistor cells connected in parallel and covering at least 80% of an overall active area at a first surface of the semiconductor body. The semiconductor device further includes a control terminal contact area at the first surface electrically connected to a control electrode of each of the transistor cells. A first load terminal contact area at the first surface electrically connected to a first load terminal region of each of the transistor cells. The semiconductor device further includes a resistor in the semiconductor die and electrically coupled between the control terminal contact area and the first load terminal contact area, and a pn junction diode electrically connected in series with the resistor. A method of producing the semiconductor device is also described.

公开(公告)号：US10461203B2

公开(公告)日：2019-10-29

申请号：US15925904

申请日：2018-03-20

Applicant: Infineon Technologies AG

Inventor： Stefan Clara ,  Thomas Grille ,  Ursula Hedenig ,  Peter Irsigler ,  Bernhard Jakoby ,  Ventsislav M. Lavchiev ,  Thomas Ostermann ,  Thomas Popp

IPC: H01L31/0352 ,  H01L33/06 ,  H01L31/18 ,  H01L31/173

Abstract: A semiconductor device comprises a plurality of quantum structures comprising predominantly germanium. The plurality of quantum structures are formed on a first semiconductor layer structure. The quantum structures of the plurality of quantum structures have a lateral dimension of less than 15 nm and an area density of at least 8×1011 quantum structures per cm2. The plurality of quantum structures are configured to emit light with a light emission maximum at a wavelength of between 2 μm and 10 μm or to absorb light with a light absorption maximum at a wavelength of between 2 μm and 10 μm.

公开(公告)号：US10186508B2

公开(公告)日：2019-01-22

申请号：US15792492

申请日：2017-10-24

Applicant: Infineon Technologies AG

Inventor： Dirk Ahlers ,  Markus Zundel ,  Peter Brandl ,  Kurt Matoy ,  Thomas Ostermann

IPC: H01L27/02 ,  H01L29/06 ,  H01L29/78 ,  H01L49/02 ,  H01L29/739 ,  H01L29/808 ,  H01L29/40

Abstract: A semiconductor device of an embodiment includes a transistor device in a semiconductor die including a semiconductor body. The transistor device includes transistor cells connected in parallel and covering at least 80% of an overall active area at a first surface of the semiconductor body. The semiconductor device further includes a control terminal contact area at the first surface electrically connected to a control electrode of each of the transistor cells. A first load terminal contact area at the first surface electrically connected to a first load terminal region of each of the transistor cells. The semiconductor device further includes a resistor in the semiconductor die and electrically coupled between the control terminal contact area and the first load terminal contact area.

公开(公告)号：US20170030890A1

公开(公告)日：2017-02-02

申请号：US15221010

申请日：2016-07-27

Applicant: Infineon Technologies AG

Inventor： Gerald Holweg ,  Yonsuang Arnanthigo ,  Jan Berger ,  Guenter Denifl ,  Sylvicley Figueira Da Silva ,  Iris Moder ,  Thomas Ostermann ,  Alexander Oswatitsch ,  Vijaye Kumar Rajaraman ,  Gudrun Stranzl

IPC: G01N33/49 ,  B01D69/02 ,  B01D71/02 ,  B01D61/14

CPC classification number: G01N33/491 ,  B01D61/147 ,  B01D61/18 ,  B01D63/087 ,  B01D69/02 ,  B01D71/02 ,  B01D71/022 ,  B01D71/027 ,  B01D2313/345 ,  B01D2325/02 ,  B01D2325/26

Abstract: A microfiltration device comprises a substrate having a first surface and a second surface opposite to the first surface. The substrate includes a cavity between the first surface and the second surface. The substrate further includes a microfilter including a frame part in contact with the substrate and a filter part abutting the cavity. The microfilter comprises in both the frame part and the filter part a semiconducting or conducting material.

Abstract translation: 微滤装置包括具有第一表面和与第一表面相对的第二表面的基底。 衬底包括在第一表面和第二表面之间的空腔。 该基板还包括一个微型过滤器，它包括一个与该基板接触的框架部分和一个邻接腔体的过滤器部件。 微型过滤器在框架部分和过滤器部分中均包括半导体或导电材料。

公开(公告)号：US20160351739A1

公开(公告)日：2016-12-01

申请号：US15167292

申请日：2016-05-27

Applicant: Infineon Technologies AG

Inventor： Stefan CLARA ,  Thomas Grille ,  Ursula Hedenig ,  Peter Irsigler ,  Bernhard Jakoby ,  Ventsislav M. Lavchiev ,  Thomas Ostermann ,  Thomas Popp

IPC: H01L31/0352 ,  H01L31/18 ,  H01L33/06

CPC classification number: H01L31/035254 ,  H01L31/035209 ,  H01L31/035218 ,  H01L31/173 ,  H01L31/1812 ,  H01L31/1864 ,  H01L33/06 ,  H01L2933/0033

Abstract: A semiconductor device comprises a plurality of quantum structures comprising predominantly germanium. The plurality of quantum structures are formed on a first semiconductor layer structure. The quantum structures of the plurality of quantum structures have a lateral dimension of less than 15 nm and an area density of at least 8×1011 quantum structures per cm2. The plurality of quantum structures are configured to emit light with a light emission maximum at a wavelength of between 2 μm and 10 μm or to absorb light with a light absorption maximum at a wavelength of between 2 μm and 10 μm.

Abstract translation: 半导体器件包括主要包含锗的多个量子结构。 多个量子结构形成在第一半导体层结构上。 多个量子结构的量子结构具有小于15nm的横向尺寸和每平方厘米至少8×1011个量子结构的面积密度。 多个量子结构被配置为发射波长在2μm和10μm之间的发光最大值的光，或者吸收波长在2μm和10μm之间的最大光吸收的光。

公开(公告)号：US20210050434A1

公开(公告)日：2021-02-18

申请号：US17085426

申请日：2020-10-30

Applicant: Infineon Technologies AG

Inventor： Gerhard Prechtl ,  Andreas Peter Meiser ,  Thomas Ostermann

IPC: H01L29/735 ,  H01L29/66 ,  H01L29/10 ,  H01L27/082

Abstract: An integrated circuit includes a semiconductor substrate, first and second doping regions in the substrate, a first insulating layer on a first surface of the semiconductor substrate, the first insulating layer having first and second openings above the first and second doping regions, a polysilicon layer on the first insulating layer, the polysilicon layer having first and second openings above the first and second openings of the first insulating layer, a second insulating layer on the polysilicon layer and having first and second openings above the first and second openings of the polysilicon layer, a first contact element disposed in the first openings, a second contact element disposed in the second openings, the first and second contact elements being in contact with the first and second doping regions.

公开(公告)号：US20200152621A1

公开(公告)日：2020-05-14

申请号：US16744693

申请日：2020-01-16

Applicant: Infineon Technologies AG

Inventor： Dirk Ahlers ,  Markus Zundel ,  Peter Brandl ,  Kurt Matoy ,  Thomas Ostermann

IPC: H01L27/02 ,  H01L29/78 ,  H01L29/06

Abstract: A semiconductor device of an embodiment includes a transistor device in a semiconductor die including a semiconductor body. The transistor device includes transistor cells connected in parallel and covering at least 80% of an overall active area at a first surface of the semiconductor body. The semiconductor device further includes a control terminal contact area at the first surface electrically connected to a control electrode of each of the transistor cells. A first load terminal contact area at the first surface electrically connected to a first load terminal region of each of the transistor cells. The semiconductor device further includes a resistor in the semiconductor die and electrically coupled between the control terminal contact area and the first load terminal contact area, and a pn junction diode electrically connected in series with the resistor.

公开(公告)号：US10393697B2

公开(公告)日：2019-08-27

申请号：US14930295

申请日：2015-11-02

Applicant: Infineon Technologies AG

Inventor： Sabine Gruber ,  Thomas Aichinger ,  Stefan Krivec ,  Thomas Ostermann

IPC: G01N27/447 ,  G01N27/453 ,  G01N27/27 ,  G01N27/414

Abstract: An apparatus for analyzing ion kinetics in a dielectric probe structure includes an ion reservoir abutting the dielectric probe structure and configured to supply mobile ions to the dielectric probe structure, a capacitor structure configured to generate an electric field in the dielectric probe structure along a vertical direction, and an electrode structure configured to generate an electrophoretic force on mobile ions in the dielectric probe structure along a lateral direction. A method for analyzing ion kinetics in the dielectric probe structure of the apparatus is also provided.

公开(公告)号：US20190157259A1

公开(公告)日：2019-05-23

申请号：US16236741

申请日：2018-12-31

Applicant: Infineon Technologies AG

Inventor： Dirk Ahlers ,  Markus Zundel ,  Peter Brandl ,  Kurt Matoy ,  Thomas Ostermann

IPC: H01L27/02 ,  H01L29/06 ,  H01L29/78

Abstract: A semiconductor device of an embodiment includes a transistor device in a semiconductor die including a semiconductor body. The transistor device includes transistor cells connected in parallel and covering at least 80% of an overall active area at a first surface of the semiconductor body. The semiconductor device further includes a control terminal contact area at the first surface electrically connected to a control electrode of each of the transistor cells. A first load terminal contact area at the first surface electrically connected to a first load terminal region of each of the transistor cells. The semiconductor device further includes a resistor in the semiconductor die and electrically coupled between the control terminal contact area and the first load terminal contact area.

公开(公告)号：US09941402B2

公开(公告)日：2018-04-10

申请号：US15627481

申请日：2017-06-20

Applicant: Infineon Technologies AG

Inventor： Adrian Finney ,  Dietmar Kotz ,  Radu Eugen Cazimirovici ,  Thomas Ostermann

IPC: H01L21/82 ,  H01L27/08 ,  H01L29/78 ,  H01L29/36 ,  H01L29/10 ,  H01L29/66 ,  H01L21/263 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/06

CPC classification number: H01L29/7811 ,  H01L21/263 ,  H01L21/823481 ,  H01L21/823487 ,  H01L27/088 ,  H01L29/0619 ,  H01L29/1095 ,  H01L29/36 ,  H01L29/66712

Abstract: A semiconductor device includes a guard structure located laterally between first and second active areas of a semiconductor substrate. The guard structure includes a first doping region at a front side surface of the substrate and a wiring structure electrically connecting the first doping region to a highly doped portion of a common doping region. The common doping region extends from a backside surface of the substrate to at least a part of the front side surface in contact with the wiring structure. An edge termination doping region laterally surrounds the first and second active areas. The edge termination doping region and the first doping region have a first conductivity type, and the common doping region has a second conductivity type. A resistive connection between the edge termination doping region and the first doping region is present at least during reverse operating conditions of the semiconductor device.