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    DIELETS ON FLEXIBLE AND STRETCHABLE PACKAGING FOR MICROELECTRONICS
    11.
    发明申请
    DIELETS ON FLEXIBLE AND STRETCHABLE PACKAGING FOR MICROELECTRONICS 有权

    公开(公告)号：US20220278048A1

    公开(公告)日：2022-09-01

    申请号：US17749442

    申请日：2022-05-20

    Applicant: Invensas Corporation

    Inventor： Shaowu Huang ,  Javier A. Delacruz

    IPC: H01L23/538 ,  H01L21/48 ,  H01L23/498 ,  H01L23/00 ,  H01L25/065

    Abstract: Dielets on flexible and stretchable packaging for microelectronics are provided. Configurations of flexible, stretchable, and twistable microelectronic packages are achieved by rendering chip layouts, including processors and memories, in distributed collections of dielets implemented on flexible and/or stretchable media. High-density communication between the dielets is achieved with various direct-bonding or hybrid bonding techniques that achieve high conductor count and very fine pitch on flexible substrates. An example process uses high-density interconnects direct-bonded or hybrid bonded between standard interfaces of dielets to create a flexible microelectronics package. In another example, a process uses high-density interconnections direct-bonded between native interconnects of the dielets to create the flexible microelectronics packages, without the standard interfaces.

    Mixed exposure for large die
    12.
    发明授权
    Mixed exposure for large die 有权

    公开(公告)号：US11264357B1

    公开(公告)日：2022-03-01

    申请号：US17075489

    申请日：2020-10-20

    Applicant: Invensas Corporation

    Inventor： Javier A. Delacruz ,  Belgacem Haba

    IPC: H01L25/065 ,  H01L23/00 ,  H01L23/538 ,  H01L21/68

    Abstract: Techniques and arrangements for performing exposure operations on a wafer utilizing both a stepper apparatus and an aligner apparatus. The exposure operations are performed with respect to large composite base dies, e.g., interposers, defined within the wafer, where the interposers will become a part of microelectronic devices by coupling with active dies or microchips. The composite base dies may be coupled to the active dies via “native interconnects” utilizing direct bonding techniques. The stepper apparatus may be used to perform exposure operations on active regions of the composite base dies to provide a fine pitch for the native interconnects, while the aligner apparatus may be used to perform exposure operations on inactive regions of the composite base dies to provide a coarse pitch for interfaces with passive regions of the composite base dies.

    EMBEDDED ORGANIC INTERPOSER FOR HIGH BANDWIDTH
    13.
    发明申请
    EMBEDDED ORGANIC INTERPOSER FOR HIGH BANDWIDTH 有权

    公开(公告)号：US20210327851A1

    公开(公告)日：2021-10-21

    申请号：US17362712

    申请日：2021-06-29

    Applicant: Invensas Corporation

    Inventor： Javier A. Delacruz ,  Belgacem Haba

    IPC: H01L25/065 ,  H01L25/16 ,  H01L25/00 ,  H01L23/498 ,  H05K1/02 ,  H05K3/46 ,  H01L23/538

    Abstract: Embedded organic interposers for high bandwidth are provided. Example embedded organic interposers provide thick conductors with more dielectric space, and more routing layers of such conductors than conventional interposers, in order to provide high bandwidth transmission capacity over longer spans. The embedded organic interposers provide high bandwidth transmission paths between components such as HBM, HBM2, and HBM3 memory stacks, and other components. To provide the thick conductors and more routing layers for greater transmission capacity, extra space is achieved by embedding the organic interposers in the core of the package. Example embedded organic interposers lower a resistive-capacitive (RC) load of the routing layers to provide an improved data transfer rate of 1 gigabits per second over at least a 6 mm span, for example. The embedded interposers are not limited to use with memory modules.

    Vertical capacitors for microelectronics
    15.
    发明授权
    Vertical capacitors for microelectronics 有权

    公开(公告)号：US10600747B2

    公开(公告)日：2020-03-24

    申请号：US16217622

    申请日：2018-12-12

    Applicant: Invensas Corporation

    Inventor： Belgacem Haba ,  Javier A. Delacruz

    IPC: H01L23/522 ,  H01L23/66 ,  H01L23/498 ,  H01L25/16 ,  H01L21/48 ,  H01L49/02 ,  H01L23/00

    Abstract: Vertical capacitors for microelectronics are provided. An example thin capacitor layer can provide one or numerous capacitors to a semiconductor chip or integrated circuit. In an implementation, a thin capacitor layer of 50-100 μm thickness may have 5000 vertically disposed capacitor plates per linear centimeter, while occupying only a thin slice of the package. Electrodes for each capacitor plate are accessible at multiple surfaces. Electrode density for very fine pitch interconnects can be in the range of 2-200 μm separation between electrodes. A redistribution layer (RDL) may be fabricated on one or both sides of the thin capacitor layer to provide fan-out ball grid arrays that occupy insignificant space. RDLs or through-vias can connect together sets of the interior vertical capacitor plates within a given thin capacitor layer to form various capacitors from the plates to meet the needs of particular chips, dies, integrated circuits, and packages.

    DIELETS ON FLEXIBLE AND STRETCHABLE PACKAGING FOR MICROELECTRONICS
    16.
    发明申请
    DIELETS ON FLEXIBLE AND STRETCHABLE PACKAGING FOR MICROELECTRONICS 审中-公开

    公开(公告)号：US20190341350A1

    公开(公告)日：2019-11-07

    申请号：US16515417

    申请日：2019-07-18

    Applicant: Invensas Corporation

    Inventor： Shaowu Huang ,  Javier A. Delacruz

    IPC: H01L23/538 ,  H01L25/065 ,  H01L23/498 ,  H01L23/00 ,  H01L21/48

    Abstract: Dielets on flexible and stretchable packaging for microelectronics are provided. Configurations of flexible, stretchable, and twistable microelectronic packages are achieved by rendering chip layouts, including processors and memories, in distributed collections of dielets implemented on flexible and/or stretchable media. High-density communication between the dielets is achieved with various direct-bonding or hybrid bonding techniques that achieve high conductor count and very fine pitch on flexible substrates. An example process uses high-density interconnects direct-bonded or hybrid bonded between standard interfaces of dielets to create a flexible microelectronics package. In another example, a process uses high-density interconnections direct-bonded between native interconnects of the dielets to create the flexible microelectronics packages, without the standard interfaces.

    Dielets on flexible and stretchable packaging for microelectronics
    17.
    发明授权
    Dielets on flexible and stretchable packaging for microelectronics 有权

    公开(公告)号：US10403577B1

    公开(公告)日：2019-09-03

    申请号：US15970055

    申请日：2018-05-03

    Applicant: Invensas Corporation

    Inventor： Shaowu Huang ,  Javier A. Delacruz

    IPC: H01J1/62 ,  H01L23/538 ,  H01L23/498 ,  H01L23/00 ,  H01L21/48 ,  H01L25/065

    Abstract: Dielets on flexible and stretchable packaging for microelectronics are provided. Configurations of flexible, stretchable, and twistable microelectronic packages are achieved by rendering chip layouts, including processors and memories, in distributed collections of dielets implemented on flexible and/or stretchable media. High-density communication between the dielets is achieved with various direct-bonding or hybrid bonding techniques that achieve high conductor count and very fine pitch on flexible substrates. An example process uses high-density interconnects direct-bonded or hybrid bonded between standard interfaces of dielets to create a flexible microelectronics package. In another example, a process uses high-density interconnections direct-bonded between native interconnects of the dielets to create the flexible microelectronics packages, without the standard interfaces.

    Multi-surface edge pads for vertical mount packages and methods of making package stacks
    18.
    发明授权
    Multi-surface edge pads for vertical mount packages and methods of making package stacks 有权

    公开(公告)号：US10354945B2

    公开(公告)日：2019-07-16

    申请号：US15660718

    申请日：2017-07-26

    Applicant: Invensas Corporation

    Inventor： Rajesh Katkar ,  Min Tao ,  Javier A. Delacruz ,  Hoki Kim ,  Akash Agrawal

    IPC: H05K1/11 ,  H05K1/14 ,  H05K1/18 ,  H05K3/34 ,  H05K3/36 ,  H01L21/48 ,  H01L23/00 ,  H01L23/13 ,  H01L25/10 ,  H01L23/498

    Abstract: Multi-surface edge pads for vertical mount packages and methods of making package stacks are provided. Example substrates for vertical surface mount to a motherboard have multi-surface edge pads. The vertical mount substrates may be those of a laminate-based FlipNAND. The multi-surface edge pads have cutouts or recesses that expose more surfaces and more surface area of the substrate for bonding with the motherboard. The cutouts in the edge pads allow more solder to be used between the attachment surface of the substrate and the motherboard. The placement and geometry of the resulting solder joint is stronger and has less internal stress than conventional solder joints for vertical mounting. In an example process, blind holes can be drilled into a thickness of a substrate, and the blind holes plated with metal. The substrate can be cut in half though the plated holes to provide two substrates with plated multi-surface edge pads including the cutouts for mounting to the motherboard.

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