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公开(公告)号:US20210195761A1
公开(公告)日:2021-06-24
申请号:US17194323
申请日:2021-03-08
Applicant: Unimicron Technology Corp.
Inventor: Kai-Ming YANG , Chen-Hao LIN , Wang-Hsiang TSAI , Cheng-Ta KO
IPC: H05K3/40 , H01L21/768 , H01L21/48 , H05K1/11 , H05K1/18 , H05K1/14 , H01L23/14 , H01L23/15 , H01L23/498 , H01L23/36 , H01L23/538 , H05K3/46 , H01L23/00 , H01L21/683
Abstract: A package structure includes a metal layer, a composite layer of a non-conductor inorganic material and an organic material, a sealant, a chip, a circuit layer structure, and an insulating protective layer. The composite layer of the non-conductor inorganic material and the organic material is disposed on the metal layer. The sealant is bonded on the composite layer of the non-conductor inorganic material and the organic material. The chip is embedded in the sealant, and the chip has electrode pads. The circuit layer structure is formed on the sealant and the chip. The circuit layer structure includes at least one dielectric layer and at least one circuit layer. The dielectric layer has conductive blind holes. The insulating protective layer is formed on the circuit layer structure. The insulating protective layer has openings, so as to expose parts of the surface of the circuit layer structure in the openings.
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公开(公告)号:US20190373713A1
公开(公告)日:2019-12-05
申请号:US16543609
申请日:2019-08-18
Applicant: Unimicron Technology Corp.
Inventor: Tzyy-Jang TSENG , Kai-Ming YANG , Pu-Ju LIN , Cheng-Ta KO , Yu-Hua CHEN
Abstract: A stacked structure includes a circuit board, an electronic component, metallic cores, and insulating cladding layers. The circuit board includes first bonding pads. The electronic component includes second bonding pads that are opposite to the first bonding pads. Each metallic core is connected to a corresponding first bonding pad and a corresponding second bonding pad. The metallic cores have a curved surface interposed between the corresponding first bonding pad and the corresponding second bonding pad. The insulating cladding layers are separated from each other and cover the curved surfaces of the metallic cores.
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公开(公告)号:US20240413067A1
公开(公告)日:2024-12-12
申请号:US18360826
申请日:2023-07-28
Applicant: Unimicron Technology Corp.
Inventor: Chia-Yu PENG , Kai-Ming YANG , Pu-Ju LIN , Cheng-Ta KO
Abstract: An electronic package module including a circuit substrate, an electronic component disposed on the circuit substrate and a molding compound is provided. The molding compound encapsulates the circuit substrate and the electronic component. The circuit substrate includes a first circuit layer and a first insulation layer covering on the first circuit layer. The first insulation layer has a boundary surface where a second circuit layer is disposed. A second insulation layer covers a part of the second circuit layer while the insulation layer bares a region surrounding the perimeter of the boundary surface. The molding compound directly contacts the region and the second insulation layer.
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公开(公告)号:US20220071010A1
公开(公告)日:2022-03-03
申请号:US17448893
申请日:2021-09-26
Applicant: Unimicron Technology Corp.
Inventor: Tzyy-Jang TSENG , Cheng-Ta KO , Pu-Ju LIN , Chi-Hai KUO , Shao-Chien LEE , Ming-Ru CHEN , Cheng-Chung LO
Abstract: A circuit board structure includes a first sub-circuit board, a second sub-circuit board, and a third sub-circuit board. The first sub-circuit board has an upper surface and a lower surface opposite to each other, and includes at least one first conductive through hole. The second sub-circuit board is disposed on the upper surface of the first sub-circuit board and includes at least one second conductive through hole. The third sub-circuit board is disposed on the lower surface of the first sub-circuit board and includes at least one third conductive through hole. At least two of the first conductive through hole, the second conductive through hole, and the third conductive through hole are alternately arranged in an axial direction perpendicular to an extending direction of the first sub-circuit board. The first, second and third sub-circuit boards are electrically connected to one another.
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公开(公告)号:US20220068742A1
公开(公告)日:2022-03-03
申请号:US17453489
申请日:2021-11-04
Applicant: Unimicron Technology Corp.
Inventor: Cheng-Hui WU , Jeng-Ting LI , Ping-Tsung LIN , Kai-Ming YANG , Pu-Ju LIN , Cheng-Ta KO
IPC: H01L23/31 , H01L23/00 , H01L23/498 , H01L21/56
Abstract: A chip package includes a redistribution layer, a chip, and an encapsulation member. The redistribution layer includes an insulation part, a plurality of first pads and a plurality of second pads, where the insulation part has a first surface, a second surface opposite to the first surface, and a side surface between the first surface and the second surface. The first pads and the second pads are located at the first surface and the second surface respectively. The chip is disposed on the first surface and electrically connected to the first pads. The encapsulation member wraps the chip and the redistribution layer, and covers the first surface and the side surface, where the encapsulation member exposes the second pads, and the encapsulation member is not flush with the first surface and the side surface.
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16.
公开(公告)号:US20180005931A1
公开(公告)日:2018-01-04
申请号:US15257897
申请日:2016-09-06
Applicant: Unimicron Technology Corp.
Inventor: Yu-Hua CHEN , Cheng-Ta KO
IPC: H01L23/498 , H01L21/48 , H01L23/00
CPC classification number: H01L23/49822 , H01L21/4853 , H01L21/4857 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L23/49838 , H01L23/562 , H05K3/4682 , H05K3/4688 , H05K2201/096 , H05K2201/10378
Abstract: A method for manufacturing a circuit redistribution structure includes the following steps. A first dielectric is formed on a carrier. Conductive blind vias are formed in the first dielectric. A first circuit redistribution layer is formed on the first dielectric. A second dielectric is formed on the first dielectric. First and second holes are formed on the second dielectric. A trench is formed in the second dielectric to divide the second dielectric into first and second portions. A first portion of the first circuit redistribution layer and the first hole are disposed in the first portion of the second dielectric, and a second portion of the first circuit redistribution layer and the second hole are disposed in the second portion of the second dielectric. Conductive blind vias are formed in the first and second holes, and a second circuit redistribution layer is formed on the second dielectric.
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公开(公告)号:US20170374748A1
公开(公告)日:2017-12-28
申请号:US15701435
申请日:2017-09-11
Applicant: Unimicron Technology Corp.
Inventor: Kai-Ming YANG , Chen-Hao LIN , Wang-Hsiang TSAI , Cheng-Ta KO
IPC: H05K3/40 , H05K1/14 , H01L21/48 , H01L23/14 , H01L23/15 , H05K1/18 , H01L23/498 , H05K1/11 , H01L21/768
CPC classification number: H05K3/4038 , H01L21/4846 , H01L21/4857 , H01L21/486 , H01L21/6835 , H01L21/76898 , H01L23/145 , H01L23/147 , H01L23/15 , H01L23/36 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L23/49838 , H01L23/49894 , H01L23/5389 , H01L24/19 , H01L24/20 , H01L2221/68345 , H01L2221/68359 , H01L2224/04105 , H01L2224/131 , H01L2224/16225 , H01L2224/16237 , H01L2224/32225 , H01L2224/73204 , H01L2224/73267 , H01L2224/96 , H01L2924/00014 , H01L2924/014 , H01L2924/15311 , H01L2924/3511 , H01L2924/37001 , H05K1/0271 , H05K1/11 , H05K1/112 , H05K1/142 , H05K1/183 , H05K3/4673 , H05K3/4682 , H05K3/4694 , H05K2201/10674 , Y10T29/4913 , Y10T29/49146 , Y10T29/49165
Abstract: A package structure includes a metal layer, a composite layer of a non-conductor inorganic material and an organic material, a sealant, a chip, a circuit layer structure, and an insulating protective layer. The composite layer of the non-conductor inorganic material and the organic material is disposed on the metal layer. The sealant is bonded on the composite layer of the non-conductor inorganic material and the organic material. The chip is embedded in the sealant, and the chip has electrode pads. The circuit layer structure is formed on the sealant and the chip. The circuit layer structure includes at least one dielectric layer and at least one circuit layer. The dielectric layer has conductive blind holes. The insulating protective layer is formed on the circuit layer structure. The insulating protective layer has openings, so as to expose parts of the surface of the circuit layer structure in the openings.
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公开(公告)号:US20240306298A1
公开(公告)日:2024-09-12
申请号:US18668275
申请日:2024-05-20
Applicant: Unimicron Technology Corp.
Inventor: Tzyy-Jang TSENG , Cheng-Ta KO , Pu-Ju LIN , Chi-Hai KUO , Shao-Chien LEE , Ming-Ru CHEN , Cheng-Chung LO
CPC classification number: H05K1/115 , H05K1/0306 , H05K3/0067 , H05K3/0094
Abstract: A manufacturing method of a circuit board structure includes the following steps. A first sub-circuit board having an upper surface and a lower surface opposite to each other and including at least one conductive through hole is provided. A second sub-circuit board including at least one conductive through hole is provided on the upper surface of the first sub-circuit board. A third sub-circuit board including at least one conductive through hole is provided on the lower surface of the first sub-circuit board. The first sub-circuit board, the second sub-circuit board, and the third sub-circuit board are laminated so that at least two of their conductive through holes are alternately arranged in an axial direction perpendicular to an extending direction of the first sub-circuit board. The first sub-circuit board, the second sub-circuit board, and the third sub-circuit board are electrically connected to one another.
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公开(公告)号:US20210159191A1
公开(公告)日:2021-05-27
申请号:US17170736
申请日:2021-02-08
Applicant: Unimicron Technology Corp.
Inventor: Pu-Ju LIN , Cheng-Ta KO , Yu-Hua CHEN , Tzyy-Jang TSENG , Ra-Min TAIN
Abstract: A package structure includes a redistribution structure, a chip, one or more structural reinforcing elements, and a protective layer. The redistribution structure includes a first circuit layer and a second circuit layer disposed over the first circuit layer. The first circuit layer is electrically connected to the second circuit layer. The chip is disposed over the redistribution structure and electrically connected to the second circuit layer. The one or more structural reinforcing elements are disposed over the redistribution structure. The structural reinforcing element has a Young's modulus in a range of 30 to 200 GPa. The protective layer overlays the chip and a sidewall of the structural reinforcing element.
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20.
公开(公告)号:US20200266155A1
公开(公告)日:2020-08-20
申请号:US16866530
申请日:2020-05-04
Applicant: Unimicron Technology Corp.
Inventor: Pu-Ju LIN , Cheng-Ta KO , Yu-Hua CHEN , Tzyy-Jang TSENG , Ra-Min TAIN
Abstract: A package structure includes a redistribution structure, a chip, one or more structural reinforcing elements, and a protective layer. The redistribution structure includes a first circuit layer and a second circuit layer disposed over the first circuit layer. The first circuit layer is electrically connected to the second circuit layer. The chip is disposed over the redistribution structure and electrically connected to the second circuit layer. The one or more structural reinforcing elements are disposed over the redistribution structure. The structural reinforcing element has a Young's modulus in a range of 30 to 200 GPa. The protective layer overlays the chip and a sidewall of the structural reinforcing element.
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