公开(公告)号：US20240357748A1

公开(公告)日：2024-10-24

申请号：US18317756

申请日：2023-05-15

Applicant: UNIMICRON TECHNOLOGY CORP.

Inventor： Jeng-Ting LI ,  Chi-Hai KUO ,  Cheng-Ta KO ,  Pu-Ju LIN

IPC: H05K3/00 ,  H05K1/03

CPC classification number: H05K3/002 ,  H05K1/0306 ,  H05K2203/107

Abstract: A substrate structure and a cutting method thereof are provided. The cutting method includes the following steps. A first substrate structure is provided, wherein the first substrate structure includes a glass substrate and a redistribution layer disposed on the glass substrate. A laser process is performed on the glass substrate to form a modified region on the glass substrate. A wet etching process is performed on the modified region of the glass substrate to remove the modified region and form a plurality of second substrate structures.

公开(公告)号：US20200176369A1

公开(公告)日：2020-06-04

申请号：US16785630

申请日：2020-02-09

Applicant: Unimicron Technology Corp.

Inventor： Chun-Min WANG ,  Pu-Ju LIN ,  Cheng-Ta KO

IPC: H01L23/498 ,  H01L25/10 ,  H01L23/31 ,  H01L21/48 ,  H01L23/00

Abstract: A package structure includes a redistribution structure, a chip, an inner conductive reinforcing element, and a protective layer. The redistribution structure includes a first circuit layer and a second circuit layer disposed over the first circuit layer. The first circuit layer is electrically connected to the second circuit layer. The chip is disposed over the redistribution structure and electrically connected to the second circuit layer. The inner conductive reinforcing element is disposed over the redistribution structure. The inner conductive reinforcing element has a Young's modulus in a range of from 30 to 200 GPa. The protective layer covers the chip and a sidewall of an opening of the inner conductive reinforcing element.

公开(公告)号：US20190239362A1

公开(公告)日：2019-08-01

申请号：US16379816

申请日：2019-04-10

Applicant: Unimicron Technology Corp.

Inventor： Kai-Ming YANG ,  Chen-Hao LIN ,  Cheng-Ta KO ,  John Hon-Shing LAU ,  Yu-Hua CHEN ,  Tzyy-Jang TSENG

IPC: H05K3/40 ,  H05K1/14 ,  H05K1/11 ,  H01L23/14 ,  H01L23/15 ,  H01L23/498 ,  H01L21/48 ,  H01L21/768 ,  H05K1/18

CPC classification number: H05K3/4038 ,  H01L21/4846 ,  H01L21/76898 ,  H01L23/147 ,  H01L23/15 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/15311 ,  H05K1/11 ,  H05K1/112 ,  H05K1/142 ,  H05K1/183 ,  H05K2201/10674 ,  Y10T29/4913 ,  Y10T29/49146 ,  Y10T29/49165

Abstract: A package structure is disclosed herein. The package structure includes an insulating composite layer, a sealant disposed on the insulating composite layer, a first chip embedded in the sealant and having a plurality of first conductive pads exposed through the sealant, a circuit layer module having a plurality of circuit layers and a plurality of dielectric layers having a plurality of conductive vias, a second chip embedded in the circuit layer module and has a plurality of second conductive pads electrically connected to the circuit layers through the conductive vias, and a protecting layer having a plurality of openings disposed on the circuit layer module, in which the openings expose a portion of the circuit layer module.

公开(公告)号：US20250168988A1

公开(公告)日：2025-05-22

申请号：US19035096

申请日：2025-01-23

Applicant: UNIMICRON TECHNOLOGY CORP.

Inventor： Jeng-Ting LI ,  Chi-Hai KUO ,  Cheng-Ta KO ,  Pu-Ju LIN

IPC: H05K3/00 ,  C03C15/00 ,  C03C23/00 ,  H05K1/03

Abstract: A substrate structure and a cutting method thereof are provided. The cutting method includes the following steps. A first substrate structure is provided, wherein the first substrate structure includes a glass substrate and a redistribution layer disposed on the glass substrate. A laser process is performed on the glass substrate to form a modified region on the glass substrate. A wet etching process is performed on the modified region of the glass substrate to remove the modified region and form a plurality of second substrate structures.

公开(公告)号：US20220375919A1

公开(公告)日：2022-11-24

申请号：US17818006

申请日：2022-08-08

Applicant: Unimicron Technology Corp.

Inventor： Kai-Ming YANG ,  Chen-Hao LIN ,  Cheng-Ta KO ,  John Hon-Shing LAU ,  Yu-Hua CHEN ,  Tzyy-Jang TSENG

IPC: H01L25/00 ,  H01L21/48 ,  H01L23/538 ,  H01L23/00

Abstract: A method of manufacturing package structure with following steps is disclosed herein. An insulating composite layer is formed on a metal layer of a carrier board. A chip packaging module including a sealant and a first chip embedded therein is disposed on the insulating composite layer, in which the first chip has a plurality of conductive pads. A first circuit layer module including a dielectric layer and a circuit layer is formed on the chip packaging module, in which the circuit layer is on the dielectric layer and electrically connected to the conductive pads through a conductive vias in the dielectric layer. A second chip is disposed on the first circuit layer module. A second circuit layer module is formed on the first circuit layer module and the second chip. A protecting layer is formed on the second circuit layer module.

公开(公告)号：US20220146207A1

公开(公告)日：2022-05-12

申请号：US17113332

申请日：2020-12-07

Applicant: UNIMICRON TECHNOLOGY CORP.

Inventor： Pu-Ju LIN ,  Ying-Chu CHEN ,  Wei-Ci YE ,  Chi-Hai KUO ,  Cheng-Ta KO

IPC: F28D15/04 ,  H05K7/20 ,  C23F17/00

Abstract: A vapor chamber device has a housing and multiple chambers. The housing includes two shells opposite to each other. The chambers are formed between the two shells. Each chamber contains a working fluid and has at least one diversion bump and a capillary structure. The diversion bump is formed on an inner surface of the second shell, and the capillary structure is mounted on the diversion bump. Since the chambers are independent from one another, when the vapor chamber device is vertically mounted to a heat source, the chambers at an upper portion of the vapor chamber device still contain the working fluid. The working fluid in the vapor chamber device may not all flow to a bottom of the vapor chamber device. Therefore, a contact area between the working fluid and the heat source is increased and heat dissipation efficiency is improved.

公开(公告)号：US20190139907A1

公开(公告)日：2019-05-09

申请号：US16240806

申请日：2019-01-07

Applicant: Unimicron Technology Corp.

Inventor： Pu-Ju LIN ,  Cheng-Ta KO ,  Yu-Hua CHEN ,  Tzyy-Jang TSENG ,  Ra-Min TAIN

IPC: H01L23/00 ,  H01L23/66

Abstract: A package structure includes a redistribution structure, a chip, one or more structural reinforcing elements, and a protective layer. The redistribution structure includes a first circuit layer and a second circuit layer disposed over the first circuit layer. The first circuit layer is electrically connected to the second circuit layer. The chip is disposed over the redistribution structure and electrically connected to the second circuit layer. The one or more structural reinforcing elements are disposed over the redistribution structure. The structural reinforcing element has a Young's modulus in a range of of 30 to 200 GPa. The protective layer overlays the chip and a sidewall of the structural reinforcing element.

公开(公告)号：US20240128179A1

公开(公告)日：2024-04-18

申请号：US18053748

申请日：2022-11-08

Applicant: Unimicron Technology Corp.

Inventor： Jyun-Hong CHEN ,  Chi-Hai KUO ,  Pu-Ju LIN ,  Cheng-Ta KO

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/00 ,  H01L23/13 ,  H01L23/14 ,  H01L23/373 ,  H01L25/00 ,  H01L25/10

CPC classification number: H01L23/49833 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/13 ,  H01L23/145 ,  H01L23/3737 ,  H01L23/3738 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L24/16 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/16235 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/107 ,  H01L2225/1094 ,  H01L2924/1011 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/1461 ,  H01L2924/3511

Abstract: A package structure includes a first substrate, a second substrate disposed on the first substrate, a third substrate disposed on the second substrate, and multiple chips mounted on the third substrate. A second coefficient of thermal expansion (CTE) of the second substrate is less than a first CTE of the first substrate. The third substrate includes a first sub-substrate, a second sub-substrate in the same level with the first sub-substrate, a third sub-substrate in the same level with the first sub-substrate. A CTE of the first sub-substrate, a CTE of the second sub-substrate, and a CTE of the third sub-substrate are less than the second CTE of the second substrate.

公开(公告)号：US20230402391A1

公开(公告)日：2023-12-14

申请号：US17814527

申请日：2022-07-24

Applicant: Unimicron Technology Corp.

Inventor： Ying-Chu CHEN ,  Jeng-Ting LI ,  Chi-Hai KUO ,  Cheng-Ta KO ,  Pu-Ju LIN

IPC: H01L23/538 ,  H01L23/29 ,  H01L21/48 ,  H01L21/56

CPC classification number: H01L23/5385 ,  H01L23/5383 ,  H01L23/293 ,  H01L21/4857 ,  H01L21/56

Abstract: A manufacturing method of a package structure includes: forming a redistribution layer on a top surface of a glass substrate; forming a protective layer on the top surface of the glass substrate; cutting the glass substrate and the protective layer such that the glass substrate has a cutting edge, in which a crack is formed in the cutting edge of the glass substrate; and heating the protective layer such that a portion of the protective layer flows towards a bottom surface of the glass substrate to cover the cutting edge of the glass substrate and fill the crack in the cutting edge of the glass substrate.

公开(公告)号：US20230231087A1

公开(公告)日：2023-07-20

申请号：US17653659

申请日：2022-03-07

Applicant: Unimicron Technology Corp.

Inventor： Hao-Wei TSENG ,  Chi-Hai KUO ,  Jeng-Ting LI ,  Ying-Chu CHEN ,  Pu-Ju LIN ,  Cheng-Ta KO

IPC: H01L33/54 ,  H01L25/075 ,  H01L23/00

CPC classification number: H01L33/54 ,  H01L25/0753 ,  H01L24/83 ,  H01L2933/005 ,  H01L24/29 ,  H01L2224/29194 ,  H01L2224/83099 ,  H01L2224/83203 ,  H01L2224/83862 ,  H01L2224/8389 ,  H01L2224/83856 ,  H01L24/32 ,  H01L2224/32227 ,  H01L2924/12041

Abstract: A package structure includes a substrate, a plurality of conductive pads, a light-emitting diode, a photo imageable dielectric material, and a black matrix. The substrate includes a top surface. The conductive pads are located on the top surface of the substrate. The light-emitting diode is located on the conductive pads. The photo imageable dielectric material is located between the light-emitting diode and the top surface of the substrate and between the conductive pads. An orthogonal projection of the light-emitting diode on the substrate is overlapped with an orthogonal projection of the photo imageable dielectric material on the substrate. The black matrix is located on the top surface of the substrate and the conductive pads.