公开(公告)号：US08053377B2

公开(公告)日：2011-11-08

申请号：US12892190

申请日：2010-09-28

Applicant: Shang-Ying Tsai ,  Chun-Ren Cheng ,  Jiou-Kang Lee ,  Jung-Huei Peng ,  Ting-Hau Wu

Inventor： Shang-Ying Tsai ,  Chun-Ren Cheng ,  Jiou-Kang Lee ,  Jung-Huei Peng ,  Ting-Hau Wu

IPC: H01L21/31 ,  H01L21/469

CPC classification number: B41J2/16 ,  B41J2/1628 ,  B41J2/1631 ,  B41J2/1639 ,  B81B2201/052 ,  B81C1/00666 ,  B81C2201/017 ,  B81C2201/053

Abstract: System and method for forming a structure including a MEMS device structure. In order to prevent warpage of a substrate arising from curing process for a sacrificial material (such as a photoresist), and from subsequent high temperature process steps, an improved sacrificial material comprises (i) a polymer and (ii) a foaming agent or special function group. The structure can be formed by forming a trench in a substrate and filling the trench with a sacrificial material. The sacrificial material includes (i) a polymer and (ii) a foaming agent or special function group. After further process steps are completed, the sacrificial material is removed from the trench.

Abstract translation: 用于形成包括MEMS器件结构的结构的系统和方法。 为了防止由牺牲材料（例如光致抗蚀剂）的固化过程引起的基板翘曲，以及随后的高温工艺步骤，改进的牺牲材料包括（i）聚​​合物和（ii）发泡剂或特殊的 功能组。 可以通过在衬底中形成沟槽并用牺牲材料填充沟槽来形成结构。 牺牲材料包括（i）聚​​合物和（ii）发泡剂或特殊功能组。 在完成进一步的工艺步骤之后，将牺牲材料从沟槽中移除。

公开(公告)号：US07980671B2

公开(公告)日：2011-07-19

申请号：US11447275

申请日：2006-06-06

Applicant: Peter J. Nystrom ,  Donald J. Drake ,  Peter M. Gulvin ,  Joseph A. DeGroot ,  Jun Ma ,  Nancy Y. Jia ,  Andrew W. Hays

Inventor： Peter J. Nystrom ,  Donald J. Drake ,  Peter M. Gulvin ,  Joseph A. DeGroot ,  Jun Ma ,  Nancy Y. Jia ,  Andrew W. Hays

IPC: B41J2/06

CPC classification number: B41J2/16 ,  B41J2/14 ,  B41J2/1628 ,  B41J2/1629 ,  B41J2/1631 ,  B41J2/1632 ,  B41J2/1639 ,  B41J2/1642 ,  B41J2002/043 ,  B81B3/001 ,  B81B2201/052 ,  B81B2203/053 ,  H02N1/006

Abstract: The present application is directed to electrostatic actuators, and methods of making electrostatic actuators. In one embodiment, an electrostatic actuator of the present application comprises a first electrode and a second electrode. The second electrode is positioned in proximity to the first electrode so as to provide a gap between the first electrode and the second electrode. The first electrode is capable of being deflected toward the second electrode. A dielectric structure comprising a dielectric landing post is positioned in the gap between the first electrode and the second electrode, the dielectric structure extending over a greater surface of the gap than the landing post. The landing post protrudes out into the gap so as to limit the minimum contact spacing between the first electrode and the second electrode.

Abstract translation: 本申请涉及静电致动器以及制造静电致动器的方法。 在一个实施例中，本申请的静电致动器包括第一电极和第二电极。 第二电极位于第一电极附近，以便在第一电极和第二电极之间提供间隙。 第一电极能够朝向第二电极偏转。 包括电介质着陆柱的电介质结构位于第一电极和第二电极之间的间隙中，电介质结构在间隙的更大表面上延伸超过着陆柱。 着陆柱突出到间隙中，以限制第一电极和第二电极之间的最小接触间距。

公开(公告)号：US20110081138A1

公开(公告)日：2011-04-07

申请号：US12968150

申请日：2010-12-14

Applicant: Ming Fang ,  Fuchao Wang

Inventor： Ming Fang ,  Fuchao Wang

IPC: H05B3/82 ,  B23P19/04

CPC classification number: B81C1/00119 ,  B41J2/14056 ,  B41J2/14072 ,  B41J2/14137 ,  B41J2/16 ,  B41J2/1601 ,  B41J2/1628 ,  B41J2/1629 ,  B41J2/1639 ,  B81B1/006 ,  B81B2201/052 ,  B81B2201/058 ,  B81C2201/013 ,  B81C2203/075 ,  H01L28/20 ,  Y10T29/41 ,  Y10T29/49401 ,  Y10T29/49826

Abstract: An integrated semiconductor heating assembly includes a semiconductor substrate, a chamber formed therein, and an exit port in fluid communication with the chamber, allowing fluid to exit the chamber in response to heating the chamber. The integrated heating assembly includes a first heating element adjacent the chamber, which can generate heat above a selected threshold and bias fluid in the chamber toward the exit port. A second heating element is positioned adjacent the exit port to generate heat above a selected threshold, facilitating movement of the fluid through the exit port away from the chamber. Addition of the second heating element reduces the amount of heat emitted per heating element and minimizes thickness of a heat absorption material toward an open end of the exit port. Since such material is expensive, this reduces the manufacturing cost and retail price of the assembly while improving efficiency and longevity thereof.

Abstract translation: 集成半导体加热组件包括半导体衬底，形成在其中的腔室以及与腔室流体连通的出口，允许流体响应于加热室而离开腔室。 集成加热组件包括邻近腔室的第一加热元件，该第一加热元件可以产生高于选定阈值的热量，并将腔室中的流体朝向出口偏压。 第二加热元件邻近出口定位以产生高于所选阈值的热量，便于流体通过出口远离腔室的运动。 添加第二加热元件减少了每个加热元件发出的热量，并使吸热材料的厚度最小化到出口的开口端。 由于这样的材料是昂贵的，所以这降低了组件的制造成本和零售价格，同时提高了其效率和使用寿命。

公开(公告)号：US07837887B2

公开(公告)日：2010-11-23

申请号：US12542659

申请日：2009-08-17

Applicant: Darrell LaRue McReynolds ,  Kia Silverbrook

Inventor： Darrell LaRue McReynolds ,  Kia Silverbrook

IPC: G11B5/127

CPC classification number: H01L21/02057 ,  B41J2/1412 ,  B41J2/1601 ,  B41J2/1623 ,  B41J2/1628 ,  B41J2/1631 ,  B41J2/164 ,  B81B2201/052 ,  B81B2203/033 ,  B81C1/00849 ,  B81C2201/0112 ,  B81C2201/0132

Abstract: A method of forming an ink supply channel for an inkjet printhead comprises the steps of: (i) providing a wafer having a frontside and a backside; (ii) etching a plurality of frontside trenches into the frontside; (iii) filling each of the trenches with a photoresist plug; (iv) forming nozzle structures on the frontside using MEMS fabrication processes; (v) etching a backside trench from the backside, the backside trench meeting with one or more of the plugs; (vi) removing a portion of each photoresist plug via the backside trench by subjecting the backside to a biased oxygen plasma etch, thereby exposing sidewall features in the backside trench; (vii) modifying the exposed sidewall features; and (viii) removing the photoresist plugs to form the ink supply channel. The ink supply channel connects the backside to the frontside.

Abstract translation: 一种形成用于喷墨打印头的供墨通道的方法包括以下步骤：（i）提供具有前侧和后侧的晶片; （ii）将多个前侧沟槽蚀刻到前侧; （iii）用光致抗蚀剂插塞填充每个沟槽; （iv）使用MEMS制造工艺在前侧形成喷嘴结构; （v）从背面蚀刻背面沟槽，所述背面沟槽与一个或多个所述插头相会合; （vi）通过使背面经受偏压的氧等离子体蚀刻，从而暴露背面沟槽中的侧壁特征，通过背侧沟槽去除每个光致抗蚀剂插塞的一部分; （vii）修改暴露的侧壁特征; 和（viii）去除光致抗蚀剂插头以形成供墨通道。 供墨通道将背面连接到前侧。

公开(公告)号：US07638349B2

公开(公告)日：2009-12-29

申请号：US11936060

申请日：2007-11-06

Applicant: Kia Silverbrook

Inventor： Kia Silverbrook

IPC: H01L21/00

CPC classification number: B81C1/00142 ,  B41J2/1404 ,  B41J2/1601 ,  B41J2/1628 ,  B41J2/1631 ,  B41J2/1639 ,  B41J2/1642 ,  B41J2/1645 ,  B41J2002/14403 ,  B41J2002/14475 ,  B41J2202/11 ,  B81B2201/052

Abstract: Provided is a substrate preparation method for a micro-electromechanical system (MEMS) fabrication process. The method includes the step of depositing at least four metal layers interspersed with interlayer dielectric (ILD) layers onto a silicon wafer substrate. A passivation layer is deposited onto an outermost metal layer and at least a portion of the passivation layer is masked with a photoresist. A pit is etched through the photoresist in the substrate, said pit having a base and sidewalls. Etching is carried out along an edge of the substrate to expose the last metal layer to define bonding pads. A step of etching is carried out on either side of the pit to expose the outermost metal layer to define electrode portions. The bonding pads are for operatively connecting a microprocessor for controlling a heater element suspended in the pit between the electrode portions.

Abstract translation: 提供了一种用于微机电系统（MEMS）制造工艺的衬底制备方法。 该方法包括在硅晶片衬底上沉积散布有层间电介质（ILD）层的至少四个金属层的步骤。 钝化层沉积在最外层的金属层上，钝化层的至少一部分被光刻胶掩蔽。 通过衬底中的光致抗蚀剂蚀刻凹坑，所述凹坑具有基底和侧壁。 沿着衬底的边缘进行蚀刻以暴露最后的金属层以限定焊盘。 在凹坑的任一侧进行蚀刻步骤以露出最外层金属层以限定电极部分。 接合焊盘用于可操作地连接微处理器，用于控制悬挂在电极部分之间的凹坑中的加热器元件。

公开(公告)号：US20090053898A1

公开(公告)日：2009-02-26

申请号：US11894316

申请日：2007-08-21

Applicant: Swaroop K. Kommera ,  Siddhartha Bhowmik ,  Richard J. Oram ,  Sriram Ramamoorthi ,  David M. Braun

Inventor： Swaroop K. Kommera ,  Siddhartha Bhowmik ,  Richard J. Oram ,  Sriram Ramamoorthi ,  David M. Braun

IPC: H01L21/311

CPC classification number: B81C1/00087 ,  B41J2/16 ,  B41J2/1628 ,  B41J2/1629 ,  B41J2/1634 ,  B81B2201/052 ,  H01L21/76898

Abstract: A slot is formed that reaches through a first side of a silicon substrate to a second side of the silicon substrate. A trench is laser patterned. The trench has a mouth at the first side of the silicon substrate. The trench does not reach the second side of the silicon substrate. The trench is dry etched until a depth of at least a portion of the trench is extended approximately to the second side of the silicon substrate (12). A wet etch is performed to complete formation of the slot. The wet etch etches silicon from all surfaces of the trench.

Abstract translation: 形成通过硅衬底的第一侧到达硅衬底的第二侧的槽。 沟槽是激光图案。 沟槽在硅衬底的第一侧具有口。 沟槽没有到达硅衬底的第二面。 沟槽被干蚀刻直到沟槽的至少一部分的深度大致延伸到硅衬底（12）的第二侧。 执行湿蚀刻以完成槽的形成。 湿蚀刻从沟槽的所有表面蚀刻硅。

公开(公告)号：US20080299769A1

公开(公告)日：2008-12-04

申请号：US11755437

申请日：2007-05-30

Applicant: Tsung-Cheng Huang ,  Hua-Shu Wu ,  Fa-Yuan Chang ,  I-Ching Lin ,  Hsi-Lung Lee ,  Yuan-Hao Chien

Inventor： Tsung-Cheng Huang ,  Hua-Shu Wu ,  Fa-Yuan Chang ,  I-Ching Lin ,  Hsi-Lung Lee ,  Yuan-Hao Chien

IPC: H01L21/463

CPC classification number: B81C1/00634 ,  B81B2201/052

Abstract: A method includes depositing a layer of a sacrificial material in a first region above a substrate. The first region of the substrate is separate from a second region of the substrate, where a corrosion resistant film is to be provided above the second region. The corrosion resistant film is deposited, so that a first portion of the corrosion resistant film is above the sacrificial material in the first region, and a second portion of the corrosion resistant film is above the second region. The first portion of the corrosion resistant film is removed by chemical mechanical polishing. The sacrificial material is removed from the first region using an etching process that selectively etches the sacrificial material, but not the corrosion resistant film.

Abstract translation: 一种方法包括在基底上方的第一区域中沉积牺牲材料层。 衬底的第一区域与衬底的第二区域分离，其中在第二区域上方设置耐腐蚀膜。 沉积耐腐蚀膜，使得耐腐蚀膜的第一部分在第一区域中的牺牲材料之上，并且耐腐蚀膜的第二部分高于第二区域。 通过化学机械抛光除去耐腐蚀膜的第一部分。 使用选择性蚀刻牺牲材料而不是耐腐蚀膜的蚀刻工艺从第一区域去除牺牲材料。

公开(公告)号：US07410816B2

公开(公告)日：2008-08-12

申请号：US10807887

申请日：2004-03-24

Applicant: Makarand Gore ,  James Guo

Inventor： Makarand Gore ,  James Guo

IPC: H01L21/00

CPC classification number: B41J2/16 ,  B41J2/1623 ,  B41J2/1628 ,  B41J2/1629 ,  B41J2/1632 ,  B41J2/1639 ,  B41J2/1642 ,  B41J2/1645 ,  B41J2/1646 ,  B81B3/0035 ,  B81B2201/047 ,  B81B2201/052 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/1461 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A method is disclosed for forming a chamber in an electronic device, including the steps of preparing an outer surface on a solidified core material, the solidified core material in a depression formed in a substrate. The method further includes establishing a layer on the prepared outer surface of the solidified core material and a portion of the substrate surrounding the depression. The established layer and the substrate define a chamber.

Abstract translation: 公开了一种用于在电子设备中形成室的方法，包括以下步骤：在固化的芯材上制备外表面，固化的芯材在形成在基板中的凹陷中。 该方法还包括在所制备的固化的芯材的外表面上建立一层，以及围绕该凹陷的该基底的一部分。 建立的层和衬底限定一个室。

公开(公告)号：US20070279457A1

公开(公告)日：2007-12-06

申请号：US11447275

申请日：2006-06-06

Applicant: Peter J. Nystrom ,  Donald J. Drake ,  Peter M. Gulvin ,  Joseph A. DeGroot ,  Jun Ma ,  Nancy Y. Jia ,  Andrew W. Hays

Inventor： Peter J. Nystrom ,  Donald J. Drake ,  Peter M. Gulvin ,  Joseph A. DeGroot ,  Jun Ma ,  Nancy Y. Jia ,  Andrew W. Hays

IPC: B41J2/06

CPC classification number: B41J2/16 ,  B41J2/14 ,  B41J2/1628 ,  B41J2/1629 ,  B41J2/1631 ,  B41J2/1632 ,  B41J2/1639 ,  B41J2/1642 ,  B41J2002/043 ,  B81B3/001 ,  B81B2201/052 ,  B81B2203/053 ,  H02N1/006

Abstract: The present application is directed to electrostatic actuators, and methods of making electrostatic actuators. In one embodiment, an electrostatic actuator of the present application comprises a first electrode and a second electrode. The second electrode is positioned in proximity to the first electrode so as to provide a gap between the first electrode and the second electrode. The first electrode is capable of being deflected toward the second electrode. A dielectric structure comprising a dielectric landing post is positioned in the gap between the first electrode and the second electrode, the dielectric structure extending over a greater surface of the gap than the landing post. The landing post protrudes out into the gap so as to limit the minimum contact spacing between the first electrode and the second electrode.

Abstract translation: 本申请涉及静电致动器以及制造静电致动器的方法。 在一个实施例中，本申请的静电致动器包括第一电极和第二电极。 第二电极位于第一电极附近，以便在第一电极和第二电极之间提供间隙。 第一电极能够朝向第二电极偏转。 包括电介质着陆柱的电介质结构位于第一电极和第二电极之间的间隙中，电介质结构在间隙的更大表面上延伸超过着陆柱。 着陆柱突出到间隙中，以限制第一电极和第二电极之间的最小接触间距。

公开(公告)号：US20070259292A1

公开(公告)日：2007-11-08

申请号：US11780234

申请日：2007-07-19

Applicant: John Krawczyk ,  James Mrvos ,  Girish Patil ,  Jason Vanderpool ,  Brian Hart ,  Christopher Money ,  Jeanne Singh ,  Karthik Vaideeswaran

Inventor： John Krawczyk ,  James Mrvos ,  Girish Patil ,  Jason Vanderpool ,  Brian Hart ,  Christopher Money ,  Jeanne Singh ,  Karthik Vaideeswaran

IPC: G03C5/00 ,  H01L21/461 ,  H01L21/302

CPC classification number: B41J2/1603 ,  B41J2/1628 ,  B41J2/1631 ,  B41J2/1645 ,  B81B2201/052 ,  B81C1/00531

Abstract: A method of etching a semiconductor substrate. The method includes the steps of applying a photoresist etch mask layer to a device surface of the substrate. A select first area of the photoresist etch mask is masked, imaged and developed. A select second area of the photoresist etch mask layer is irradiated to assist in post etch stripping of the etch mask layer from the select second area. The substrate is etched to form fluid supply slots through a thickness of the substrate. At least the select second area of the etch mask layer is removed from the substrate, whereby mask layer residue formed from the select second area of the etch mask layer is significantly reduced.

Abstract translation: 蚀刻半导体衬底的方法。 该方法包括以下步骤：将光致抗蚀剂蚀刻掩模层施加到衬底的器件表面。 光刻胶蚀刻掩模的选择第一区被掩蔽，成像和显影。 照射光致抗蚀剂蚀刻掩模层的选择的第二区域以辅助蚀刻掩模层从选择的第二区域的后蚀刻剥离。 蚀刻基板以形成通过基板的厚度的流体供给槽。 至少蚀刻掩模层的选择第二区域从衬底去除，由此从蚀刻掩模层的选择的第二区域形成的掩模层残留物显着减少。